JP5040346B2 - Method for manufacturing printed wiring board - Google Patents

Description

  The present invention relates to a method for manufacturing a printed wiring board on which surface-mounted components, particularly electronic components such as bare chips, are mounted.

  Due to recent demands for higher functionality, smaller size, and lighter electronic devices such as information terminals and communication terminals, high integration and high speed technologies for semiconductors are rapidly progressing.

  For this reason, products capable of high-density wiring and high-density mounting are also demanded for printed wiring boards on which electronic components such as bare chips for achieving miniaturization and weight reduction are mounted.

  In order to enable high-density wiring and high-density mounting, printed wiring boards are required to reduce the wiring layer line width and line-to-line width, and also to make smaller via hole diameters for via holes used for connection between wiring layers. Yes. As a printed wiring board that satisfies these requirements, a multilayer printed wiring board using a build-up method has been put into practical use and is widely used.

  An example of a method for manufacturing a build-up printed wiring board is shown in FIGS.

  First, the inner substrate 30 having the wiring patterns 33 and 34 formed on both sides of the copper-clad laminate 32 by a photo process and etching is prepared {see FIG. 6A}.

  Next, the insulating base material 35 and the copper foil 36 are laminated on the front and back surfaces of the inner layer substrate 30 and heated and pressed with a vacuum hot press machine to produce a four-layer substrate 31 {see FIG. 6B}.

  Next, a conformal mask 38 having an opening 37 is formed at a predetermined position of the front and back copper foils 36 by a photo process and etching so that the insulating base 35 is exposed {see FIG. 6 (c)}.

  Next, the conformal mask 38 provided with the opening 37 is used as a mask to irradiate a laser to open a hole 39 serving as an interlayer connection via hole {see FIG. 6 (d)}. Since the residue of the insulating resin may adhere to the upper surface of the inner wiring pattern 33 which becomes the bottom surface of the hole 39 after laser drilling, the inside of the hole is cleaned (by chemicals such as potassium permanganate).

  Next, a copper plating layer is formed in order to establish an interlayer connection between the inner layer wiring pattern and the outer layer wiring pattern. First, the electroless copper plating layer 40 is formed on the entire front and back surfaces of the four-layer substrate 31 and the inner surface of the hole 39 for via holes to impart conductivity {see FIG. 6 (e)}. Then, an electrolytic copper plating layer 41 is formed on the electroless copper plating layer 40 {see FIG. 6 (f)}.

  Next, an etching resist 42 is formed on the front and back surfaces of the four-layer substrate 31 connected between the layers by a photo process {see FIG. 7G}. Then, an unnecessary copper layer is removed with an etchant such as cupric chloride to form the via hole 43 and the outer wiring pattern 44, and then the etching resist 42 is peeled off with a solution such as sodium hydroxide {FIG. 7 (h) reference}.

  Thereafter, a solder resist 45 may be applied on the surface of the four-layer substrate 31 as needed, leaving the electronic component mounting portion {see FIG. 7 (i)}.

  Finally, as a finishing process, a gold plating process or a water-soluble heat-resistant preflux process is performed for the purpose of rust-proofing the exposed copper portion of the land pattern or the like serving as a connection electrode when mounting an electronic component.

  FIG. 7 (j) shows a gold plating process. First, an electroless nickel plating layer 46 is formed on the exposed copper portion, and an electroless gold plating layer 47 is further formed thereon to form a four-layer build-up printed wiring board. Obtainable.

  Moreover, the example of the other manufacturing method of a buildup printed wiring board is shown in FIG. 8, FIG.

  In this method, first, in the same manner as the method described with reference to FIG. 6, the inner substrate 30 having the wiring patterns 33 and 34 formed on both sides of the copper-clad laminate 32 by photo process and etching is prepared {FIG. 8 (A) Reference}.

  Next, an insulating resin layer 48 is formed on the front and back surfaces of the inner layer substrate 30 {see FIG. 8B}. The insulating resin layer 48 is formed using a material mainly composed of a thermosetting resin, applied to the front and back surfaces of the inner layer substrate 30 by a method such as curtain coater, slot coater, or screen printing, and then a thermosetting furnace. Can be formed by curing the resin. In the case where a photo-curable photosensitive resin is used as the insulating resin layer, photo via holes can also be manufactured in a batch by a photo process.

  Next, a laser is directly irradiated to a predetermined position on the surface of the insulating resin layer 48 to form a hole 39 serving as an interlayer connection via hole {see FIG. 8C}.

  When laser processing is performed using the conformal mask described with reference to FIG. 6, the beam diameter of the laser is slightly larger than the opening diameter of the conformal mask. This is because the position accuracy and finish diameter of the via hole after laser processing depend on the position accuracy and finish diameter of the opening of the conformal mask, so that a margin can be given to the beam diameter and position accuracy of laser processing. is there.

  However, since this manufacturing method directly irradiates the insulating resin layer 48 with a laser without using a conformal mask, the laser processing position and hole diameter are required to have high accuracy.

  Next, a copper plating layer is formed in order to establish an interlayer connection between the inner layer wiring pattern and the outer layer wiring pattern. First, the insulating resin residue adhering to the bottom surface of the hole 39 after laser drilling is washed away.

  Next, the electroless copper plating layer 40 is formed on the inner surface of the insulating resin layer 48 whose surface is roughened and the hole 39 for the via hole to impart conductivity {see FIG. 8 (d)}. An electrolytic copper plating layer 41 is formed on the copper plating layer 40 {see FIG. 8 (e)}.

  Next, an etching resist 42 is formed on the front and back surfaces of the four-layer substrate 31 connected between the layers by a photo process {see FIG. 9F}. Then, an unnecessary copper layer is removed with an etchant such as cupric chloride to form the via hole 43 and the outer wiring pattern 44, and then the etching resist 42 is peeled off with a solution of sodium hydroxide or the like {FIG. 9 (g) reference}.

  Thereafter, if necessary, the solder resist 45 may be applied to the surface of the four-layer board 31 leaving the electronic component mounting portion {see FIG. 9 (h)}.

  Finally, as a finishing process, a gold plating process or a water-soluble heat-resistant preflux process is performed for the purpose of rust-proofing the exposed copper portion of the land pattern or the like serving as a connection electrode when mounting an electronic component. {FIG. 9 (i)} shows a gold plating process. First, an electroless nickel plating layer 46 is formed on a copper exposed portion, and an electroless gold plating layer 47 is further formed thereon, thereby forming a four-layer build-up printed wiring. A board can be obtained.

As a prior art document related to the invention of this application, for example, Patent Document 1 is known.
Japanese Patent Publication No. 4-3676

  6 and 7, when forming the outer layer wiring pattern 44, the sum of the copper foil 36, the electroless copper plating layer 40, and the electrolytic copper plating layer 41 becomes an etching allowance, and the etching allowance is thick. Therefore, it is difficult to form fine wiring, and there is a problem that it cannot sufficiently cope with high-density wiring and high-density mounting that will be required in the future.

  8 and 9, when forming the outer layer wiring pattern 44, the electroless copper plating layer 40 and the electrolytic copper plating layer 41 are used for etching, and copper foil is not used. The etching cost is thin. Therefore, fine wiring can be formed, which is advantageous for increasing the density of the printed wiring board.

  However, the outer layer wiring pattern 44 and via hole 43 formed by this method are composed of the electroless copper plating layer 40 and the electrolytic copper plating layer 41, and the electroless copper plating layer 40 is directly on the surface of the insulating resin layer 48. Since it is formed, the outer wiring pattern 44 and the via hole 43 have a low bonding force with the insulating resin layer 48 and are easily peeled off.

  In particular, the wiring pattern of the outer layer and the mounting land pattern on which the electronic component is mounted out of the via hole have a problem of being easily peeled off due to impact or repair at the time of electronic component replacement.

  The present invention solves the above-described problems, and provides a method for manufacturing a printed wiring board that enables formation of fine wiring and does not reduce the bonding force of a land pattern for mounting electronic components. Objective.

In order to achieve the above object, the printed wiring board manufacturing method of the present invention includes a step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern, and heating and pressurizing, A step of forming a conformal mask having an opening in the copper foil and an outer layer wiring pattern; a step of irradiating the opening with a laser to form a hole for an interlayer connection via hole in the insulating substrate; and cleaning the inside of the hole and a surface layer and a step of roughening the solder resist forming step of selectively covering the outer layer wiring pattern except for the hole, forming a conductive layer on the front and back over the entire surface including the hole and the solder resist above, selective step and the conductive formed on the said conductive layer is exposed to the non-formation portion of the etching resist and on the solder resist forming an etching resist And removing by etching, it is that characterized by comprising a step of removing the etching resist. As a result, it is possible to provide a method for manufacturing a printed wiring board that can form fine wiring on a high-density substrate or a bare chip mounting substrate and that does not reduce the bonding force of land patterns for mounting electronic components. .

The printed wiring board manufacturing method of the present invention includes a step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern and heating and pressing, and an opening in the copper foil. A step of forming a conformal mask and an outer layer wiring pattern, a step of irradiating the opening with a laser to open a hole for an interlayer connection via hole in the insulating base, and a step of cleaning the inside of the hole and roughening the surface layer When the solder resist forming step of selectively covering the outer layer wiring pattern except for the hole, forming a conductive layer on the front and back over the entire surface including the hole and the solder resist above a hole wherein the conductive layer is formed is that characterized by comprising the step of filling the hole filling resin, and removing the conductive layer formed on the solder resist. As a result, it is possible to provide a method for manufacturing a printed wiring board that can form fine wiring on a high-density substrate or a bare chip mounting substrate and that does not reduce the bonding force of land patterns for mounting electronic components. .

  In particular, the hole filling resin is a thermosetting resin, and by heating it after filling, the surface curability of the solder resist can be improved, and the conductive layer in the subsequent process can be easily removed. it can.

The printed wiring board manufacturing method of the present invention includes a step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern and heating and pressing, and an opening in the copper foil. A step of forming a conformal mask and an outer layer wiring pattern, a step of irradiating the opening with a laser to open a hole for an interlayer connection via hole in the insulating base, and a step of cleaning the inside of the hole and roughening the surface layer When the step of forming the solder resist forming step of selectively covering the outer layer wiring pattern, the conductive layer by electroless copper plating on the front and back over the entire surface before Symbol bore and including the solder resist above except the bore, the bore A step of selectively forming a plating resist except the step, a step of forming an electrolytic copper plating layer on a portion where the plating resist is not formed, and a top of the electrolytic copper plating layer Forming a solution of nickel layer and electroless gold plating layer, it is that characterized by comprising a step of removing the conductive layer by electroless copper plating on the plating resist and the solder resist. As a result, it is possible to provide a method for manufacturing a printed wiring board that can form fine wiring on a high-density substrate or a bare chip mounting substrate and that does not reduce the bonding force of land patterns for mounting electronic components. .

  In addition, the conformal mask having the opening and the outer layer wiring pattern are formed simultaneously in the same process. As a result, productivity can be improved, etching can be performed with a small etching allowance, and fine wiring can be easily formed.

  In the solder resist formation step, the surface is cured to form a glossy state, and the glossiness (JIS Z8741) is in the range of 30-60. Thereby, the removal of the conductive layer in a later step can be easily performed.

  Further, the step of forming a conductive layer in the conformal mask, the hole, and a surface layer including the solder resist includes a step of filling the hole with a conductor. Thereby, if it is a via hole of the form with which the conductor was embedded, it can also be used as a land pattern for electronic component mounting, and also the joining force of the land pattern for electronic component mounting can be heightened. In particular, filling with electrolytic copper plating can be performed in a plating process for connecting the outer layer wiring pattern and the interlayer, so that the production efficiency of the printed wiring board can be increased.

  Further, in the step of cleaning the inside of the hole and roughening the surface layer, the insulating base material is roughened with potassium permanganate, and the inner layer wiring pattern and the outer layer wiring pattern are surface-roughened with a chemical solution containing sulfuric acid and hydrogen peroxide ( JIS B0601) is roughened in the range of 2.0 to 5.0 μm. This enhances the adhesion between the solder resist to be formed later and the outer layer wiring pattern, and further forms a solder resist that does not peel off even in the removal of the conductive layer in the subsequent process. Connection performance can be improved.

  In the step of forming a conductive layer, an electroless copper plating layer is formed after electroless copper plating. Thereby, the connection between the inner layer wiring pattern and the outer layer wiring pattern can be strengthened, and the electrolytic nickel plating layer and the electrolytic gold plating layer can be easily formed thereon. Thereby, the printed wiring board which does not contain lead can be provided.

  Further, the step of removing the exposed conductive layer by etching is performed after the solder resist is cured to improve surface curability. Thereby, the conductive layer can be removed more easily.

  Further, in the step of removing the conductive layer formed on the surface of the solder resist, the conductive layer is removed with a polishing brush while being dissolved with an etching solution. Thereby, the conductive layer can be removed more easily.

  Furthermore, the inner layer substrate having the inner layer wiring pattern is a multi-layer substrate in which interlayer connection is made by a conductive hole filled with a conductive paste, so that the wiring capacity is high and the bonding of the land pattern for mounting electronic components is performed. A printed wiring board having high strength can be provided.

  By adopting the present invention, a printed wiring board manufacturing method capable of forming fine wiring on a high-density substrate or a bare chip mounting substrate and not reducing the bonding force of land patterns for mounting electronic components. Can be provided.

(Embodiment 1)
Embodiment 1 of the present invention will be described below with reference to the drawings.

  1 and 2 are manufacturing process diagrams of the printed wiring board according to Embodiment 1 of the present invention.

  1 and 2, in this embodiment, as an inner layer substrate, the base material is a copper-clad laminate in which, for example, copper foil is pasted on both sides of a glass epoxy substrate, and laser drilling is performed on the glass epoxy substrate before lamination. Thereafter, an inner layer substrate filled with a conductive paste and having a conductive connection on the front and back sides is used.

  An inner layer substrate 10 in which inner layer wiring patterns 3 and 4 are formed on both sides of the copper clad laminate 1 by a photo process and etching is prepared {see FIG. 1 (a)}.

  Next, the insulating base material 5 and the copper foil 6 are laminated on the front and back surfaces of the inner layer substrate 10 and heated and pressurized with a vacuum hot press machine to produce a four-layer substrate 11 {see FIG. 1 (b)}.

  Instead of laminating the insulating base material 5 and the copper foil 6, a copper foil with resin in which an insulating resin is applied to the copper foil may be laminated on the front and back surfaces of the inner layer substrate 10. Further, the inner layer substrate 10 may be a multilayer substrate in which conductive connection is made by filling a conductive paste.

  Next, a conformal mask 8 and an outer layer wiring pattern 9 each having an opening 7 so as to expose the insulating base material 5 at a predetermined position of the front and back copper foils 6 by a photo process and etching are simultaneously formed by the same process. {See FIG. 1 (c)}.

  Next, the conformal mask 8 provided with the opening 7 is used as a mask to irradiate a laser to open a hole 12 for an interlayer connection via hole {see FIG. 1 (d)}. In addition, since the residue of the insulating resin may adhere to the upper surface of the inner wiring pattern 3 that becomes the bottom surface of the hole 12 after laser drilling, the inside of the hole is cleaned with chemicals such as potassium permanganate and the four layers. The base material surface of the substrate 11 is roughened.

  In this step, the inside of the hole 12 is cleaned and the insulating base material 5 is roughened, and the inner layer wiring patterns 3 and 4 and the outer layer wiring pattern 9 are roughened with a chemical solution containing sulfuric acid and hydrogen peroxide (JIS B0601). It roughens in the range of 2.0-5.0 micrometers.

  By this treatment, adhesion with a solder resist formed in a later step is enhanced, and a solder resist that does not peel off even when the conductive layer is removed in a later step is formed. Further, it is intended to improve the connection performance between the inner layer wiring pattern and the outer layer wiring pattern.

  In addition, when the surface roughness is 2.0 μm or less, the adhesion between the wiring pattern and the solder resist is reduced, and when the surface roughness is 5.0 μm or more, chemical resistance and environmental characteristics are reduced. The above range is desirable.

  Next, on the front and back surfaces of the four-layer substrate 11, a solder resist 13 is selectively applied so as to selectively cover the outer layer wiring pattern 9 except for the land pattern corresponding to the inner surface of the conformal mask 8 and the hole 12 and the electronic component mounting portion. Form {see FIG. 1 (e)}.

  The solder resist 13 is preferably cured to form a glossy surface. Specifically, the glossiness (JIS Z8741) of the surface of the solder resist 13 is desirably in the range of 30-60. When the glossiness is 30 or less, the adhesion between the solder resist 13 and the conductive layer 15 described later increases, so that it is difficult to easily remove the conductive layer 15 performed in a later step. On the other hand, when the glossiness is 60 or more, the electroless copper plating layer 14 formed in the subsequent process is easily peeled off after formation, and further attention is required for handling and transport of the substrate in the manufacturing process.

  The glossiness of the solder resist 13 surface ranges from 30 to 60, the type and amount of fillers such as fillers contained in the solder resist 13, or a method of selecting an additive such as a leveling agent, or the solder resist 13 It can be formed within the above range by setting conditions for thermosetting or setting conditions for ultraviolet irradiation.

  Next, a copper plating layer is formed in order to establish an interlayer connection between the inner layer wiring pattern and the outer layer wiring pattern.

  First, an electroless copper plating layer 14 is formed on the entire front and back surfaces of the four-layer substrate 11 including the solder resist 13 and the inner surface of the hole 12 for via holes to impart conductivity {see FIG. 1 (f)}. An electrolytic copper plating layer is applied on the copper plating layer 14 to form a conductive layer 15 {see FIG. 2 (g)}.

  As a form different from the process shown in FIG. 2G, a process of filling the hole 12 with a conductor such as a paste can be provided separately. In particular, if the step of filling the conductor is performed by electrolytic copper plating, the process of forming the electrolytic copper plating layer in FIG. Can be formed.

  Next, an etching resist 16 is selectively formed on the front and back surfaces of the four-layer substrate 11 connected between the layers by a photo process {see FIG. 2 (h)}.

  Next, the conductive layer 15 exposed in the portion where the etching resist 16 is not formed is removed with an etchant such as cupric chloride to form a via hole 17.

  Then, the etching resist 16 is removed with a solution such as sodium hydroxide {see FIG. 2 (i)}.

  In particular, if the above-described via hole is filled with a conductor, it can be used as a land pattern for mounting an electronic component.

  Note that the solder resist 13 which is the base of the conductive layer 15 to be removed by etching is cured and the surface is glossy. Therefore, the electroless copper plating layer 14 deposited on the solder resist that is in a glossy state has a weak adhesion with the solder resist 13 and can be easily removed by etching.

  Further, the conductive layer 15 can be removed more easily by removing the conductive layer by etching and then curing the solder resist to improve the surface curability.

  Specifically, it can be carried out by heating the substrate and curing the solder resist.

  Finally, as a finishing process, a gold plating process or a water-soluble heat-resistant preflux process is performed for the purpose of rust-proofing the exposed portions of copper such as land patterns and via holes as connection electrodes when mounting electronic components.

  The step of FIG. 2 (j) shows a gold plating process. First, an electroless nickel plating layer 18 is formed on an exposed copper portion, and an electroless gold plating layer 19 is further formed thereon, thereby forming a four-layer build-up printed wiring. A board can be obtained.

Thus, according to the configuration and the manufacturing method of the printed wiring board in the present embodiment, the following effects can be obtained.
(1) When forming the wiring pattern 9 of the outer layer, since only the copper foil 6 is an etching allowance, fine wiring can be formed. In particular, the thickness of the copper foil 6 is thin and the roughness of the surface in contact with the base material is low, that is, if low profile copper foil is used, the pattern edge portion is more easily cut during etching. Pitch wiring patterns are possible, which is advantageous for manufacturing printed wiring boards for high-density wiring, which will be increasingly demanded in the future.
(2) The outer layer wiring pattern 9 and the via hole 17 are formed by etching the copper foil 6, and the copper foil 6 is laminated by heating and pressing with the insulating base material 5 and a vacuum hot press. Therefore, the peel strength and pull strength of the outer layer wiring pattern 9 and the via hole 17 are very high, and it is possible to eliminate the dropout of electronic components due to impact.
(3) Solder by removing the residue of the insulating resin adhering to the bottom surface of the hole 12 after laser drilling with a chemical such as potassium permanganate and roughening the base material surface of the four-layer substrate 11 The adhesion with the resist 13 is increased. This makes it difficult for the solder resist to peel off. As a result, it is possible to greatly reduce the occurrence of peeling of the solder resist and scratches caused by transportation in the manufacturing process of the printed wiring board.

  In the above example, the method of selectively forming the etching resist 16 by the photo process is shown. However, instead of the etching resist 16, the hole filling resin is filled in the hole 12 in which the conductive layer 15 is formed. Is also possible.

  Specifically, first, a thermosetting and alkali-soluble resin for filling a hole is filled into the holes 12 including the entire surface of the substrate by a method such as a roll coater, and the substrate is heated to obtain a resin for filling a hole. Harden. At that time, the solder resist 13 is also cured, whereby the surface curability can be improved.

  Thereafter, the hole filling resin applied to the surface with a polishing brush is removed, and the conductive layer 15 on the solder resist 13 is easily polished by polishing the surface with an etching solution while dissolving the conductive layer 15. Can be removed.

  In addition, although the conductive layer 15 is formed on the wiring pattern of the outer layer that is not covered with the solder resist 13, the conductive layer 15 on the solder resist 13 can be easily removed. For this reason, although the said conductive layer 15 will remain by the thickness of 50%-70% of the beginning, it is natural that the function as a printed wiring board is not impaired.

  Further, when two or more independent outer layer wiring patterns are not covered with the solder resist 13, it is desirable to form the solder resist 13 on the insulating substrate between the outer layer wiring patterns without a gap. Thereby, the conductive layer 15 is not left except on the outer layer wiring pattern, and a short circuit or migration of the circuit can be prevented.

(Embodiment 2)
Embodiment 2 of the present invention will be described below with reference to the drawings.

  FIG. 3 is a manufacturing process diagram of the printed wiring board according to Embodiment 2 of the present invention.

  In the present embodiment, the process up to FIG.

  First, an electroless copper plating layer is formed on the entire front and back surfaces of the four-layer substrate 11 and the inner surface of the via hole hole 12 to form the conductive layer 14. After that, when mounting the hole 12, the conformal mask 8 and the electronic component for the interlayer connection, a plating resist 20 is selectively formed by a photo process in a portion excluding the land pattern to be a connection electrode {FIG. )reference}.

  Next, an electrolytic copper plating layer 21 is formed on a portion where the plating resist 20 is not formed {see FIG. 3B}.

  Next, an electrolytic nickel plating layer 22 is formed on the electrolytic copper plating layer 21, and an electrolytic gold plating layer 23 is further formed thereon {see FIG. 3 (c)}.

  Next, after the plating resist 20 is peeled off with a solution such as sodium hydroxide, unnecessary portions are removed with an alkaline etching solution mainly composed of copper ammonium complex ions using the electrolytic nickel plating layer 22 and the electrolytic gold plating layer 23 as etching resists. The conductive layer 14 which is the electroless copper plating layer can be removed to obtain a four-layer build-up printed wiring board {see FIG. 3 (d)}.

  Unlike the case of the first embodiment, the conductive layer 14 in the present embodiment may be removed only by removing the electroless copper plating layer having a thickness of several microns. In particular, considering that the solder resist is formed with a glossy state as in the first embodiment, it is natural that the conductive layer 14 can be easily removed in a shorter time.

Thus, according to the configuration and the manufacturing method of the printed wiring board in the present embodiment, the following effects can be obtained.
(1) When the outer layer wiring pattern 9 is formed as in the first embodiment, only the copper foil 6 is used for etching, so that fine wiring can be formed.
(2) As in the first embodiment, the outer layer wiring pattern 9 and the via hole 17 are formed by etching the copper foil 6, and the copper foil 6 is formed by the insulating substrate 5 and the vacuum hot press. It is strongly bonded because it is laminated by heating and pressing with a machine, and the peel strength and pull strength of the outer layer wiring pattern 9 and via hole 17 are very high, and it is possible to eliminate the dropout of electronic components due to impact. It becomes possible.
(3) The surface treatment for finishing the printed wiring board in the present embodiment is electrolytic nickel plating or electrolytic gold plating. Normally, nickel and gold plating are frequently used as finishing surface treatments for high-density substrates and bare chip mounting substrates. There are two types of nickel and gold plating: electroplating and electroless plating. In the case of electrolytic plating, a lead wire is required for energization, but a high-density board does not have enough space to accommodate the lead wire. Many are due to plating.

  However, in electroless nickel plating, lead is also contained in the deposited nickel plating layer because the plating bath contains lead as an additive as a crystal modifier, a dispersion inhibitor, and a brightener.

  When the lead concentration in the nickel plating layer was analyzed by an inductively coupled plasma emission spectrometer (ICP-AES, ICP-OES), it was 400 to 1200 ppm. This is 0.1 wt% which is the maximum allowable concentration of the RoHS Directive (Restriction of the use of certain Hazardous Substitutes), which is an environmental regulation that will be enforced in July 2006 (1000 ppm) may be exceeded, and at the same time, the maximum permissible concentration is 0.1 wt% in the ELV Directive (End of Life Vehicles), but this value is not intended. Because it is limited to the case of addition, it is highly possible that it is judged that the ELV directive has been deviated from the intentional use of an additive containing lead even if it is less than 1000 ppm. .

  Since the surface treatment for finishing the printed wiring board in the present embodiment is electrolytic nickel plating, the nickel coating does not contain lead at all. For this reason, it is an environmentally friendly printed wiring board that also supports the RoHS command and the ELV command.

  In addition, when the gold plating is formed by electroless plating, it is difficult to deposit thick and dense. For this reason, a large number of pinholes exist on the surface of the deposited gold plating. In this pinhole portion, a local battery is formed by contact between gold and nickel, and a very large potential difference is generated between gold and nickel, thereby causing corrosion. Since this corrosion progresses with time, it cannot be stored for a long time.

  The surface treatment for finishing the printed wiring board in the present embodiment is electrolytic gold plating. From this, not only a dense layer without pinholes can be formed, but also the gold plating thickness can be easily controlled by the plating conditions. As a result, it is possible to provide a printed wiring board that can be stocked for a long time without inferior solder wettability when electronic components are mounted even after a long period of time.

(Embodiment 3)
The third embodiment of the present invention will be described below with reference to the drawings.

  4 and 5 are manufacturing process diagrams of the printed wiring board according to Embodiment 3 of the present invention.

  In the present embodiment, the process up to FIG. 1D of the first embodiment is performed in the same manner, and thus the description thereof is omitted.

  First, the inside of the hole after laser drilling is cleaned with a chemical such as potassium permanganate and the base material surface of the four-layer substrate 11 is roughened, and then the entire front and back surfaces of the four-layer substrate 11 and the inner surface of the via hole hole 12 are formed. An electroless copper plating layer is formed to form a conductive layer 14 (see FIG. 4A).

  Next, when mounting the hole 12, the conformal mask 8 and the electronic component for the interlayer connection, a plating resist 20 is selectively formed by a photo process in a portion excluding the land pattern to be a connection electrode {FIG. b) Reference}.

  Next, an electrolytic copper plating layer 21 is formed on a portion where the plating resist 20 is not formed {see FIG. 4C}.

  Next, an electrolytic nickel plating layer 22 is formed on the electrolytic copper plating layer 21, and an electrolytic gold plating layer 23 is further formed thereon {see FIG. 4 (d)}.

  Next, after the plating resist 20 is peeled off with a solution such as sodium hydroxide, unnecessary portions are removed with an alkaline etching solution mainly composed of copper ammonium complex ions using the electrolytic nickel plating layer 22 and the electrolytic gold plating layer 23 as etching resists. The conductive layer 14 which is the electroless copper plating layer is removed {see FIG. 5 (e)}.

  Then, on the front and back surfaces of the four-layer substrate 11, a solder resist 13 is applied so as to cover the outer-layer wiring pattern 9 while leaving the mounting parts of the electronic components, and a four-layer build-up printed wiring board can be obtained { See FIG. 5F}.

Thus, according to the configuration and the manufacturing method of the printed wiring board in the present embodiment, the following effects can be obtained.
(1) As in the first and second embodiments, when the outer layer wiring pattern 9 is formed, only the copper foil 6 is used for etching, so that fine wiring can be formed.
(2) As in the first and second embodiments, the outer layer wiring pattern 9 and the via hole 17 are formed by etching the copper foil 6, and the copper foil 6 is vacuumed with the insulating substrate 5. It is strongly bonded because it is laminated by heating and pressing with a hot press. For this reason, the peel strength and pull strength of the wiring pattern 9 and the via hole 17 in the outer layer are extremely high, and it is possible to eliminate the dropout of the electronic component due to the impact.
(3) Similar to the second embodiment, the surface treatment for finishing the printed wiring board according to the present embodiment is electrolytic nickel plating. For this reason, since the nickel film does not contain lead at all, it is an environment-friendly printed wiring board that also supports the RoHS command and the ELV command.

  Moreover, since the formation of gold plating is electrolytic plating, it is possible not only to form a dense layer without pinholes, but also to easily control the thickness of the gold plating depending on the plating conditions. Therefore, it is possible to provide a printed wiring board that can be stocked for a long time without inferior solder wettability when electronic components are mounted even after a long time has passed.

  In the first to third embodiments, the inner layer substrate 10 is an example of a double-sided circuit substrate having two layers of conductive connections on the front and back sides. Good.

  In particular, as the structure of the inner layer substrate 10, it is desirable to use a multilayer substrate in which interlayer connection of each layer is made through a conduction hole filled with a conductive paste. Thereby, it is possible to provide a printed wiring board that has high wiring capacity and high bonding strength of land patterns for mounting electronic components.

  As described above, the present invention is capable of forming fine wiring on a high-density board or a printed wiring board for bare chip mounting, and can improve the bonding force of a land pattern for mounting an electronic component. The present invention provides a method for manufacturing a plate, and it can be said that industrial applicability is great.

Process sectional drawing which shows the manufacturing method of the printed wiring board in Embodiment 1 of this invention Process sectional drawing which shows the manufacturing method of the printed wiring board in Embodiment 1 Process sectional drawing which shows the manufacturing method of the printed wiring board in Embodiment 2 of this invention Process sectional drawing which shows the manufacturing method of the printed wiring board in Embodiment 3 of this invention Process sectional drawing which shows the manufacturing method of the printed wiring board in the same Embodiment 3 Process sectional drawing which shows the manufacturing method of the conventional printed wiring board Process sectional view showing the conventional method of manufacturing a printed wiring board Process sectional view showing the conventional method of manufacturing a printed wiring board Process sectional view showing the conventional method of manufacturing a printed wiring board

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Copper clad laminated board 2 Conductive paste 3, 4, 9 Wiring pattern 5 Insulation base material 6 Copper foil 7 Opening part 8 Conformal mask 10 Inner layer board | substrate 11 4 layer board | substrate 12 hole (for via holes)
DESCRIPTION OF SYMBOLS 13 Solder resist 14 Electroless copper plating layer 15, 21 Electrolytic copper plating layer 16 Etching resist 17 Via hole 18 Electroless nickel plating layer 19 Electroless gold plating layer 20 Plating resist 22 Electrolytic nickel plating layer 23 Electrolytic gold plating layer

Claims (8)

A step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern and heating and pressing; and
Forming a conformal mask having an opening in the copper foil and an outer layer wiring pattern;
Irradiating the opening with a laser to form a hole for an interlayer connection via hole in an insulating base;
Cleaning the inside of the hole and roughening the surface layer;
And the solder resist forming step of selectively covering the outer layer wiring pattern except for the hole,
Forming a conductive layer on the front and back over the entire surface including the hole and the solder resist above,
Selectively forming an etching resist;
Removing the conductive layer exposed on the non-formed portion of the etching resist and the conductive layer formed on the solder resist by etching;
And a step of stripping the etching resist. A step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern and heating and pressing; and
Forming a conformal mask having an opening in the copper foil and an outer layer wiring pattern;
Irradiating the opening with a laser to form a hole for an interlayer connection via hole in an insulating base;
Cleaning the inside of the hole and roughening the surface layer;
And the solder resist forming step of selectively covering the outer layer wiring pattern except for the hole,
Forming a conductive layer on the front and back over the entire surface including the hole and the solder resist above,
Filling the hole in which the conductive layer is formed with a filling resin;
Method for manufacturing a printed wiring board, characterized in that it comprises a step of removing the conductive layer formed on the solder resist. A step of laminating an insulating base material and copper foil or resin-coated copper foil on an inner layer substrate having an inner layer wiring pattern and heating and pressing; and
Forming a conformal mask having an opening in the copper foil and an outer layer wiring pattern;
Irradiating the opening with a laser to form a hole for an interlayer connection via hole in an insulating base;
Cleaning the inside of the hole and roughening the surface layer;
And the solder resist forming step of selectively covering the outer layer wiring pattern except for the hole,
Forming a conductive layer by electroless copper plating on the front and back over the entire surface including the hole and the solder resist above,
A step of selectively forming a plating resist except for the holes; a step of forming an electrolytic copper plating layer on a non-forming portion of the plating resist;
Forming an electrolytic nickel layer and an electrolytic gold plating layer on the electrolytic copper plating layer;
And a step of removing a conductive layer by electroless copper plating on the plating resist and the solder resist . Method for manufacturing a printed wiring board according to claim 1-3 conformal mask and the outer layer wiring pattern, characterized in that the simultaneously formed by the same process with an opening. The print according to any one of claims 1 to 3, wherein the solder resist forming step cures and forms the surface in a glossy state, and the glossiness (JIS Z8741) is in the range of 30-60. A method for manufacturing a wiring board. 2. The method of manufacturing a printed wiring board according to claim 1, wherein the step of forming a conductive layer on the entire front and back surfaces including in the hole and on the solder resist is to fill the hole with a conductor. Removing the conductive layer formed on the solder resist, printed circuit board according to claim 2, characterized in that the conductive layer is intended to remove by polishing brush while dissolved in an etchant Manufacturing method. Inner substrate having an inner layer wiring pattern, a method for manufacturing a printed wiring board according to claim 1 to 3, characterized in that the conductive paste is a multilayer substrate in which interlayer connection is made by introducing hole filled.

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