JP2007208229A - Manufacturing method of multilayer wiring board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To propose a manufacturing method permitting the efficient manufacture of a multilayer wiring board and an improvement in the reliability of interlayer conduction connection of a stacked via or the like. <P>SOLUTION: In an insulating resin substrate 1, there is formed a via hole 2 having the maximum diameter that is twice or less the thickness of a wiring conductor to be formed. In the insulating resin substrate with the via hole formed, a base metal layer 3 and a resist film 4 are formed. An electrolytic plating metal 5 is deposited by electrolytic plating to form a wiring conductor of a predetermined thickness and fill the via hole conductor at the same time. By stacking a predetermined kind and number of single-layer wiring boards 6 obtained in this way to press them, a multilayer wiring board is formed. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a multilayer wiring board having wiring conductors between insulating layers and connecting the wiring conductors between the insulating layers through via-hole conductors, and relates to a batch lamination method.

  Due to the recent demand for higher functionality and lighter, thinner and smaller electronic devices, electronic components have been highly integrated and densely mounted, and circuit boards on which these electronic components are mounted are also becoming highly functional. It has been requested.

  As a method of manufacturing a multilayer wiring board, there was a sequential lamination method called a build-up method. This is a method of manufacturing a multilayer wiring board by alternately laminating wiring layers and resin insulating layers on a core substrate. However, in order to improve efficiency over the conventional build-up method, in recent years, a batch lamination method has been used in which each wiring layer is prepared in advance, and finally they are collectively pressed and laminated.

Various methods have been proposed by various companies for the method of manufacturing a multilayer wiring board by the batch lamination method. These common points are:
1. A single wiring layer in which wiring and via-hole conductors are formed is created.
2. The required number of single-layer wiring layers are stacked and bonded together by pressing, and at the same time, the wiring conductors of different wiring layers and via-hole conductors are conductively connected.
Is mentioned. Various methods have been proposed by various companies for the via hole conductor forming method, insulating resin, via hole conductor filling method, via hole conductor and wiring conductor bonding method, and wiring conductor forming method.

JP 2002-158447 A

  In the case of forming a single wiring layer, the formation of the wiring conductor and the formation of the via-hole conductor are formed in separate steps. For example, the wiring conductor is formed by electroless copper plating or copper foil etching, and the via-hole conductor is formed by a method of filling a conductive paste. However, when the via hole conductor and the wiring conductor are formed in different steps, the density of the conductor is different. For example, in the case of the via hole conductor filled with the conductive paste, since the resin component is included in addition to the conductivity, FIG. As shown, the center surface of the via-hole conductor sometimes has a dent. When such a dent is generated in the via-hole conductor, there is a problem that a bonding failure occurs with the wiring conductor of another wiring layer. In particular, when a so-called stacked via in which a via-hole conductor is formed on a via-hole conductor is used, as shown in FIG. is there.

  The present invention proposes a method for manufacturing a multilayer wiring board capable of improving the reliability of bonding between a via-hole conductor and a wiring conductor in order to solve the above-described bonding failure between wiring layers.

    The present invention includes a step of preparing an insulating resin substrate, a step of forming a via hole in the insulating resin substrate, wherein the maximum diameter of the hole is not more than twice the thickness of the wiring conductor to be formed, and the via hole Forming a base metal layer on the formed insulating resin substrate by electroless plating; forming a resist film in a predetermined pattern on the insulating resin substrate on which the base metal layer is formed; and predetermined by electrolytic plating A step of simultaneously forming a wiring conductor of a predetermined thickness and filling a via-hole conductor, a step of removing a resist film and an unnecessary base metal layer, and a predetermined type and a predetermined number of single-layer wiring boards formed by the above steps A step of preparing and a step of stacking and pressing the prepared single-layered wiring board of a predetermined type and a predetermined number of sheets. We propose a method.

  According to the present invention, since the wiring conductor and the via-hole conductor can be formed in the same process, the production of the multilayer wiring board can be made efficient. In addition, since the density of the wiring conductor and the via hole conductor is the same, the via hole conductor is not recessed, and the reliability of bonding between the via hole conductor and the wiring conductor is improved.

  The present invention further proposes that the via-hole conductor on the surface opposite to the surface on which the wiring conductor is formed of the single-layer wiring board is subjected to tin plating. This further improves the reliability of bonding between the via-hole conductor and the wiring conductor.

  In the present invention, it is further proposed to apply an interlayer adhesive resin to the surface of the single-layer wiring board opposite to the surface on which the wiring conductor is formed. As a result, the bonding of each single-layer wiring board becomes stronger, and the reliability of the bonding between the via-hole conductor and the wiring conductor is improved.

  According to the present invention, the reliability of bonding between the via-hole conductor and the wiring conductor is improved. Therefore, even if the junction reliability is severe, such as a stacked via, for example, it is possible to obtain a multilayer wiring board with high junction reliability.

  An embodiment of a method for manufacturing a multilayer wiring board according to the present invention will be described with reference to the following drawings.

  FIG. 1 is a diagram illustrating a process of forming a single-layer wiring board according to the present embodiment. FIG. 2 is a diagram illustrating a process of forming a multilayer wiring board by stacking and pressing single-layer wiring boards according to the present embodiment. FIG. 3 is a diagram for explaining a phenomenon in the process of forming the wiring conductor and filling the via-hole conductor according to the present embodiment. It should be noted that in the present drawing, other than via hole conductors and surrounding wiring conductors are omitted for easy explanation.

  First, an insulating resin substrate 1 is prepared as shown in FIG. Examples of such an insulating resin substrate include a glass epoxy substrate and a polyimide substrate corresponding to FR-5. When using a substrate with a metal foil, a substrate obtained by removing the metal foil by etching may be prepared.

  Next, as shown in FIG. 1B, a via hole 2 is formed in the insulating resin substrate 1. As a method for forming a via hole, drilling with a laser processing machine can be mentioned. As the laser, a carbon dioxide laser, an ultraviolet laser, an excimer laser, or the like can be used. The shape of the via hole 2 is such that its maximum diameter is not more than twice the thickness of a wiring conductor to be formed later.

  The reason for such setting will be described with reference to FIG. As shown in FIG. 3A, the plated metal layer 5 is formed on the surface of the insulating resin substrate 1 and the inner surface of the via hole 2. As shown in FIG. 3B, the plated metal layer 5 is filled in the via hole 2 while increasing the thickness. When the maximum diameter W of the via hole 2 and the thickness T of the wiring conductor are W ≦ 2T, when the thickness of the wiring conductor reaches a predetermined thickness, as shown in FIG. The via hole 2 is filled with metal. When W> 2T, a recess may be formed in the via hole conductor or the via hole 2 may not be filled with metal.

  Next, as shown in FIG. 1C, a base metal layer 3 is formed on the surface of the insulating resin substrate 1 and the inner surface of the via hole 2. Examples of the method for forming the base metal layer 3 include electroless plating of copper, chromium, nickel and the like. The base metal layer 3 is also used as a power supply metal layer for energizing and fixing the plated metal layer when a wiring conductor and a via-hole conductor are formed later by electrolytic plating.

  Next, as shown in FIG. 1D, a resist film 4 is formed on the insulating resin substrate 1. The back surface where the wiring conductor is not formed is entirely covered with a resist film 4. The surface on which the wiring conductor is formed is exposed and developed in accordance with a predetermined pattern after covering the entire surface with the resist film 4. As a result, the resist film 4 is removed only at the portion where the wiring conductor is formed and the via hole portion, and patterning is performed. In the case of the core substrate 10 described later, both sides are patterned.

  Next, as shown in FIG. 1E, a portion where the resist 4 is not formed by electrolytic plating is filled with an electrolytic plating metal 5 to form a wiring conductor and a via hole conductor. The electroplating metal 5 is deposited in the pattern shape formed on the resist film 4 by energizing the base metal layer 3. Copper is preferred as the plating metal. As described above, by setting W ≦ 2T, the wiring conductor is formed to a predetermined thickness, and at the same time, the filling of the via-hole conductor is completed.

  Next, as shown in FIG. 1F, the resist film 4 is removed. Subsequently, as shown in FIG. 1G, the unnecessary base metal layer 3 is removed. In this way, a single-layer wiring board 6 can be obtained.

  In order to further strengthen the bonding between the via-hole conductor and the wiring conductor of different wiring boards, a protective sheet 7 is attached to the wiring conductor forming surface of the single-layer wiring board 6 as shown in FIG. Electrolytic Sn plating may be performed to form Sn plating metal 8 at the tip of the via-hole conductor as shown in FIGS. 1 (i) and (j). The formation of the Sn-plated metal 8 is optional as long as sufficient bonding between the via-hole conductor and the wiring conductor can be ensured without forming the Sn-plated metal 8.

  Further, in order to strengthen the bonding between the single-layer wiring substrates or to bond the substrates made of materials that are difficult to stick to each other, as shown in FIG. Alternatively, an interlayer adhesive resin 9 may be applied. The use of the interlayer adhesive resin 9 is optional as long as the wiring boards can be joined without using the interlayer adhesive resin 9.

  Next, the process of stacking single-layer wiring boards to form a multilayer wiring board will be described with reference to FIG. As shown in FIG. 2A, a core substrate 10 having wiring conductors formed on both sides is prepared. The core substrate 10 is formed in the above-described steps, similarly to the other single-layer wiring substrate 6.

  Next, as shown in FIG. 2B, predetermined types of single-layer wiring boards 6 are arranged on both surfaces of the core substrate 10 so as to overlap in a predetermined order, and are aligned and stacked. As a positioning method, a method of positioning a positioning mark (not shown) formed in advance by an image recognition device, a positioning method using a positioning pin (not shown), or the like is used. be able to.

  Next, as shown in FIG. 2C, a plurality of wiring boards including the stacked core boards are pressed and integrated to form a multilayer wiring board 11. The multilayer wiring board obtained as described above has a high reliability of bonding between the wiring conductor and the via-hole conductor, and has a high connection reliability even in the stacked via as shown in FIG.

  Hereinafter, the present invention will be described more specifically with reference to examples, but the present invention is not limited thereto.

  A glass epoxy double-sided copper-clad plate equivalent to FR-5 in which a copper foil having a thickness of 12 μm was formed on both sides was prepared, and the copper foils on both sides were removed by etching to obtain an insulating resin substrate. A via hole having a top diameter of 30 μm and a bottom diameter of 25 μn was formed at a predetermined position of the insulating resin substrate using a UV-YAG laser processing machine. In the case of laser processing, the shape of the hole is substantially conical, so the top diameter is the maximum diameter. Next, the inner surface of the via hole and the peripheral portion of the hole were cleaned with a permanganate resin etching solution.

  Next, the cleaned insulating resin substrate is subjected to electroless copper plating to form a copper plating film serving as a base metal layer on both the substrate surface and the inner surface of the via hole. Next, a plating resist sheet (trade name RY3319, manufactured by Hitachi Chemical Co., Ltd.) made of a UV curable resin was attached to both surfaces of the insulating resin substrate on which the electroless copper plating film was formed. Next, the plating resist on the surface of the insulating resin substrate on which the wiring conductor is to be formed is cured by irradiating with ultraviolet rays through a mask on which the wiring pattern is formed. Thereafter, the uncured resist was removed with an aqueous sodium carbonate solution so that the copper plating film was exposed in the shape of a predetermined wiring pattern.

  Next, this substrate was subjected to electrolytic copper plating using an electroless copper plating film as a base metal layer. The current supply was stopped when the thickness of the metal layer by electrolytic copper plating reached 15 μm. Thereby, a wiring conductor and a via-hole conductor were formed simultaneously. Next, the plating resist was removed with a 2.5 wt% sodium hydroxide aqueous solution. Next, an unnecessary electroless copper plating film was removed with a 12 wt% ammonium persulfate aqueous solution. In this way, a single-layer wiring board having a wiring conductor and a via-hole conductor is obtained.

  Next, the surface on which the wiring of this single-layer wiring board is formed is attached with a weak adhesive masking tape as a protective sheet and subjected to electrolytic tin plating to form a tin plating film having a thickness of 5 μm at the end of the via-hole conductor. did. After the protective sheet was peeled off, an epoxy resin adhesive resin sheet having a thickness of 10 μm was attached to the surface on which the tin plating film was formed. A predetermined type and a predetermined number of single-layer wiring conductors thus formed were prepared.

  In the same manner as in the above process, a core substrate having wiring conductors formed on both sides was formed and prepared. The core substrate is not provided with a tin plating film and an adhesive resin sheet.

The prepared single-layer wiring board and core board are stacked in a predetermined order. At this time, alignment is performed by image recognition using a positioning mark provided in advance on each substrate, and each wiring substrate is laminated while being temporarily pressed at a temperature of 100 ° C. and a pressure of 5 kgf / cm ² . Thereafter, this press was performed at a temperature of 220 ° C. and a pressure of 10 kgf / cm ² to be integrated. At this time, the tip of the via-hole conductor penetrated the adhesive resin sheet and was joined to the wiring conductor of the adjacent wiring board, and a multilayer wiring board was obtained.

  The multilayer wiring board thus obtained has few dents in the via-hole conductor, and even when a stacked via is formed, the influence of the dent is difficult to be amplified, so that the reliability of conductive connection between layers is improved.

(A) is a diagram showing a step of preparing an insulating resin substrate, (b) is a diagram showing a step of forming a via hole in the insulating resin substrate, and (c) is a step of forming a base metal layer on the insulating resin substrate. (D) is a diagram showing a step of forming a resist film, (e) is a diagram showing a step of simultaneously forming a wiring conductor and a via-hole conductor by electrolytic plating, and (f) is a step of removing the resist film. (G) is a diagram showing a process of removing an unnecessary base metal layer, (h) is a diagram showing a process of attaching a protective sheet to the wiring conductor surface, and (i) is Sn plating on the tip of the via-hole conductor. The figure which shows the process to perform, (j) is a figure which shows the process of removing a protection sheet, (k) is a figure which shows the process of providing resin for interlayer adhesion. (A) is a diagram showing a step of preparing a core wiring substrate, (b) is a diagram showing a step of aligning and stacking a plurality of wiring substrates, and (c) is a diagram showing a multilayer wiring substrate formed by pressing. It is. (A), (b), (c) is a figure which shows a mode that formation of a wiring conductor and filling of a via-hole conductor are made | formed. (A) is a figure which shows the conventional single layer wiring board, (b) is a figure which shows a mode that the stacked via | veer was formed by accumulating several conventional single layer wiring boards.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Insulating resin board 2 Via hole 3 Underlying metal layer 4 Resist film 5 Electroplating metal (wiring conductor and via hole conductor)
6 Single-layer wiring board 7 Protective sheet 8 Sn-plated metal 9 Interlayer adhesion resin 10 Core board 11 Multi-layer wiring board 12 Via-hole conductor (filled with conductive paste)
13 Depression T Wiring conductor thickness W Maximum via hole diameter

Claims (3)

a. preparing an insulating resin substrate;
b, forming a via hole in the insulating resin substrate in which the maximum diameter of the hole is twice or less the thickness of the wiring conductor to be formed;
c, forming a base metal layer by electroless plating on the insulating resin substrate on which the via hole is formed;
d, forming a resist film in a predetermined pattern on the insulating resin substrate on which the base metal layer is formed;
e, a step of simultaneously forming a wiring conductor having a predetermined thickness by electrolytic plating and filling a via-hole conductor;
f, a step of removing the resist film and the unnecessary base metal layer,
g, a step of preparing a predetermined type and a predetermined number of single-layer wiring boards formed by the steps a to f;
h, a step of stacking and pressing the prepared predetermined type and the predetermined number of the single-layer wiring boards;
A method for producing a multilayer wiring board, comprising: 2. The multilayer wiring board according to claim 1, wherein after the step f, the via-hole conductor on the surface opposite to the surface on which the wiring conductor is formed of the single-layer wiring substrate is subjected to tin plating. Manufacturing method. The method for manufacturing a multilayer wiring board according to claim 1, wherein an interlayer adhesive resin is applied to a surface of the single-layer wiring substrate opposite to the surface on which the wiring conductor is formed.

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