JP2006186059A - Multilayer printed wiring board and its production process - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain a printed wiring board provided with a land on the periphery of an interlayer connection via and a flat interlayer connection via and having no plating protrusion occurring at the time of forming an interlayer connection via, and to provide its production process. <P>SOLUTION: The production process of a multilayer printed wiring board provided with an interlayer connection via formed by filling a non-through hole with deposition of conductor plating where the interlayer connection via has an interlayer connection via land and a flat interlayer connection via comprises a step for forming a circuit section previously in the same layer as that of the opening of the interlayer connection via, providing a non-through hole of the interlayer connection via after a barrier metal film is provided at at least the circuit section and then performing plating and forming a circuit, a step for soft etching only the interlayer connection via portion selectively using soft etching liquid insoluble of the barrier metal film, and a step for stripping the exposed barrier metal film. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a printed wiring board and a manufacturing method thereof, and more particularly to a multilayer printed wiring board advantageous for forming high-density circuit wiring and a manufacturing method thereof.

  In recent years, with the demand for higher density of printed wiring boards, it has been said that a technique for reducing the thickness of circuit wiring and reducing the diameter of interlayer connection vias such as blind via holes is important in order to satisfy the above requirements. . Against this background, for example, a printed wiring board having a structure shown in FIG. 5 and a method for manufacturing the same have already been reported as techniques relating to thinning circuit wiring and reducing the diameter of interlayer connection vias (Patent Literature). 1).

  FIG. 5 shows a manufacturing method for forming a build-up wiring layer on an inner layer core substrate (not shown). First, as shown in FIG. 5A, an interlayer insulating layer 52 and a metal foil such as a copper foil are sequentially laminated on the formation layer of the circuit wiring 51 located in the lower layer formed in the inner layer. Next, the circuit wiring 53 located in the upper layer is formed by an etching process. Next, a non-through hole 54 for forming an interlayer connection via is formed.

  Next, after electroless copper plating is formed on the layer of the circuit wiring 53 including the non-through hole 54, as shown in FIG. 5B, the non-through hole 54 and an opening around it are provided. A plating resist 55 is formed. Next, as shown in FIG. 5C, electrolytic copper plating treatment is performed to deposit electrolytic copper plating 56 in the opening, and then, as shown in FIG. To peel off. Finally, the unnecessary electroless copper plating is removed by soft etching to obtain the printed wiring board shown in FIG.

  In the above technique, the upper circuit wiring 53 is formed before the electrolytic copper plating 56 treatment, so that even when the subtractive method is used, the fine circuit wiring and the diameter of the interlayer connection via can be easily formed. It is what you have.

  However, the manufacturing method in which the electrolytic copper plating 56 is deposited only on the inter-layer connection via 57 as in the above technique has the following problems.

  First, a panel plating method for depositing plating on the entire printed wiring board is often used as a standard plating method for printed wiring boards. When formed, the interlayer connection via 57 has an area ratio of about 1% of the printed wiring board, and therefore has a problem that it is very difficult to control in the plating manufacturing method.

  Second, the interlayer connection vias 57 are non-uniformly arranged in the board surface in the design of the printed wiring board, and current may be concentrated more than necessary when the number is small or alone. In addition, there is a problem that the shape of the plating deposition in the interlayer connection via 57 portion is very unstable.

  Under such circumstances, the present inventor has so far developed and reported a technique related to a method for manufacturing a printed wiring board that solves the above-mentioned problems (see Patent Document 2).

  A method for manufacturing the printed wiring board will be described with reference to FIG. FIG. 6A shows a manufacturing method for forming a build-up wiring layer on an inner core substrate (not shown). First, the circuit wiring 61 is formed on the inner layer of the printed wiring board, and the interlayer insulating layer 62 and a metal layer such as copper foil are sequentially stacked on the wiring layer to form a build-up wiring layer. Next, the circuit wiring 63 located in the upper layer is formed by an etching process. Next, for example, a nickel metal film 64 is formed on the entire surface of the build-up wiring layer as a metal film. Next, a non-through hole 65 for forming an interlayer connection via is formed by using a laser, desmear cleaning is performed, and the residue at the bottom of the non-through hole 65 is removed, thereby the structure shown in FIG. Get.

  Next, a copper plating 66 having a via filling function is formed on the upper surface of the nickel metal film 64, and the non-through holes 65 are buried, thereby obtaining the structure shown in FIG. 6B.

  Next, 66 parts of the copper plating are etched by circuit formation using a subtractive method to obtain a structure having an interlayer connection via 67 as shown in FIG. Here, the etching solution used for the etching process is an alkaline etching solution mainly composed of a copper ammonium complex ion having a characteristic of dissolving the copper plating 66 and not dissolving the nickel metal film 64. By using the alkaline etching solution, the etching process is completed on the surface of the nickel metal film 64, so that a structure as shown in FIG. 6C is formed.

  Next, the nickel metal film 64 exposed on the surface is stripped using a nickel stripping solution that selectively strips the nickel metal film 64, and an interlayer connection via is formed on the surface layer as shown in FIG. A printed wiring board having 67 and circuit wiring 63 is obtained.

  The printed wiring board manufacturing method as shown in FIG. 6 is easy to control the plating process in the manufacturing process because the copper plating 66 when forming the interlayer connection via 67 is performed on the entire surface of the printed wiring board. Since the shape of the plating deposit is stabilized in the plane, the conventional problems can be solved. Further, after the nickel metal film 64 is used and the circuit wiring 63 is protected, a metal selective circuit forming method using an alkaline etching solution is performed, so that the circuit wiring required for the printed wiring board is thinned and the interlayer connection via is formed. It is a manufacturing method of the printed wiring board which can respond to diameter reduction of this.

  However, in the printed wiring board having a structure as shown in FIG. 6D, in order to solve the problem of the plating process, the copper plating 66 is adhered to the entire surface of the printed wiring board, and the selective wiring board is selected. In order to form the interlayer connection via 67 by a circuit forming method that can be etched, the interlayer connection via 67 has a convex structure, which causes the following problems.

  FIG. 7 is a diagram for explaining the problem of the convex structure of the interlayer connection via 67 part. FIG. 7A shows a structure obtained by sequentially laminating an interlayer insulating layer 71 and a copper foil 72 on a printed wiring board having a structure as shown in FIG. 6D. (B) shows a non-through-hole 73 for forming a second interlayer connection via by a laser in order to form a second interlayer connection via directly above the interlayer connection via 67 (a so-called stacked via structure). It is a figure which shows the structure which formed. Here, there is a problem because of the convex 74 structure of the interlayer connection via 67 shown in FIG.

  That is, as a first problem, when the non-through hole 73 is formed, a misalignment problem occurs due to problems such as alignment accuracy, and the non-through hole 73 is formed immediately above the interlayer connection via 67 as shown in FIG. A non-through hole 73 that is not formed may be formed. Here, in the structure as shown in FIG. 7B, the shape of the non-through hole 73 is bad, and a residue is likely to be generated near the bottom, and it is difficult to clean the non-through hole 73 well in desmear cleaning or the like. It becomes. Further, if there is a problem with the cleaning, it also becomes an obstacle in the deposition and filling of copper plating in the non-through holes 73, and the electrical connection reliability is deteriorated at the interface between successive interlayer connection vias. The quality of the printed wiring board is deteriorated.

In addition, as a second problem, in view of the recent demand for thinning of the printed wiring board, when it is desired to reduce the thickness of the interlayer insulating layer 71, the distance from the surface copper foil 72 approaches when the convex portion 74 exists, Insulation deterioration defect of the interlayer insulating portion occurs, that is, it cannot contribute to the thinning of the printed wiring board.
JP 2001-308530 A JP 2004-319994 A

  Based on the background as described above, the present invention eliminates the plating convex portion generated when forming an interlayer connection via, and forms a flat interlayer connection via with a land portion around the interlayer connection via. It is an object of the present invention to provide a high-density multilayer printed wiring board in which other interlayer connection vias are formed immediately above with high connection reliability and a method for manufacturing the same.

  The inventor has made various studies in order to solve the above problems. As a result, the land portion around the interlayer connection via is protected in advance with a metal film such as nickel, and selectively removed using an etching solution that can selectively etch only the plating convex portion of the interlayer connection via, In addition, the inventors have found that a multilayer printed wiring board in which the plating protrusions are flattened can be obtained by adjusting the etching processing amount, and the present invention has been completed.

  That is, the present invention provides the circuit wiring and the interlayer connection via land portion made of the conductor layer on the surface layer portion of the multilayer printed wiring board in which the conductor layers made only of the copper foil and the insulating layers are alternately stacked, and the interlayer connection In an interlayer connection via having a non-through hole connected to the central portion of the via land portion, and conductor plating is deposited and filled in the non-through hole, the interlayer connection via is flat with respect to the connected interlayer connection via land portion. The above-described problems are solved by a multilayer printed wiring board characterized by the above.

  Further, according to the present invention, in a method for manufacturing a multilayer printed wiring board having an interlayer connection via, a circuit portion is previously formed in the same layer as the opening of the interlayer connection via, and at least a barrier metal film is provided on the circuit portion. Later, a step of providing a non-through hole of the interlayer connection via, plating process and circuit formation, and a step of selectively soft-etching only the interlayer connection via portion using a soft etching solution insoluble in the barrier metal film And the step of peeling off the exposed barrier metal film. The above-described problem is solved by a method for producing a multilayer printed wiring board.

  Further, the present invention is characterized in that, in the step of selectively soft-etching the interlayer connection via portion of the method for manufacturing a multilayer printed wiring board, the height of the interlayer connection via and the land portion connected to the periphery are flattened. This solves the above-mentioned problem.

  Further, the present invention solves the above-mentioned problem by performing soft etching with a horizontal transfer machine in the step of selectively soft etching the interlayer connection via portion of the method for manufacturing the multilayer printed wiring board. It is a thing.

  In the present invention, the soft etching solution in the method for producing a multilayer printed wiring board is a soft etching solution mainly composed of formic acid, sulfuric acid or hydrogen peroxide, and an amine complexing agent as an additive. This solves the above problem.

  Further, the present invention solves the above-mentioned problems by using a soft etching solution in the method for producing a multilayer printed wiring board as a soft etching solution mainly composed of ammonium persulfate or sodium persulfate. .

  According to the present invention, since the interlayer connection via land portion and the flat interlayer connection via are formed, the multilayer printed wiring board can be easily thinned and densified with high connection reliability.

  The best mode for carrying out the invention will be described with reference to FIGS.

  FIG. 1 shows a manufacturing method for forming a build-up wiring layer on an inner layer core substrate (not shown). First, as shown in FIG. 1A, the interlayer insulating layer 12 and the metal foil 13 are sequentially laminated on the formation layer of the lower circuit wiring 11 formed in the inner layer. Here, since copper foil is used suitably as the metal foil 13, the example using copper foil is demonstrated below.

  As shown in FIG. 1B, the circuit wiring 14 and the interlayer connection via land 15 located in the upper layer are formed by etching the copper foil. Next, a barrier metal film 16 is formed on the entire surface of the outer layer portion including the circuit wiring 14 and the interlayer connection via land portion 15.

  Here, the barrier metal film 16 is formed on the entire surface of the outer layer portion including the circuit wiring 14 and the interlayer connection via land portion 15, and has a functional role of protecting the outer layer conductor portion by etching.

  That is, the alkaline etching solution used for the etching process can dissolve copper. However, since the barrier metal film 16 is insoluble in the alkali etching solution, the barrier metal film 16 is formed on the surface of the outer layer conductor portion including the circuit wiring 14 and the interlayer connection via land portion 15 formed from the copper foil. By doing so, the outer layer conductor portion is not dissolved in the alkaline etching solution.

  As the barrier metal film 16 used in the present invention, for example, nickel (Ni), tin (Sn), silver (Ag), etc. by electroless plating can be used.

  The barrier metal film 16 is not only nickel (Ni) alone but also nickel (Ni) containing nickel (Ni) containing phosphorus (P), for example, phosphorus (P) content 3 % Low phosphorus nickel, phosphorus (P) content 8% medium phosphorus nickel, phosphorus (P) content 10-20% high phosphorus nickel or boron (B) content nickel, etc. can be used.

  The barrier metal film 16 is preferably selected in consideration of peelability in terms of manufacturing processing. For example, when nickel (Ni) is used, nickel (Ni) simple plating or boron (B) -containing nickel (Ni) plating is preferably used to facilitate peeling. On the other hand, in the case of nickel (Ni) plating containing phosphorus (P), if the concentration of phosphorus (P) contained is high, peeling tends to be relatively difficult. Therefore, nickel plating with a phosphorus (P) content of 3% Can be used particularly preferably.

  The specific method for adhering the barrier metal film 16 to the surface of the outer layer conductor portion is appropriately determined in consideration of the type and structure of the required printed wiring board or the possessing equipment environment for manufacturing the printed wiring board. The selection is desirable from the viewpoint of industrial mass productivity.

  FIG. 1B shows a structure in which a barrier metal film 16 is attached to the entire surface of the outer layer portion including the circuit wiring 14 and the interlayer connection via land portion 15 after the circuit formation is completed.

  As described above, the structure in which the barrier metal film 16 is attached to the entire surface of the outer layer has no opening in the barrier metal film 16, so that the outer layer conductor portion such as the circuit wiring 14 and the interlayer connection via land portion 15 can be securely connected. Has the advantage that it can be protected.

  Here, as a method of attaching the barrier metal film 16 to the entire surface of the outer layer, after applying a palladium catalyst to the entire surface of the outer layer, electroless nickel (Ni) -phosphorus using sodium hypophosphite as a reducing agent (P) Plating is preferably used.

  Moreover, the barrier metal film 16 protects the outer layer conductor part by adhering to the surface of the outer layer conductor part. Therefore, if the barrier metal film 16 is attached (not shown) only to the surfaces of the circuit wiring 14 and the interlayer connection via land portion 15 located in the outer layer portion, it is sufficient to protect the outer layer conductor portion. In this case, attaching the barrier metal film 16 only to the surfaces of the circuit wiring 14 and the interlayer connection via land portion 15 located in the outer layer portion is advantageous in that cost and production speed are improved.

  Here, as a method for attaching the barrier metal film 16 only to the surface of the outer conductor portion, substitutional nickel (Ni) plating is preferably used.

  Furthermore, the barrier metal film 16 can be formed by an electrolytic nickel (Ni) plating method other than the electroless nickel (Ni) plating method and the substitutional nickel (Ni) plating method. In this case, after the electroless copper plating is first attached to the entire surface of the outer conductor portion such as the circuit wiring 14 and the interlayer connection via land portion 15, the electroless copper plating is used as the power feeding layer. Electrolytic nickel (Ni) plating is attached to the upper surface of the substrate.

  In the electrolytic nickel (Ni) plating method, it is necessary to previously provide electroless copper plating as a power feeding layer in the manufacturing process, but the nickel (Ni) plating is peeled off as compared with the electroless nickel (Ni) plating method. In this case, there is an advantage that it can be removed without changing the shape of the circuit wiring.

  Next, as shown in FIG. 1C, after providing the non-through hole 17 reaching the lower wiring layer 11 by laser irradiation, the inside of the non-through hole 17 is subjected to a desmear process, and residues and the like are cleaned.

  Next, as shown in FIG. 1 (d), electroless copper plating (not shown) is performed on the entire outer layer including the non-through holes 17, and electrolytic copper having a via filling function using the electroless copper plating as a power feeding layer. The plating 18 fills the non-through holes 17 with the copper plating 18 and deposits the copper plating 18 on the outer layer.

  Next, the circuit of the structure shown in FIG. 1 (d) in which the outer layer is subjected to copper plating 18 is formed. The circuit formation can be easily performed by a subtractive construction method, and the structure after the circuit formation is finished is a structure having an interlayer connection via 21 as shown in FIG.

  Here, an alkaline etchant mainly composed of copper ammonia complex ions is preferably used as an etchant for circuit formation. The alkaline etchant dissolves the outer layer copper plating 18 so that a desired circuit can be formed satisfactorily, and has a feature that does not dissolve the barrier metal film 16 shown in FIG. Therefore, by using the alkaline etchant in forming the circuit here, the etching process is completed on the surface of the barrier metal film 16, and the structure shown in FIG. 2A can be obtained. .

  However, the interlayer connection via 21 after the circuit formation shown in FIG. 2A is used for the purpose of the plating filling property in the interlayer connection via 21 and the stable copper plating deposition amount on the outer layer surface portion. Since the deposition amount of the plating 18 is set high and the outer layer portion has a thickness, the surface layer portion has a convex portion 22. Further, as described in the background art, the projecting portion 22 structure of the interlayer connection via 21 causes a problem when a stacked via is formed or when a material of a thin interlayer insulating layer is used. It is necessary to flatten.

  On the other hand, when only the convex portion 22 of the interlayer connection via 21 is selectively removed using a circuit forming method in the conventional printed wiring board manufacturing method, only the convex portion 22 is opened. It is necessary to perform the etching process after coating the resist and coating the etching resist in all the places where the etching process is not required.

  However, the conventional method needs to attach the etching resist to a desired position of the printed wiring board with high accuracy and sequentially perform exposure and development. However, it is difficult to etch the convex portion 22 with a small diameter and high positional accuracy. In addition, etching defects are likely to occur. Moreover, it takes time for processing preparation and actual processing, and it is not preferable because it is difficult to manufacture a high-quality printed wiring board against the background of industrial mass production.

  Here, in the manufacturing method of the present invention, since it becomes possible to use the barrier metal film 16 shown in FIG. 2A as a protective mask against the etching liquid, the softening that does not melt the barrier metal film 16 is performed. By using the etching solution, the convex portion 22 of the interlayer connection via 21 can be removed in a position-selective and efficient manner, and the structure shown in FIG. 2B can be obtained.

  The soft etching solution used here is a soft etching solution (product name: CZ8500, CZ8100) manufactured by MEC, whose main component is formic acid or an amine complexing agent, and Rohm and Haas, whose main component is sulfuric acid or hydrogen peroxide. A soft etching solution (product name: Circubond), an ammonium persulfate-based or sodium persulfate-based soft etching solution, or the like is preferably used.

  The plurality of soft etching solutions are preferably selected as appropriate depending on the type of the barrier metal film 16. The role of the soft etching solution is to melt the convex portion 22 made of a copper member well and not to dissolve the barrier metal film 16, but the soft etching solution is different depending on the type of the barrier metal film 16. This is because there is a speed difference in melting.

  For example, when nickel (Ni) simple plating is used for the barrier metal film 16 and a soft etching solution (product name: CZ8500) manufactured by MEC is used as the soft etching solution, the melting rate of the soft etching solution with respect to the copper member is 3 μm. Similarly, the melting rate for plating nickel (Ni) alone is 0.02 to 0.05 μm / min. That is, a certain amount of the barrier metal film 16 is melted.

  Therefore, the type and thickness of the barrier metal film 16 can be used in order to protect the circuit wiring 16 and the like covered with the barrier metal film 16 without melting the convex portion 22 and without melting the barrier metal film 16. It is important to appropriately select a soft etching solution in consideration of the above.

  As an example, a method using nickel (Ni) plating containing 3% phosphorous (P) for the barrier metal film 16 and using a soft etching solution (product name: CZ8100) manufactured by MEC as a soft etching solution is particularly preferable. It is mentioned as a method with which a good result is obtained.

  The height after removal of the protrusions 22 of the interlayer connection via 21 is preferably a flat structure equivalent to the interlayer connection via land 15, and specifically, the protrusion 22 is +10 μm relative to the interlayer connection via land 15. It is preferable that the height is within. This is because the electrical connection between the interlayer connection via land 15 and the interlayer connection via 21 including the convex portion 22 is stabilized. In addition, in the difference within +10 μm, the conventional connection shown in FIG. This is because such a problem as in the structure is not generated.

  Next, the barrier metal film 16 is removed by using a stripping solution that can be peeled off, and from the interlayer connection via 21 connected to the circuit wiring 14 and the interlayer connection via land 15 in the surface layer portion shown in FIG. A multilayer printed wiring board having the structure is obtained.

  The above description of the series of manufacturing methods based on FIGS. 1 and 2 shows an example in which the barrier metal film 18 is first provided on the outer layer conductor portion such as the circuit wiring 14 and then the non-through hole 17 is formed. is there.

  On the other hand, it is sufficient that the outer layer conductor portion such as the circuit wiring 14 is covered and protected by the barrier metal film 18, and the barrier metal film 18 may be provided after the non-through hole 17 is formed.

  That is, the outline of the process in FIG. 1 consists of (i) formation of the outer layer conductor portion, (ii) adhesion of the barrier metal film 16, and (iii) formation of the non-through hole 17; The printed wiring board can also be manufactured by the order of forming the part, (ii) forming the non-through hole 17 and (iii) attaching the barrier metal film 16.

  FIG. 3 is a schematic explanatory view showing the liquid flow property of soft etching when the convex portion 22 of the interlayer connection via 21 is removed using the soft etching solution.

  FIG. 3A is a schematic diagram showing a soft etching process for removing the convex portion 22 using a soft etching processing apparatus in which a printed wiring board is processed by a horizontal transfer machine. The liquid flowability of is shown.

  At this time, when sprayed in a shower form from the horizontal soft etching processing apparatus, the soft etching solution is sprayed toward the printed wiring board as indicated by an arrow Y in the figure. Further, the soft etching solution flows as shown by an arrow X in the figure on the surface of the printed wiring board conveyed by a horizontal conveyor. Therefore, when removing the convex portion 22 of the interlayer connection via 21, the soft etchant flows mainly in the direction indicated by the arrow X.

  Here, in the context of hydrodynamics, if a printed wiring board planar structure having a sufficiently small convex portion 22 is exposed to fluid, the convex portion 22 becomes an obstacle without depending on the overall liquid flow. Since it contacts the liquid, the flow velocity of the convex portion 22 becomes extremely higher than that of the flat portion. By utilizing this characteristic, the convex portion 22 is efficiently removed in the present invention, and the multilayer printed wiring board after the removal obtains an interlayer connection via 21 having a flat surface as shown in FIG.

  Further, the etching amount is an important factor for obtaining the interlayer connection via 21 having a flat surface shown in FIG.

  That is, the material to be dissolved is copper (Cu), and when the barrier metal film is made of nickel (Ni), tin (Sn), silver (Ag), etc., the etching amount of the alkaline etchant (for example, rough If the convex portion 22 is removed by etching under a condition where the amount of formation is 20 to 35 μm / minute), the progress of the etching is too early to control, resulting in a shape defect such as a dent, that is, in the formation of the stacked via Cause problems.

  In order to obtain the interlayer connection via 21 having a flat surface, the etching roughening amount is adjusted, and the processing is performed under the etching conditions in which the roughening amount is 1 to 8 μm / minute, thereby forming the interlayer connection via 21 having a flat surface. In this case, there is little variation in quality, and the position-selective protrusion 22 can be removed.

  FIG. 4 is an explanatory diagram for manufacturing a stacked via structure in which a multilayer printed wiring board obtained by the manufacturing method is used and a second interlayer connection via is disposed immediately above.

  FIG. 4A shows a structure obtained by sequentially laminating an interlayer insulating layer 41 and a copper foil 42 on a multilayer printed wiring board having a structure as shown in FIG. 2C. 4 (b) shows a structure in which a non-through hole 43 for forming a second interlayer connection via is formed by a laser in order to form a structure that forms a second interlayer connection via immediately above the interlayer connection via 21. FIG. Here, since the interlayer connection via 21 does not have a convex portion, a stacked via structure can be manufactured with high connection reliability.

  Moreover, even in the case where a structure as shown in FIG. 4C, in which misalignment has occurred due to poor positioning accuracy against the background of industrial mass production, the surface layer portion of the interlayer connection via 21 is formed. Since it is flat, the non-through hole 43 can be cleaned well in desmear cleaning or the like, and a multilayer printed wiring board with high electrical connection reliability can be manufactured.

  Further, since the interlayer connection via 21 is flat, a sufficient distance from the surface copper foil can be secured, and there is no occurrence of an insulation deterioration defect in the interlayer insulating portion.

  The following examples further illustrate the present invention.

Example First, a glass epoxy copper-clad laminate (manufactured by Hitachi Chemical Co., Ltd .: MCL-E679F) was prepared, and a subtractive method using a 20 μm dry film (manufactured by Asahi Kasei Co., Ltd .: SPG202) was used as shown in FIG. The circuit wiring 11 shown was formed.

  Next, a 50 μm thick prepreg (manufactured by Mitsui Kinzoku Co., Ltd .: MHCG100) and a 12 μm thick copper foil 13 were sequentially laminated on the upper surface of the wiring circuit 11 as an interlayer insulating layer 12.

  Next, the copper foil 13 is formed by a subtractive method using a 20 μm dry film (manufactured by Asahi Kasei Co., Ltd .: SPG202), and L / S (wiring width / wiring gap) = 30 μm / 30 μm wiring circuit 14 and interlayer A wiring circuit having connection via land portions 15 was formed (corresponding to FIG. 1B).

  Next, a barrier metal film 16 was formed on the entire surface layer portion of the multilayer printed wiring board including the wiring circuit 14 and the interlayer connection via land portion 15 (corresponding to FIG. 1B). As the barrier metal film 16, after applying a palladium catalyst to the entire surface layer portion, electroless nickel (Ni) -3% phosphorous (P) plating with a thickness of 1 μm using sodium hypophosphite as a reducing agent is formed. (Corresponding to FIG. 1 (b)).

  Next, a carbon dioxide laser is irradiated to a desired position to punch non-through holes 17 having a top diameter of φ80 μm and a bottom diameter of φ50 μm, and then the non-through holes 17 are washed by desmear treatment using a potassium permanganate solution. (Corresponding to FIG. 1 (c)).

  Next, in order to make the upper and lower wiring circuits conductive, electroless copper plating with a thickness of 0.5 μm is applied to the entire surface of the multilayer printed wiring board, and then electrolytic copper plating 18 treatment is performed in a via filling bath, 17 was completely filled with plating (corresponding to FIG. 1 (d)). In addition, the electrolytic copper plating 18 treatment was set to be deposited to a thickness of 20 μm on the outer layer.

  Next, an etching resist pattern is formed on the entire surface, and etching is performed with an alkali etching solution (Meltex, Inc .: A process) mainly composed of copper ammonium complex ions until the barrier metal layer 16 made of nickel is exposed. Excess copper plating 18 was removed. Next, the etching resist pattern was peeled and removed to form an interlayer connection via 21 shown in FIG.

  Subsequently, the convex part 22 of the interlayer connection via 21 was removed under a condition of a roughening amount of 5 μm / min by using a soft etching solution (MEC Co., Ltd .: CZ8100) to obtain a structure shown in FIG. .

  Next, the nickel barrier metal layer 16 exposed on the surface is peeled off using a nickel stripping solution (MEC: NH-1862) to obtain the multilayer printed wiring board structure shown in FIG. Obtained.

Test Example As described above, the interlayer connection via in the prior art has a convex structure. On the other hand, since the interlayer connection via in the present invention has a flat structure by removing the convex structure, a thin interlayer insulating layer can be formed. In addition, the thickness of the insulating layer can greatly contribute to the thickness reduction of the entire printed wiring board.

  Therefore, the interlayer connection via structure in the prior art is shown in FIG. 8A, and the interlayer connection via structure in the present invention is shown in FIG. 8B. From the viewpoint of reducing the thickness, each structure is subjected to a reliability test. A comparative test was conducted.

  Here, in both structures shown in FIG. 8, the interlayer connection via in the prior art and the interlayer connection via in the present invention are respectively formed by the manufacturing method described above, and the same material is formed on both the interlayer connection vias. As described above, a prepreg having a thickness of 50 μm (manufactured by Mitsui Kinzoku Co., Ltd .: MHCG100) and a copper foil having a thickness of 12 μm are sequentially laminated to form a surface layer circuit. In addition, from the measurement of the dimensions of the obtained structure, the actual measurement values such as the thickness of the interlayer part are shown as parenthesized numerical values (numerical unit: μm).

  Using both the structures, a reliability test of the interlayer insulating portion between the interlayer connection via and the upper circuit wiring portion was performed. That is, in the conventional structure shown in FIG. 8A, it is an interlayer insulating portion between the interlayer connection via 81 and the upper circuit wiring portion 82. In the structure of the present invention shown in FIG. This is an interlayer insulating portion between the interlayer connection via 83 and the upper circuit wiring portion 84.

  As a reliability test, as a load test in a humidity atmosphere, an insulation durability test up to 1000 hours was examined under the condition of 85 ° C./85% RH and a voltage of 15V. In addition, 30 samples were used for each test.

  As a result, in the conventional structure shown in FIG. 8A, all samples had insulation failure by 200 hours, and among them, 10 samples had insulation failure by 100 hours.

  On the other hand, in the structure of the present invention shown in FIG. 8 (b), it was confirmed that all the samples had no defect until 1000 hours and had excellent insulating properties at the interlayer part.

  The difference between the test results is that when an insulating material having the same thickness (here, a prepreg having a thickness of 50 μm) is used, the conventional structure has a convex portion in the interlayer connection via. The interlayer insulating portion between the interlayer connection via 81 and the upper circuit wiring portion 82 shown in FIG. 4 is 14 μm. On the other hand, the structure according to the present invention can form a structure with a flat interlayer connection via. The interlayer insulating portion between the interlayer connection via 83 and the upper circuit wiring portion 84 shown in FIG. 8B is caused by being 32 μm.

  That is, since the structure in the present invention is a structure having a flat interlayer connection via, when an insulating material having the same thickness is used, the interlayer insulation thickness can be secured more than the conventional structure. Have advantages. In addition, the structure in the present invention is a structure that can reduce the thickness of the insulating layer from the above advantages, that is, can contribute to the reduction in the thickness of the printed wiring board.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. The schematic cross-sectional process explanatory drawing which shows the manufacturing method of the multilayer printed wiring board of this invention following FIG. The schematic explanatory drawing which shows the liquid flow property of the soft etching in the method of this invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic cross-sectional explanatory view showing an example of manufacturing a multilayer printed wiring board having a stacked via structure by the method of the present invention. Schematic cross-sectional process explanatory drawing which shows the manufacturing method of the conventional multilayer printed wiring board. Schematic cross-sectional process explanatory drawing which shows the manufacturing method of the other conventional multilayer printed wiring board. The schematic cross-section explanatory drawing which shows the problem of the conventional multilayer printed wiring board. The schematic cross-section explanatory drawing of the multilayer printed wiring board used by the test example.

Explanation of symbols

11, 14: Circuit wiring 12: Interlayer insulating layer 13: Metal foil (copper foil)
15: Interlayer connection via land portion 16: Metal film 17: Non-through hole 18: Copper plating 21: Interlayer connection via 22: Convex portion 41: Interlayer insulating layer 42: Copper foil 43: Non through hole 51, 53: Circuit wiring 52: Interlayer insulating layer 54: Non-through hole 55: Plating resist 56: Copper plating 57: Interlayer connection via 61, 63: Circuit wiring 62: Interlayer insulating layer 64: Nickel metal film 65: Non-through hole 66: Copper plating 67: Interlayer connection Via 71: Interlayer insulating layer 72: Copper foil 73: Non-through hole 74: Projection

Claims (6)

  Circuit wiring and interlayer connection via land portions made of the conductor layer are provided on the surface layer portion of the multilayer printed wiring board in which conductor layers and insulating layers made only of copper foil are alternately stacked and laminated at the center of the interlayer connection via land portion. In an interlayer connection via provided with a non-through hole to be connected, and conductor plating deposited and filled in the non-through hole, the interlayer connection via is flat with respect to an interlayer connection via land to be connected Multilayer printed wiring board.   In a method for manufacturing a multilayer printed wiring board having an interlayer connection via, a circuit part is previously formed in the same layer as the opening of the interlayer connection via, and at least a barrier metal film is provided on the circuit part, and then the interlayer connection via A step of forming a non-through hole, forming a plating process and forming a circuit, a step of selectively soft-etching only the interlayer connection via portion using an insoluble soft etching solution for the barrier metal film, and the exposed A method for producing a multilayer printed wiring board, comprising the step of peeling the barrier metal film.   3. The multilayer printed wiring board according to claim 2, wherein, in the step of selectively soft etching the interlayer connection via portion, the height of the interlayer connection via and the land portion connected to the periphery are flattened. Production method.   The method for manufacturing a multilayer printed wiring board according to claim 2 or 3, wherein in the step of selectively soft-etching the interlayer connection via part, soft etching is performed by a horizontal transfer machine.   5. The soft etching solution according to claim 2, wherein the soft etching solution is a soft etching solution containing formic acid, sulfuric acid or hydrogen peroxide as a main component and an amine complexing agent as an additive. Manufacturing method for multilayer printed wiring boards. The method for manufacturing a multilayer printed wiring board according to any one of claims 2 to 4, wherein the soft etching solution is a soft etching solution mainly composed of ammonium persulfate or sodium persulfate.