JP2005150448A - Circuit substrate and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit substrate and its manufacturing method in which a conductor resistance can be reduced, a fine pattern in a widthwise direction can be formed, and also a peel-off strength is large. <P>SOLUTION: In the circuit substrate, a wiring pattern 112 composed of a coarse layer 107, a conductive layer 108 and a conductive layer 111 is embedded from a face of the coarse layer 107 onto at least one face of an insulating substrate 101 in which a conductive material 106 is filled in a through hole 105, and an insulating material 113 is filled in between the wiring patterns 112. Separately from the insulating substrate 101, the insulating material 113 is filled in between the wiring patterns 112, and a deformation or inclination caused by an external mechanical stress of the wiring pattern 112 is reduced, and additionally a fine adjustment for an amount of the insulating material 113 of the insulating substrate 101 is unwanted. A coefficient of expansion is made close to that of the wiring pattern 112 by mixing fine particles of metal oxide, etc., a stress due to a temperature is relieved, and a thermal conduction is improved, thereby making such an adjustment as to enhance an efficiency of heat radiation, etc. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a circuit board for mounting a semiconductor element, an integrated circuit, an electronic component, and the like, and a manufacturing method thereof.

  Conventionally, a conductive layer of a circuit board is generally formed by bonding a copper foil to an insulating substrate by hot pressing, forming a predetermined pattern with a photosensitive resin, and etching the copper foil using the photosensitive resin pattern as a mask. However, as the conductive layer is miniaturized, the copper foil is made thinner.

  Conventional circuit board manufacturing methods include those shown in FIGS.

  21 to 25 are cross-sectional views showing a conventional circuit board manufacturing method. As shown in FIG. 21, a copper foil as a base material 416 having a thickness of about 10 μm that is easy to etch or a stopper made of nickel having a thickness of about 3 μm as an etching stopper for forming a wiring pattern on a surface of 40 μm aluminum, for example. A layer 417 is formed, and copper as a conductive layer 419 having a roughened layer 418 serving as a wiring pattern on the surface thereof is formed with a thickness of about 10 μm. Note that mechanical strength for supporting the base material 416 is required, and the back surface is adhered to the resin substrate 420 with an adhesive containing a foaming agent for the purpose of further mechanical reinforcement and etching protection.

  Then, as shown in FIG. 22, a predetermined wiring pattern is formed on the surface of the conductive layer 419 with a photosensitive resin 421, and copper as the conductive layer 419 is etched as shown in FIG. At this time, even if the etching time of copper as the conductive layer 419 becomes long, the base material 416 is protected by the stopper layer 417 made of nickel, and only the copper of the conductive layer 419 is etched as shown in FIG. It is formed. Then, the foaming agent is heated and foamed to remove the adhesive from the resin substrate 420 and peel from the resin substrate 420. As shown in FIG. 25, the base material 416 is bonded to the glass epoxy substrate 401 filled with the conductive material 406 in the through holes 405. A method of forming a circuit board by sequentially removing the copper foil and the stopper layer 417 of nickel serving as an etching stopper by etching has been proposed.

As prior art document information related to the invention of this application, for example, Patent Document 1 is known.
JP 10-159586 A

  However, in general, when etching is performed by directly bonding a copper foil to the insulating substrate 401, the surface of the wiring pattern has a protruding shape, and particularly in a fine wiring pattern, the surface of the insulating substrate 401 is parallel to the surface. There is a problem in that the pattern collapses due to mechanical stress, causing a disconnection or a short circuit with the adjacent wiring pattern. In addition, in the conventional circuit board manufacturing method described above, the wiring pattern is embedded in the epoxy layer of the insulating substrate 401, so that the wiring pattern is less likely to fall down. However, a predetermined pattern is formed using a photosensitive resin. Then, when copper as the conductive layer 419 is formed into a wiring pattern by etching, it becomes thinner than the predetermined pattern by the photosensitive resin by side etching. As a result, when the predetermined wiring pattern cannot be obtained and the resolution is limited to the resolution limit of the photosensitive resin, the wiring pattern is thinned by side etching, and the photosensitive resin may be peeled off during the etching. In other words, the lateral copper etching, that is, side etching proceeds from both sides, so that the actual copper pattern dimension becomes thinner than the photosensitive resin pattern, making it difficult to form a pattern with a fine width, and reducing side etching. Therefore, if the thickness of copper as the conductive layer 419 is reduced, the wiring resistance of the wiring pattern made of copper is increased. Further, since the etched side wall of the wiring pattern is in a smooth state, there is a problem that the peeling strength between the wiring pattern and the insulating substrate 401 cannot be obtained by roughening only the surface of the wiring pattern.

  It is an object of the present invention to provide a circuit board having a low conductor resistance, forming a fine wiring pattern in the width direction and having a high peel strength, and a method for manufacturing the circuit board.

  In order to achieve the above object, the present invention has the following configuration.

  The invention according to claim 1 of the present invention embeds a roughening layer, a conductive layer and a wiring pattern comprising a conductive layer from at least one surface of an insulating substrate in which a through hole is filled with a conductive material, from the roughened layer surface, It is a circuit board filled with an insulating member between the wiring patterns, and an insulating material is filled between the wiring patterns in addition to the insulating board to reduce deformation and collapse due to external mechanical stress of the wiring pattern, The amount of insulating material on the insulating substrate does not need to be finely adjusted. The thermal expansion efficiency is improved by reducing the stress due to temperature and improving heat conduction by bringing the expansion coefficient closer to the wiring pattern by mixing fine particles of metal oxide. It is possible to make adjustments such as improving.

  The invention according to claim 2 is the circuit board according to claim 1, wherein the surface of the wiring pattern and the surface of the insulating member are substantially flush with each other, and the insulating member is different from the insulating substrate between the wiring patterns. Since the surface of the wiring pattern and the surface of the insulating member are almost flush with each other, the wiring pattern is embedded in the insulating member and only the surface is exposed, so that deformation and collapse due to external mechanical stress are eliminated. It is possible to reduce the stress due to temperature and reduce thermal stress by bringing the expansion coefficient closer to the wiring pattern by mixing fine particles of metal oxide, etc. Adjustments such as improving heat dissipation efficiency are also possible, and even when mounting parts and semiconductors with protrusions or bumps, there is no deviation due to pressing even if there is a slight positional deviation. Connection is obtained.

  According to a third aspect of the present invention, there is provided a step of bonding a metal substrate having a roughened layer formed on a surface of a conductive layer to an insulating substrate from the surface of the roughened layer, and exposing the conductive layer by removing the metal substrate. A circuit board manufacturing method comprising: a step of forming a predetermined photosensitive resin pattern on the exposed conductive layer surface; and a step of forming a conductive layer on the exposed conductive layer surface, Reinforce the roughened wiring pattern with a metal substrate to facilitate handling and prevent the occurrence of microcracks. Since the wiring pattern is formed using a photosensitive resin as a mask, there is no side etching. It is possible to form a fine pattern up to the resolution limit of the conductive resin pattern.

  The invention according to claim 4 is the circuit base substrate according to claim 1, wherein the thickness of the conductive layer excluding the roughened layer is 5 μm or less, and the adhesion to the insulating substrate is improved by roughening the surface. The electrical connection with the conductive material filled in the through-hole formed in the insulating substrate can be made more reliable, and the thickness of the conductive layer excluding the roughened layer is 5 μm or less. By shortening the time for removing the exposed portion by etching, the deformation of the wiring pattern due to etching can be reduced, and further miniaturization can be achieved.

  The invention according to claim 5 is the circuit board according to claim 1, wherein the roughened layer has a thickness of 3 μm or more, and the unevenness of the roughened layer improves the adhesion to the insulating substrate, resulting in an insulating property. The electrical connection with the conductive material filled in the through-hole formed in the substrate can be made more reliable, and even when the stress is caused by the expansion or contraction of the insulating substrate especially by setting the thickness to 3 μm or more. High reliability can be secured without impairing the electrical connection.

  Invention of Claim 6 is a manufacturing method of the circuit board of Claim 3 which forms a through-hole in an insulating board | substrate, and fills this through-hole with an electroconductive material, The electroconductive with which the through-hole was filled With the conductive material, the electrical connection of the wiring pattern on both surfaces of the insulating substrate can be easily performed without melting and connecting the metal at a high temperature.

  According to the seventh aspect of the present invention, the photosensitive resin pattern is removed, the conductive layer surface on the lower surface of the photosensitive resin pattern is exposed, and the exposed conductive layer is removed to form a wiring pattern. The circuit board manufacturing method according to claim 3, wherein the space between the wiring patterns is filled with an insulating member, and the pattern peeling strength is improved by embedding the conductive layer and the wiring pattern with the conductive layer with the insulating member. It is possible to prevent deformation and collapse of the pattern.

  According to an eighth aspect of the present invention, the step of adhering a metal substrate having a roughened layer formed on the surface of the conductive layer to the insulating substrate from the roughened layer surface is hot-pressed at a temperature at which the insulating substrate is not fully cured. The method according to claim 7, wherein the roughened layer is embedded in an insulating substrate and cured, and the bonding of the conductive layer to the insulating substrate is a hot press, and the resin of the insulating substrate is By setting the temperature below the complete curing, the insulating member of the insulating substrate can be in a semi-molten state at the time of hot pressing, so that embedding is easy and the insulating member is thermally cured to ensure stable and complete adhesion of the resin. Can be.

  The invention according to claim 9 is the method of manufacturing a circuit board according to claim 7, wherein the insulating member is filled between the wiring patterns to substantially the same height as the surface of the conductive layer, and the embedding is performed by filling the insulating member. It is possible to embed a wiring pattern at a predetermined depth without requiring a press for embedding, improving the peeling strength of the wiring pattern by simplifying the process and sufficiently embedding, and preventing deformation and collapse of the wiring pattern. It can be surely prevented.

  The invention according to claim 10 comprises a step of forming a conductive layer and filling an insulating member between the wiring patterns to a height equal to or higher than the surface of the wiring pattern, and a step of exposing the surface of the wiring pattern. Item 8. The method for manufacturing a circuit board according to Item 7, wherein the surface of the wiring pattern can be formed on the same plane as the insulating member, and mechanical stress can be prevented from being applied to the wiring pattern from the outside. Even during mounting, a sufficient electrical connection can be obtained even if a slight misalignment occurs.

  The invention according to claim 11 is the method for manufacturing a circuit board according to claim 7, wherein the insulating member is filled between the wiring patterns by 1/4 or more of the thickness of the conductive layer, and the wiring pattern is sufficiently embedded. As a result, the peel strength can be improved and the collapse of the wiring pattern due to the lateral stress can be reliably prevented.

  The invention according to claim 12 is the circuit according to claim 7, wherein the filling of the insulating member between the wiring patterns is performed at a portion where the width of the wiring pattern is not more than 10 times the total thickness of the conductive layer and the conductive layer. This is a method for manufacturing a substrate, and can protect against lateral stress particularly when the thickness is large with respect to the width of the wiring pattern.

  The invention according to claim 13 includes a step of forming a photosensitive resin pattern on a surface of a conductive layer formed on a metal substrate, a step of forming a conductive layer on the surface of the conductive layer, and the photosensitive resin pattern. A circuit board manufacturing method comprising: a removing step; a step of selectively removing a conductive layer; a step of bonding a conductive layer side surface of the metal substrate to an insulating substrate; and a step of removing the metal substrate. This method can form a fine conductive layer wiring pattern on the conductive layer with the same accuracy as the photosensitive resin pattern, and the metal substrate is chemically corroded by peeling of the photosensitive resin by the conductive layer. Because there is an effect that there is no effect, an effect that it can be embedded without the step of filling the insulating member is also obtained, and furthermore, the wiring pattern formed on the metal substrate has a protruding shape Although the conductive material filled in the through hole of the edge substrate is strongly compressed, the metal substrate can uniformly apply the pressure during the entire bonding, preventing partial cracks and partial excessive pressure. In addition, the connection between the conductive material filled in the through-hole and the wiring pattern can be made electrically and mechanically good, and the reliability can be improved.

  The invention according to claim 14 is the method for manufacturing a circuit board according to claim 13, wherein the conductive layer is formed by electroplating by energization from the metal substrate and the conductive layer, and the metal substrate is conductive. By energizing freely from a predetermined part of the metal substrate, the wiring pattern by the conductive layer can be determined by the resolution of the photosensitive resin selectively only on the conductive layer in the exposed area without the photosensitive resin pattern by electroplating. Up to a simple pattern.

  The invention according to claim 15 is the method for manufacturing a circuit board according to claim 13, wherein the conductive layer and the metal substrate are made of a material that can be removed by selective etching, and the metal substrate is removed by etching. Can be selectively removed by etching without applying mechanical stress, and a circuit board can be manufactured without applying mechanical stress such as pulling to the wiring pattern adhered to the insulating substrate, and a conductive material filled in the through hole High reliability can be ensured without impairing the electrical and mechanical good state of connection with the wiring pattern.

  The invention according to claim 16 is the method of manufacturing a circuit board according to claim 13, wherein the thickness of the conductive layer is 3 μm or less, and the wiring pattern of the conductive layer by electroplating by thinning the conductive layer Can be formed stably.

  As described above, the present invention embeds a roughening layer, a conductive layer, and a wiring pattern composed of a conductive layer on at least one surface of an insulating substrate in which a through hole is filled with a conductive material from the roughened layer surface. The circuit board is filled with an insulating member, and an insulating material is filled between the wiring patterns in addition to the insulating board to reduce deformation and collapse of the wiring pattern due to external mechanical stress. The amount of insulation does not need to be finely adjusted. For example, metal oxide fine particles are mixed in to bring the expansion coefficient closer to the wiring pattern to relieve stress due to temperature and improve heat conduction. It is also possible to adjust.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIGS. 1A and 1B are cross-sectional views showing the configuration of the circuit board according to Embodiment 1 of the present invention.

  As shown in FIG. 1A, the surface of the insulating substrate 101 made of the glass cloth 103 and the epoxy layer 104 filled with the conductive material 106 in the through-hole 105 is formed on the roughened layer 107 having an uneven surface. The conductive layer 108 and the roughened layer 105 of the wiring pattern 112 made of the conductive layer 111 formed on the conductive layer 108 are embedded, and the insulating member 113 is filled between the wiring patterns 112. ing. Note that the thickness of the conductive layer 108 excluding the roughened layer 107 is 5 μm or less. With this thickness, the roughened layer 107 improves the adhesion to the insulating substrate 101, and the electrical connection with the conductive material filled in the through hole 105 formed in the insulating substrate 101 is more reliable. By making the thickness of the conductive layer 108 excluding the roughened layer 107 as thin as 5 μm or less, the time for removing the exposed portion by etching can be shortened, thereby reducing the etching time of the wiring pattern 112. Deformation can be reduced and further miniaturization can be achieved.

  Moreover, the thickness of the roughening layer 107 is 3 μm or more. By setting the thickness, the roughness of the roughened layer 107 improves the adhesion with the insulating substrate 101, and the electrical contact with the conductive material 106 filled in the through-hole 105 formed in the insulating substrate 101 is achieved. Connection can be made more reliable. In particular, by setting the thickness to 3 μm or more, high reliability can be ensured without impairing the electrical connection even if stress due to expansion or contraction of the insulating substrate 101 occurs.

  As shown in FIG. 1B, the insulating member 113 is filled between the wiring patterns 112 of the circuit board shown in FIG. With this configuration, an insulating member 113 different from the insulating substrate 101 is filled between the wiring patterns 112, and the surface of the wiring pattern 112 and the surface of the insulating member 113 are substantially flush with each other so that the wiring pattern 112 is an insulating member. 113, since only the surface is exposed, deformation and collapse due to external mechanical stress can be eliminated, and the amount of the insulating member 113 of the insulating substrate 101 does not need to be finely adjusted. It is possible to adjust the expansion coefficient close to the wiring pattern 112 by mixing fine particles, etc., to relieve stress due to temperature and improve heat conduction to improve heat dissipation efficiency. Even in the case of mounting by bumps, even if some positional deviation occurs, there is no deviation due to pressing, and a sufficient connection can be obtained.

  2 to 10 are schematic cross-sectional views illustrating a method for manufacturing a circuit board according to Embodiment 1 of the present invention.

  As shown in FIG. 2, as an insulating fiber such as an aramid resin or glass, for example, a so-called glass cloth (glass woven fabric) 103 in which glass fibers are woven in a warp shape as warps and wefts is impregnated with an epoxy resin as a resin, and further glass A through hole 105 is formed in an insulating substrate 101 having an epoxy layer 104 having a thickness of, for example, about 5 to 20 μm formed on both surfaces of the cloth 103 by an optical method such as a carbon dioxide laser or a mechanical method such as a drill. Here, in the case of the glass cloth 103, the dimensional change due to the temperature in the vertical direction or the horizontal direction is determined by the physical property value of the glass fiber, that is, the thermal expansion coefficient. It is.

  Next, as shown in FIG. 3, the through hole 105 is filled with a conductive material 106 in which 1 to 50 μm of copper particles are mixed in a resin by 30 to 80% by volume, that is, a conductive paste, by printing or spraying from a nozzle.

  Here, if 30 to 90% by volume of insulating particles such as glass or alumina of about 1 to 100 μm are mixed in the epoxy layer 104, the copper particles of the conductive material 106 filled in the through holes 105 are pressed by a subsequent process. The effect of preventing the pressure from flowing into the epoxy layer 104 is obtained.

  In addition, if the so-called non-woven fabric in which the aramid resin fibers are made into a paper shape is impregnated with epoxy instead of the woven fabric in which the insulating fibers are woven in the form of cloth as the insulating substrate 101, the non-woven fabric of aramid fibers is pressed by the pressure of the press. Since the conductive material 106 is compressed more strongly because of the compression, the contact of the copper particles is improved, and a low resistance connection is obtained.

  Further, since the periphery of the through hole 105 is covered with dense aramid fibers, the copper particles of the conductive material 106 filled in the through hole 105 are prevented from flowing out, and the conductive layers 108 on both sides of the through hole 105 The electrical connection with the conductive material 106 and its reliability can be improved. Note that if the insulating substrate 101 is a film of polyimide, liquid crystal polymer, or the like, it can be a thin substrate having a thickness of 70 μm or less, and the through hole 105 can be easily formed by a YAG laser.

  On the other hand, as shown in FIG. 4, the metal substrate 109 has a thickness of 20 to 100 μm in another process, for example, an intermediate layer is formed on the surface of aluminum to form a copper plating such as iron, zinc or palladium, and the thickness is 5 μm or less. A metal substrate having a conductive layer 108, in which copper of the conductive layer 108 is formed by electroplating with a thin thickness of about 2 μm, a current density is extremely increased, and a roughened layer 107 is applied to which abnormal plating is applied. 109 is formed. The roughened layer 107 by the abnormal plating is formed by adhering many fine copper particles.

  Here, the conductive layer 108 may have a thickness as a conductive path when a predetermined pattern is formed by electroplating, and may be about 5 μm or less. If the predetermined pattern is formed by electroplating and the removal by etching is taken into consideration, the thinner one is better, and a thickness of about 2 μm is appropriate. Aluminum can be selectively etched with copper, for example, aluminum can be etched with hydrochloric acid, but copper is not attacked. However, with ammonium persulfate, sodium persulfate, or a mixture of sulfuric acid and hydrogen peroxide, copper can be etched, but aluminum is not attacked. Further, the etching rate is very slow as 1/3 or less. This means that only a desired material can be selectively etched by selecting an etching solution, or the progress can be automatically stopped if aluminum is exposed by etching copper.

  Next, as shown in FIG. 5, a metal in which a conductive layer 108 and a roughened layer 107 are formed by plating on both surfaces of an insulating substrate 101 in which a through hole 105 is filled with a conductive material 106 on an aluminum surface as a metal substrate 109, respectively. The substrate 109 is bonded by, for example, vacuum hot pressing. The vacuum of this vacuum hot press can prevent air or gas from remaining on the bonding interface. The temperature at the time of vacuum hot pressing is 100 to 260 ° C. When the vacuum hot pressing is performed again, the temperature is about 120 ° C. lower than the glass transition temperature of the epoxy resin, and the epoxy resin is completely cured without performing vacuum hot pressing. Is about 240 ° C., which is higher than the glass transition temperature.

  Here, the conductive material 106 filled in the through-hole 105 is compressed by vacuum hot pressing to reduce the conductive resistance of the conductive material 106 and increase the contact area with the conductive material 106 by the unevenness of the roughened layer 107. In addition to reducing the electrical connection resistance, it is possible to increase the peeling strength by biting into the epoxy layer 104. Also, with this structure, an all-layer IVH structure is possible as compared with a method of obtaining the same degree of conduction in the normal through-hole 105 by electroplating, and interlayer conduction is possible anywhere in the inner layer. The place can be freely selected. However, the conductive material 106 filled in the through hole 105 contains metal particles such as copper mixed in the resin, and the mixing ratio and the compression ratio are important. Depending on this ratio, the reliability of the connection may be lowered. is there. Of course, the amount of the epoxy resin as the thickness of the epoxy layer 104 is also important. If pressure is applied uniformly to these, the balance is maintained, but if there is a protrusion such as a wiring pattern, pressure will not be applied uniformly, and the flow of resin and epoxy resin will cause poor connection, poor reliability, and poor adhesion Will occur. By selectively etching aluminum and etching only aluminum with an etching solution that does not attack copper, such as 20 to 70% by volume hydrochloric acid or several to 50% by weight sodium hydroxide at 30 ° C. or higher. As shown in FIG. 6, the conductive layer 108 is exposed. Further, if necessary, an intermediate layer for forming a copper plating such as iron, zinc or palladium is removed by etching a little copper of 0.5 μm or less, but these intermediate layers are almost removed together with aluminum. At this time, since the surface of the substrate is entirely covered with copper which is the conductive layer 108, the copper of the conductive layer 108 is exposed on the entire surface, and the copper pattern is formed as in the conventional method in which copper is formed in a pattern. No groove is formed around the periphery.

  Next, as shown in FIG. 7, patterning is performed with the photosensitive resin 110 as an insulating resin pattern on the exposed surface of the conductive layer 108, and the surface of the conductive layer 108 having a predetermined pattern is exposed again. The pattern made of the photosensitive resin 110 is formed, for example, by hot-pressing or laminating a dry film resist or applying a liquid resist by spin coating or roll coating, and exposing the surface of the conductive layer 108 having a predetermined pattern with a mask. It can be easily formed by development. The pattern made of the photosensitive resin 110 can be formed in almost the same dimension as the mask with an error of 1 μm or less, and a resolution of about 5 μm even if the thickness is 15 μm if the photosensitive material 110 is removed by development by exposure. Is obtained.

Next, as shown in FIG. 8, a conductive layer 111 is formed by electroplating a metal such as copper by energization from the conductive layer 108. The electroplating of copper of the conductive layer 111 is, for example, 2 A / dm ² where abnormal plating does not occur, such as plating burn with a current density of 10 A / dm ² or less, and is bright plating with a brightening agent added to brighten the plating surface. Therefore, it can be formed substantially uniformly even in different dimensions of the plating pattern and in a fine region of about 10 μm.

  Here, the growth of the plating is increased in the horizontal direction instead of the vertical direction by the brightener, so that the growth can be performed uniformly, and the size and direction of the crystal grains are different from those of the conductive layer 108.

  Moreover, in electroplating, it is selectively formed only on the exposed portion of the conductive layer 108, and is formed according to the pattern dimensions of the photosensitive resin 110, so that the dimensions can be formed with a desired pattern with high accuracy.

  Next, as shown in FIG. 9, if the photosensitive resin 110 is removed with, for example, 3% sodium hydroxide, copper is not attacked at all, and only the surface of the conductive layer 108 covered with the photosensitive resin 110 is covered. Can be exposed.

  Then, as shown in FIG. 10, the exposed conductive layer 108 is removed by etching. In this etching, a mixed liquid of ammonium chloride and ammonia complex salt, a mixed liquid of sulfuric acid and hydrogen peroxide, or the like is different in the size and direction of crystal structure between the conductive layer 111 formed by electroplating and the exposed conductive layer 108. This is used to improve the selectivity by etching. Especially, the selectivity of etching is improved if the mixture is composed mainly of 10% or less of sulfuric acid, for example, 4%, 5% or less of hydrogen peroxide, for example, 2%, and water. To do. Note that the conductive layer 111 is preferably etched after at least 2 hours or more after the formation of the plating because it takes about 2 hours or more until the crystallization is stably formed into grains after electroplating. In order to shorten this time, for example, heat treatment may be performed at 50 ° C. or more for 10 minutes or more.

  In the first embodiment described above, the roughened layer 107 formed in a shape in which a large number of fine copper particles are adhered to bite into the insulating substrate 101 and the conductive layer 108. Strong due to the anchor effect. The wiring pattern 112 composed of the roughened layer 107, the conductive layer 108, and the second conductive layer 111 is also formed by electroplating with a fine and high precision determined by the conductive layer 111, that is, the photosensitive resin 110, and is conductive. The etching of the layer 108 is also as thin as about 2 μm, so that there is no effect on the wiring pattern 112, and the fine wiring pattern 112 can be formed with high accuracy.

  If the surface of the conductive layer 111 is further coated with solder or tin, which is an alloy of lead and tin, with a thickness of 1 μm by electroplating, vapor deposition or sputtering, and the conductive layer 108 is etched, the wiring pattern 112 may be left. The solder and tin can be easily and selectively removed without damaging the copper by the nitric acid etchant.

(Embodiment 2)
11 to 13 are schematic cross-sectional views showing a method for manufacturing a circuit board according to Embodiment 2 of the present invention.

  The conductive layer 111 shown in FIG. 10 in Embodiment Mode 1 is formed, the photosensitive resin 110 is removed, and the conductive layer 108 including the conductive layer 108 and the roughened layer 107 is removed by etching. As shown in FIG. 11, a wiring pattern 212 made of a conductive layer 208 composed of a conductive layer 208 and a roughening layer 207 and a conductive layer 211 formed by electroplating on the surface of the circuit board as shown in FIG. Embed in. This embedding is performed at a temperature at the time of vacuum hot pressing for bonding the metal substrate 102 at a temperature lower than the glass transition temperature of the epoxy resin, for example, about 120 ° C. to form the wiring pattern 212, and again by vacuum hot pressing to be below the glass transition point. The epoxy layer 204 uncured at the temperature becomes molten and can be embedded. If the temperature at this time is, for example, 230 ° C. higher than the glass transition point of the epoxy resin, the resin of the insulating substrate that is epoxy can be cured. Thereby, since the wiring pattern 212 is embedded in the cured epoxy layer 204, the peeling strength is improved even if the wiring pattern 212 is fine.

  Further, even if a lateral stress is applied to the wiring pattern 212, the wiring pattern 212 can be prevented from being deformed or collapsed because the wiring pattern 212 is reinforced by the cured epoxy resin 204 on the side surface. Further, as shown in FIG. 12, the wiring pattern 212 is embedded in the epoxy layer 204 by filling a resin in which 20 to 80% by volume of alumina fine particles are mixed in an epoxy resin as another insulating member 213 between the wiring patterns 212. Is also possible. This filling can be done by rotating the epoxy resin mixed with liquid alumina or by applying the liquid alumina mixed epoxy resin and scraping it with a squeegee, or immersing it in the epoxy resin layer mixed with liquid alumina and scraping the surface with a squeegee. It can be filled by taking. Here, alumina has better thermal conductivity than copper and has a coefficient of expansion close to that of copper, so heat conduction from the mounted semiconductor and copper wiring is well conducted to the periphery, improving the heat dissipation effect and expanding / shrinking due to temperature changes. By reducing the stress on the wiring pattern by bringing it closer to copper, it is possible to prevent disconnection of fine wiring.

  That is, the insulating member 213 having characteristics different from those of the insulating substrate 201 can be used. And this epoxy resin is heated and hardened. If this heating is performed under a vacuum state, bubbles can be prevented from being mixed into the epoxy layer as the filled insulating member 213. Thus, the wiring pattern 212 can be embedded, and the peeling strength is enhanced even if the wiring pattern 212 is fine. Further, even if a lateral stress is applied to the wiring pattern 212, the wiring pattern 212 is reinforced by the cured epoxy resin 204 on the side surface of the wiring pattern 212.

  Here, the collapse of the wiring pattern 212 is less effective when the embedding amount is smaller than the thickness of the wiring pattern 212, and is 1 / th of the thickness of the wiring pattern 212 composed of the conductive layer 208 and the conductive layer 211. If there are four or more embeddings, the deformation and collapse of the wiring pattern 212 can be prevented. The deformation or collapse of the wiring pattern 212 composed of the conductive layer 208 and the conductive layer 211 is more likely to occur as the width is smaller than the thickness of the wiring pattern 212, and the height of the wiring pattern 212 increases as the wiring pattern 212 becomes finer. On the other hand, the adhesion area of the wiring pattern 212 to the epoxy layer 204 is small, and deformation and collapse are likely to occur. Therefore, it is necessary to embed in the fine wiring pattern 212, and the circuit board is applied by applying to a fine portion having a pattern width of 10 times or less the thickness of the wiring pattern 212 composed of at least the conductive layer 208 and the conductive layer 211. The reinforcing effect is great against lateral stress due to rubbing and contact with other objects, and deformation and collapse of the wiring pattern 212 on the circuit board can be prevented.

  Further, as another insulating member 213 between the wiring patterns 212, for example, a resin in which 20 to 80% by volume of alumina particles are mixed in an epoxy resin is filled to such an extent that the surface of the wiring pattern 212 is filled. The surface of the wiring pattern 212 is exposed as shown in FIG. 13 by curing the epoxy resin mixed with alumina at least so that it is not sticky by sticking, that is, hardened to the extent that there is no tackiness, and polished by a mechanical or mechanochemical method. And can be cured, if necessary. As a result, the heat generated from the mounted semiconductor and copper wiring is well conducted to the periphery, so that the heat dissipation effect is improved and the stress on the wiring pattern 212 can be reduced by bringing the expansion and contraction due to temperature changes closer to copper. It is possible to prevent disconnection of the wiring.

  That is, the insulating member 213 having characteristics different from those of the insulating substrate 201 can be used. Further, since the wiring pattern 212 is embedded in a flat surface, no external mechanical stress is applied, and the wiring pattern 212 is not deformed or collapsed. Further, when the wiring pattern 212 has a protrusion shape with respect to the mounting of components or semiconductors by bumps on the wiring pattern 212, there is no lateral shift, deformation, or collapse during pressurization due to misalignment, and high yield is achieved. Implementation is possible. Note that the conductive layer 111 shown in FIG. 10 in Embodiment Mode 1 is formed, and a fluorine-based, hydrocarbon-based, or silicon-based film is deposited on the surface of the conductive layer 111 to remove the photosensitive resin 110, thereby removing the conductive layer 110. The surface of 111 is made water-repellent, and an epoxy resin mixed with alumina as another resin 213 between the wiring patterns 212 is filled to the extent that the surface of the wiring pattern 212 is filled, and the surface of the wiring pattern 212 is used as another insulating member 213. The epoxy resin can be prevented from being repelled and adhered, and the surface of the wiring pattern 212 can be relatively easily exposed by simply scraping off the epoxy resin mixed with alumina as another extra insulating member 213. Can do.

  In the second embodiment, the metal material and the resin material are not particularly limited.

(Embodiment 3)
14 to 20 are schematic sectional views showing a circuit board manufacturing method according to the third embodiment of the present invention.

  As shown in FIG. 14, a metal substrate 309 is formed as a metal substrate having a thickness of 20 μm to 100 μm, for example, a thin conductive layer 314 having a thickness of about 1 μm or less on the surface of, for example, aluminum, and the surface of the conductive layer 314 is formed. For example, a dry film resist having a thickness of about 15 μm is pressure-bonded as a photosensitive resin, or a positive type liquid resist is deposited by spin coating to a thickness of 15 μm, and then selectively exposed and developed with a mask to develop a predetermined wiring pattern. The opposite photosensitive resin pattern 310 is formed. The conductive layer 314 is formed by depositing, for example, copper nickel or chromium, which can be selectively etched by using an etching solution different from that of the aluminum 309, such as plating, sputtering, or electron beam. Here, in the case of the vapor deposition method, a relatively thin film having a thickness of 1 μm or less can be easily and very easily formed with a thickness variation within the substrate of about 0.01 μm.

  If the material of the conductive layer 314 is, for example, copper, it is possible to perform uniform plating with low electrical resistance when performing electroplating in a later step. For developing the photosensitive resin, about 1% sodium carbonate is used for the dry film resist, and about 1% sodium hydroxide is used for the positive type liquid resist, and the aluminum 309 is easily corroded by acid or alkali. The amphoteric metal is corroded by the developer and the fine pattern of the photosensitive resin may be peeled off from the interface of the aluminum 309. However, since the conductive layer 314 is copper, the fine pattern is not corroded by the developer. Formation is possible. It is not corroded by the sodium hydroxide solution used for removing the photosensitive resin pattern 310, and is not corroded by hydrochloric acid in etching removal of the aluminum 309.

Next, as shown in FIG. 15, a conductive layer 308 is formed with a copper sulfate solution and a current density of, for example, about 2 A / dm ² to be a copper wiring pattern. Here, by adding a brightening agent to the copper sulfate solution used for plating of the conductive layer 308, the photosensitive resin 310 can be easily formed even in a fine pattern portion with a gap, and a large gap portion can be formed with the same thickness. Is possible. Further, a roughened layer 307 is formed on the surface of the conductive layer 308 by applying an abnormal plating by extremely increasing the current density, and a metal substrate 309 having the conductive layer 314 is formed. The roughened layer 307 formed by abnormal plating is formed by adhering a large number of fine copper particles, but it is difficult to manage conditions and solutions. Therefore, as another method, an etching inhibitor mainly composed of sulfuric acid and hydrogen peroxide is used. By etching with the added roughening solution, fine irregularities can be formed as shown in FIG. This roughening of the surface not only increases the peel strength when bonded to the insulating substrate in a later step by hot pressing, but also increases the contact area with the conductive material filled in the through holes formed in the insulating substrate. Therefore, high reliability can be obtained by making the electrical connection small and stable.

  Then, by removing the photosensitive resin 310 as shown in FIG. 17, the copper conductive pattern 314 formed on the aluminum surface of the metal substrate 309 and the copper wiring pattern of the conductive layer 308 formed by electroplating on the surface are formed. A transfer substrate 302 to be formed is formed. Further, after removing the photosensitive resin 310, the conductive layer 314 is etched using the copper wiring pattern of the conductive layer 308 as a mask to expose aluminum of the metal substrate 309.

Here, since the conductive layer 314 is thin and has a very high uniformity, the etching is controlled with good controllability by adjusting the etching rate of the etching solution, that is, the concentration and composition of the etching solution. Etching is also possible. In addition, if granular irregularities are formed on the wiring pattern side wall, which is the copper conductive layer 308, by removing the photosensitive resin 310 and then performing the above-described abnormal electroplating, the peeling strength of the wiring pattern can be greatly improved. Can do. Alternatively, it is also possible to form granular irregularities on the wall on the wiring pattern side, which is the copper conductive layer 308, by performing abnormal plating similarly after etching the conductive layer 314. In the method of forming granular irregularities on the wiring pattern side wall which is the copper conductive layer 308 after exposing the aluminum of the metal substrate 309, the copper wiring pattern of the conductive layer 308 which is the same copper because the thickness of the conductive layer 314 is thin. It is possible to form granular irregularities only on the surface of the conductive layer 308 including the side wall of the copper wiring pattern, and to remove aluminum from the metal substrate 309 after the subsequent hot pressing. At this time, the groove on the side of the copper wiring pattern of the conductive layer 308 does not cause a deep groove at the interface with the resin. In addition to the electroplating under abnormal conditions for roughening, it is also possible to form irregularities by the aforementioned etching.
Next, as shown in FIG. 18, the metal substrate 309 formed on both surfaces of the glass epoxy substrate 301 in which the through hole 305 formed in the glass epoxy substrate in which the glass cloth 303 is impregnated with the epoxy resin 304 is filled with the conductive material 306 is formed. A transfer substrate 302 having a conductive layer 314 formed on the aluminum surface and further electroplated with the conductive layer 308 and the roughened layer 307 is bonded by, for example, vacuum hot pressing.

  The vacuum of this vacuum hot press can prevent air or gas from remaining on the bonding interface. The temperature at the time of vacuum hot pressing is 100 to 260 ° C. When the vacuum hot pressing is performed again, the temperature is about 120 ° C. lower than the glass transition temperature of the epoxy resin, and the epoxy resin is completely cured without performing vacuum hot pressing. Is about 240 ° C., which is higher than the glass transition temperature.

  Here, the conductive material 306 filled in the through-holes 305 is compressed by vacuum hot pressing to reduce the conductive resistance of the conductive material 306 as described above, and contact with the conductive material 306 by the unevenness of the roughened layer 307. In addition to reducing the electrical connection resistance by increasing the area, it is possible to increase the peel strength by biting into the epoxy layer 304. Also, with this structure, an all-layer IVH structure is possible compared to a method of obtaining the same degree of conduction by plating in a normal through-hole 305, and interlayer conduction is possible anywhere in the inner layer, and the component mounting place in the outer layer Can be selected freely. The conductive material 306 filled in the through-holes 305 has metal particles such as copper mixed in the resin, and the mixing ratio and compression rate are important. Depending on this ratio, connection reliability may be reduced. Of course, the amount of the epoxy resin as the thickness of the epoxy layer 304 is also important. Since the wiring pattern is a protrusion, the compressibility of the conductive material 306 filled in the through hole 305 can be increased and the connection resistance can be reduced, but the amount of epoxy resin in the glass epoxy substrate 301 can be reduced. It is also important to make it moderate. At this time, since the transfer substrate 302 has an aluminum metal substrate 309 having a relatively thick and appropriate elasticity, there is a crack or resin shortage due to the pressure being applied uniformly to the entire surface and partially applying an abnormal pressure. Hard to happen.

  Then, the aluminum is selectively etched, and only the aluminum is etched with a heating solution of, for example, 20 to 70% by volume hydrochloric acid or several to 50% by weight sodium hydroxide as an etching solution that does not attack copper. Thus, the copper of the conductive layer 314 is exposed as shown in FIG.

  Next, as shown in FIG. 20, the exposed conductive layer 314 is spray-etched with a mixed aqueous solution of 2 to 15% sulfuric acid and 1 to 10% hydrogen peroxide or an aqueous solution of chloride or copper chloride to form the conductive layer 314. Etch away. Here, the concentration of the aqueous solution of iron chloride or copper chloride is such that the etching rate is about 1/10 that of an ordinary circuit board. As a result, the conductive layer 314 is extremely thin with a thickness of 3 μm or less and has a uniform thickness, so that only the conductive layer 314 can be removed by etching with good controllability.

  According to the third embodiment described above, since the fine wiring pattern is also embedded in the resin, the wiring pattern is not subjected to lateral mechanical stress, and the pattern collapse does not occur. Because the wiring pattern and the resin surface of the glass epoxy board are completely flush with each other, the lateral displacement that occurs when the wiring pattern is formed into a protruding shape by pressing the bumps or bumps formed on the semiconductor chip connection part by mounting Therefore, it can be surely mounted at a predetermined position.

  In this embodiment, the material such as the glass epoxy substrate is not limited, and a substrate in which an aramid nonwoven fabric is impregnated with an epoxy resin, a film base material coated with an adhesive, or even an alumina green sheet is also possible. . In addition to forming a multilayer substrate on the substrate surface of the present embodiment by a build-up method, the transfer substrate surface may be further multilayered by a permanent resist, a normal photosensitive resist and electroless plating.

  The circuit board and the manufacturing method thereof according to the present invention can be handled easily by reinforcing a wiring pattern whose surface is roughened with a metal substrate, and can eliminate the occurrence of microcracks that directly handle a thin copper foil. In order to form a wiring pattern using a photosensitive resin as a mask, there is no side etching, and a fine pattern can be formed up to the resolution limit of the photosensitive resin pattern, and the wiring layer is etched by making the conductive layer thin. Thus, it is possible to reduce the thinning and deformation of the corners of the pattern, to further reduce the size, and to easily manufacture a fine wiring pattern.

  And, the conductive material filled in the through-holes allows the electrical connection of the wiring pattern on both sides of the insulating substrate to be easily connected at low temperatures, and in particular, the unevenness of the roughening of the wiring pattern is formed to improve the peel strength High electrical connection reliability can be maintained. Furthermore, by embedding a fine conductive pattern, it is possible to prevent falling and deformation due to external stress such as lateral stress on the pattern and to increase the peel strength, that is, using an insulator having different characteristics from the substrate. As a result, heat generated from the mounted semiconductor and copper wiring is well conducted to the surroundings, improving the heat dissipation effect, and reducing the stress on the wiring pattern by reducing the stress on the wiring pattern by bringing the expansion and contraction due to temperature changes closer to copper. Wiring breakage can be eliminated, and the effect of being able to make the peeling strength of the wiring pattern even greater than the roughening of only the wiring pattern surface by embedding the wiring pattern sidewalls by roughening, that is, by forming irregularities. Circuit boards that require fine wiring patterns for mounting semiconductor elements, integrated circuits, and electronic components. Useful in the method of manufacturing the patron.

(A), (b) Sectional drawing which shows the structure of the circuit board in Embodiment 1 of this invention A schematic cross-sectional view showing a method of manufacturing a circuit board according to Embodiment 1 of the present invention Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Model sectional drawing which shows the manufacturing method of the circuit board in Embodiment 2 of this invention Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board A schematic cross-sectional view showing a method of manufacturing a circuit board according to Embodiment 3 of the present invention Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board A cross-sectional view showing a conventional circuit board manufacturing method Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board Cross-sectional view showing the manufacturing method of the circuit board

Explanation of symbols

101, 201, 301, 401 Insulating substrate 102, 302 Metal substrate 103, 203, 303, 403 Glass cloth 104, 204, 304, 404 Epoxy layer 105, 205, 305, 405 Through hole 106, 206, 306, 406 Conductive Conductive material 107, 207, 307, 418 Roughening layer 108, 208, 419 Conductive layer 109, 309, 420 Metal substrate 110, 310, 421 Photosensitive resin 111, 211, 308 Conductive layer 112, 212 Wiring pattern 113, 213 Insulating member 314 Conductive layer

Claims (16)

A circuit board in which a wiring pattern comprising a roughened layer, a conductive layer, and a conductive layer is embedded in at least one surface of an insulating substrate having a through hole filled with a conductive material, and an insulating member is filled between the wiring patterns. . The circuit board according to claim 1, wherein a surface of the wiring pattern and a surface of the filled insulating member are substantially flush with each other. Bonding a metal substrate having a roughened layer formed on the surface of the conductive layer to the insulating substrate from the surface of the roughened layer; removing the metal substrate to expose the conductive layer; and exposing the conductive layer A method for manufacturing a circuit board, comprising: forming a predetermined photosensitive resin pattern on a layer surface; and forming a conductive layer on the exposed conductive layer surface. The circuit board according to claim 1, wherein the thickness of the conductive layer excluding the roughened layer is 5 μm or less. The circuit board according to claim 1, wherein the roughened layer has a thickness of 3 μm or more. The method for manufacturing a circuit board according to claim 3, wherein a through hole is formed in the insulating substrate, and the through hole is filled with a conductive material. The step of removing the photosensitive resin pattern, exposing the surface of the conductive layer on the lower surface of the photosensitive resin pattern, removing the exposed conductive layer to form a wiring pattern, and an insulating member between the wiring patterns The method for manufacturing a circuit board according to claim 3, wherein the circuit board is filled. The step of adhering a metal substrate having a roughened layer formed on the surface of the conductive layer to the insulating substrate from the surface of the roughened layer is heat-pressed at a temperature below the complete curing of the insulating substrate to insulate the roughened layer. The method for manufacturing a circuit board according to claim 7, wherein the circuit board is cured by being embedded in the board. The method for manufacturing a circuit board according to claim 7, wherein an insulating member is filled between the wiring patterns to substantially the same height as the surface of the conductive layer. 8. The circuit board manufacturing method according to claim 7, comprising a step of forming a conductive layer and filling an insulating member between the wiring patterns to a height equal to or higher than the surface of the wiring pattern, and a step of exposing the surface of the wiring pattern. Method. The method of manufacturing a circuit board according to claim 7, wherein an insulating member is filled between the wiring patterns by a quarter or more of the thickness of the conductive layer. The method for manufacturing a circuit board according to claim 7, wherein the filling of the insulating member between the wiring patterns is performed at a portion where the width of the wiring pattern is not more than 10 times the total thickness of the conductive layer and the conductive layer. A step of forming a photosensitive resin pattern on the surface of the conductive layer formed on the metal substrate, a step of forming a conductive layer on the surface of the conductive layer, a step of removing the photosensitive resin pattern, and a conductive layer. A method of manufacturing a circuit board, comprising: a step of selectively removing; a step of adhering a conductive layer side surface of the metal substrate to an insulating substrate; and a step of removing the metal substrate. The method for manufacturing a circuit board according to claim 13, wherein the conductive layer is formed by electroplating by energization from the metal substrate and the conductive layer. 14. The method of manufacturing a circuit board according to claim 13, wherein the conductive layer and the metal substrate are made of a material that can be removed by selective etching, and the metal substrate is removed by etching. The method for manufacturing a circuit board according to claim 13, wherein the thickness of the conductive layer is 3 μm or less.

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