JP2005045187A - Circuit board, method for manufacturing the same, and multi-layered circuit board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit board having an inner via-hole structure which has stable connection resistance and superior high frequency characteristics by making the surface roughness of a conductor pattern layer selectively different depending on the positions. <P>SOLUTION: The circuit board has an electric insulation base material 105, adhesive layers 104a and 104b arranged on both surfaces of the electric insulation base material 105, a via hole penetrating the electric insulation base material 105 and the two adhesive layers 104a and 104b, conductive paste 107 filling the via hole, and conductive pattern layers 102a and 103a which are each buried in at least one of the two adhesive layers 104a and 104b; and a land part 108a1 of the conductive pattern layers 102a and 103a connected to the conductive paste has larger surface roughness than the surface of a wiring pattern 108a2 which is a part of the conductive pattern layer other than the land. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a circuit board for electrically connecting a plurality of layers of wiring by inner via hole connection and a method for manufacturing the circuit board. For example, the present invention relates to a circuit board having a fine wiring pattern and excellent in high-frequency characteristics, and a manufacturing method thereof.

  In recent years, with the miniaturization and high performance of electronic devices, multilayer circuit boards capable of mounting LSI chips and other semiconductor chips with high density have been supplied at low cost not only for industrial use but also in the field of consumer equipment. There has been a strong demand. In such a multilayer circuit board, it is important that a plurality of conductive patterns formed with a fine wiring pitch can be electrically connected with high connection reliability.

  In response to such market demand, instead of the metal plated conductor on the inner wall of the through-hole, which has been the mainstream for interlayer connection of the conventional multilayer circuit board, any electrode of the multilayer circuit board can be placed at any conductive pattern position. A multilayer circuit board employing an inner via hole (IVH) connection method capable of interlayer connection, that is, a so-called all-layer IVH structure resin multilayer board is known (for example, see Patent Document 1).

  In this all-layer IVH structure resin multilayer substrate, it is possible to connect only necessary layers by filling the via holes of the multilayer printed wiring board, and an inner via hole is provided directly under the component land. Therefore, the substrate size can be reduced and high-density mounting can be realized.

  Hereinafter, an example of the manufacturing method of the resin multilayer substrate having the inner via hole structure will be described. 5 and 6 are cross-sectional views showing the method of manufacturing the resin multilayer substrate in the order of steps.

  First, a method for manufacturing a double-sided circuit board that serves as a base of a multilayer board will be described. 5A to 5G are process sectional views of the double-sided circuit board.

  First, as shown in FIG. 5A, a release film 509 such as polyethylene terephthalate (PET) is laminated on both surfaces of an electrically insulating substrate 505 in which an aromatic polyamide fiber is impregnated with a thermosetting epoxy resin.

  Next, as shown in FIG. 5B, a via hole 506 that penetrates all of the release film 509 and the electrically insulating substrate 505 is formed.

  Next, as shown in FIG. 5C, a conductive paste 507 is filled in the via hole 506. As a filling method, an electrically insulating base material 505 having a via hole 506 formed thereon is placed on a table of a screen printing machine (not shown), and the conductive paste 507 is directly printed on the release film 509. To do. At this time, the release film 509 on the upper surface plays a role of a printing mask and a prevention of contamination of the electrically insulating substrate 505.

  Next, as shown in FIG. 5 (d), the release film 509 is peeled off from both surfaces of the electrically insulating substrate 505 to obtain an insulating bonded body 510.

  Then, as shown in FIG. 5 (e), a conductive material 511 such as a copper foil having a thickness of 18 μm and a roughened surface (not shown) is superimposed on both surfaces of the insulating bonded body 510. By pressurizing and heating with a hot press in this state, as shown in FIG. 5 (f), the thickness of the electrically insulating substrate 505 is compressed, and the insulating bonded body 510 and the conductive material 511 are bonded, The conductive materials 511 on both sides are electrically connected by a conductive paste 507 filled in via holes 506 provided at predetermined positions.

  Then, as shown in FIG. 5G, the conductive material 511 on both sides is exposed and developed by a conventional photolithography method, and then chemically etched, whereby the wiring pattern portions 507a2 and 507b2 and the land portions 507a1, A double-sided circuit board 520 on which conductive pattern layers 507a and 507b made of 507b1 or the like are formed is obtained.

  6A to 6C are process cross-sectional views illustrating a conventional method for manufacturing a multilayer circuit board, and show a four-layer circuit board as an example.

  First, as shown in FIG. 6A, an insulating bonded body 510 in which the both sides of the double-sided circuit board 520 obtained in FIG. 5G are filled with the conductive paste 507 obtained in FIG. Further, a conductive material 511 is disposed on both outer sides thereof. Then, after pressurizing and heating by hot press as shown in FIG. 6 (b), the conductive material 511 disposed on both outer sides is patterned to form a four-layer circuit board 530 as shown in FIG. 6 (c). Is obtained. When it is intended to obtain a printed board having four or more layers, a multilayer circuit board can be produced by using the circuit board produced by the above production method instead of the double-sided circuit board and repeating the same steps.

  Further, in order to realize higher-density interlayer connection and high reliability, as a method of further reducing the size of the inner via hole in this all-layer IVH structure resin multilayer substrate, FIG. (D) and the manufacturing method of the double-sided circuit board by a process as shown to Fig.8 (a)-(c) is proposed (for example, refer patent document 2).

  First, as shown in FIG. 7A, conductive pattern layers 702a and 702b are respectively formed on two support base materials 701a and 701b by plating. The conductive pattern layer 702a and the conductive pattern layer 702b are usually formed in different patterns. In addition, the conductive pattern layer 702a is formed with the same thickness and surface roughness within the plane of the support substrate 701a. Similarly, the conductive pattern layer 702b is also formed with an equal thickness and surface roughness within the plane of the support substrate 701b.

  Next, as shown in FIG. 7B, an insulating composite 710 in which adhesive layers 704a and 704b are disposed on both surfaces of an electrically insulating substrate 705 and protective films 703a and 703b are disposed on both outer sides thereof. Prepare.

  Subsequently, as shown in FIG. 7C, via holes 706 penetrating all of the electrically insulating substrate 705, the adhesive layers 704a and 704b, and the protective films 703a and 703b are formed by a laser or the like.

  Next, as shown in FIG. 7D, the via hole 706 is filled with a conductive paste 707. Thereafter, by peeling off the protective films 703a and 703b, the filled conductive paste 707 partially protrudes from the surfaces of the adhesive layers 704a and 704b, as shown in FIG. 8A. In this state, the support base materials 701a and 701b on which the conductive pattern layers 702a and 702b are respectively formed are superposed on the surfaces of the adhesive layers 704a and 704b as shown in FIG. Adhere by pressing.

  FIG. 8B shows a state after heating and pressing. The conductive pattern layers 702a and 702b formed on the support base materials 701a and 701b are buried in the adhesive layers 704a and 704b, respectively. In addition, the conductive paste 707 is compressed in this heating and pressing step. In the conductive paste 707, the conductive components in the conductive paste are firmly bonded by this compression, and the land portions 702a1 and 702b1 of the conductive pattern layers 702a and 702b and the conductive paste 707 Bonding at the interface also becomes strong. By this strong coupling, reliability of connection between the land portions 702a1 and 702b1 and the conductive paste 707 is ensured.

Next, the support base materials 701a and 701b are removed leaving the conductive pattern layers 702a and 702b. 8C, the land portions 702a1 and 702b1 and the wiring pattern portions 702a2 and 702b2 of the conductive pattern layers 702a and 702b embedded in the adhesive layers 704a and 704b are exposed on both surfaces, respectively. Thus, the double-sided circuit board is completed.
JP-A-6-268345 (for example, page 6-7, FIG. 7) JP 2000-277889 A (for example, page 3-5, FIG. 3)

  However, in the manufacturing method described in Patent Document 1, it is difficult to form a fine pattern. In the manufacturing method in Patent Document 1, a copper foil as a conductive material is pressed and applied to an electrically insulating base material in which an aromatic polyamide fiber is impregnated with a thermosetting epoxy resin. A method of forming a conductive pattern layer by etching is employed. In order to maintain the adhesion between the copper foil and the electrically insulating substrate and to ensure the connection stability between the land of the conductive paste and the conductive pattern layer, the surface of the copper foil is roughened. Therefore, it is necessary to make the copper foil thicker, for example, by forming the roughened layer in a particulate form. Since the copper foil is thus thick, it is difficult to form a fine pattern.

  In manufacturing such a circuit board, a conductive pattern layer is formed by chemical etching using a copper foil having a thickness of about 12 to 35 μm and a surface roughness (Ra) of 2.0 to 3.0 μm. . In this method, in order to mass-produce a conductive pattern layer having a line width of 50 μm or less, wiring short-circuiting or wiring thinning is likely to occur, and it is difficult to secure a high yield. Further, regarding the surface roughness, since the rough skin is large, there arises a problem that transmission loss increases in high frequency characteristics. Also, the surface roughness of the copper foil is usually in-plane uniform specification, and reducing the surface roughness is advantageous for fine pattern formation, but conversely, securing the connection stability is a problem.

  The manufacturing method in Patent Document 2 is an effective method for realizing interlayer connection by a fine pattern. Like the manufacturing method in Patent Document 1, the thickness of the conductive pattern layer and the side in contact with the conductive paste are used. The surface roughness of the conductive pattern layer is substantially uniform in the plane. The land portion needs to have a surface roughness to ensure connection reliability. Since the wiring pattern portion is also formed at the same time, the land portion has the same surface roughness as the wiring pattern portion. However, in the future, when a circuit board with stable connection reliability with fine patterns and excellent high-frequency characteristics is required, there is a problem that unevenness of the wiring pattern portion of the conductive pattern layer affects transmission loss. Come.

  In view of the above conventional problems, an object of the present invention is to provide a circuit board, a method for manufacturing the circuit board, and a multilayer circuit board having stable interlayer connection and excellent high frequency characteristics.

In order to solve the above-described problem, the first aspect of the present invention provides:
Conductive patterns are formed on the surfaces of the two support substrates so that the roughness of the surface of the conductive pattern layer formed on at least one of the two support substrates varies depending on the region. Forming a layer;
Forming a via hole penetrating the electrically insulating substrate having an adhesive layer on both sides; and
Filling the via hole with a conductive paste;
The two supporting substrates are superimposed on both surfaces of the electrically insulating substrate in which the via hole is filled with a conductive paste so that the conductive pattern layer faces the adhesive layer, Pressure bonding so that a pattern layer is embedded in the adhesive layer, and connecting a part of the conductive pattern of the conductive pattern layer and the conductive paste;
And the step of removing the support substrate leaving the conductive pattern layer,
The surface roughness of the one part conductive pattern connected with the said conductive paste is a manufacturing method of a circuit board rougher than the surface of the other said conductive pattern.

The second aspect of the present invention
Of the steps of forming a conductive pattern layer on the surfaces of the two supporting substrates, the step of forming a conductive pattern layer on the surface of the at least one supporting substrate,
Forming a first conductive pattern layer on the surface of the at least one supporting substrate;
Forming a second conductive pattern layer on a portion of the first conductive pattern layer to be connected to the conductive paste;
It is a manufacturing method of the circuit board of the 1st present invention which performs the roughening processing of the surface of the 2nd conductive pattern layer.

The third aspect of the present invention provides
Of the steps of forming a conductive pattern layer on the surfaces of the two supporting substrates, the step of forming a conductive pattern layer on the surface of the at least one supporting substrate,
Forming a first conductive pattern layer on the surface of the at least one supporting substrate;
It is a manufacturing method of the circuit board of the 1st present invention which polishes the surface of parts other than the part which should be connected to the conductive paste among the 1st conductive pattern layers.

The fourth invention relates to
The electrical insulating substrate is at least one material selected from a polyimide film, a liquid crystal polymer film, and an aramid film, and has an adhesive layer on both sides, and the circuit board according to any one of the first to third aspects of the present invention. It is a manufacturing method.

The fifth aspect of the present invention relates to
The adhesive layer is the method for manufacturing a circuit board according to any one of the first to fourth aspects, wherein the adhesive layer is formed of a thermosetting organic resin.

The sixth invention relates to
In the method for manufacturing a circuit board according to any one of the first to fifth aspects of the present invention, the conductive material included in the conductive paste includes at least one metal powder selected from the group consisting of Cu, Ag, and alloys thereof. is there.

The seventh invention relates to
The step of removing the support substrate leaving the conductive pattern layer,
The method for producing a circuit board according to any one of the first to sixth aspects of the present invention, comprising a step of selectively dissolving and removing the support base material by chemical etching.

The eighth invention relates to
An electrically insulating substrate;
An adhesive layer disposed on both surfaces of the electrically insulating substrate;
A via hole penetrating the electrically insulating substrate and the two adhesive layers;
A conductive paste filled in the via hole;
A conductive pattern layer embedded in at least one of the two adhesive layers;
The roughness of the surface of the land part which is a part connected to the conductive paste in the conductive pattern layer is greater than the surface of the wiring pattern part which is a part other than the land part in the conductive pattern layer. It is also a rough circuit board.

The ninth invention relates to
The roughness of the surface of the portion embedded in the adhesive layer of the wiring pattern portion is the circuit board according to the eighth aspect of the present invention, which differs depending on the pattern size of the wiring pattern portion.

The tenth aspect of the present invention is
In the circuit board of the eighth or ninth aspect of the present invention, the land portion has a thickness greater than that of the wiring pattern portion.

The eleventh aspect of the present invention is
A multilayer circuit board comprising at least one circuit board according to any of the eighth to tenth aspects of the present invention.

  According to the present invention, it is possible to provide a circuit board, a method for manufacturing the circuit board, and a multilayer circuit board having stable interlayer connection and excellent high frequency characteristics.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
A circuit board and a manufacturing method thereof according to Embodiment 1 of the present invention will be described with reference to FIGS.

  FIG. 1 is a cross-sectional view showing a configuration of a circuit board according to the first embodiment.

  The circuit board according to the first embodiment has adhesive layers 104 a and 104 b on both surfaces of the electrically insulating base material 105. The first conductive pattern layers 102a and 102b are embedded in the adhesive layers 104a and 104b. The second conductive pattern layers 103a and 103b are respectively formed on the surfaces of the land portions 108a1 and 108b1 on the electrically insulating substrate 105 side of the first conductive pattern layers 102a and 102b. The two layers are embedded in the adhesive layers 104a and 104b.

  Then, the surface of the second conductive pattern layers 103a and 103b on the side of the land portions 108a1 and 108b1 in contact with the conductive paste 107 is subjected to a roughening process. Therefore, the land portions 108a1 and 108b1 and the wiring pattern portions 108a2 and 108b2 are double-sided circuit boards having different surface roughness and thickness.

  A conductive paste 107 is filled in a via hole provided through the electrically insulating substrate 105 and the adhesive layers 104a and 104b. Through the conductive paste 107, the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b are electrically connected.

  Next, the manufacturing process of the circuit board according to the first embodiment will be described with reference to FIGS.

  FIG. 2 is a cross-sectional view of the circuit board in the manufacturing process of the circuit board according to the first embodiment.

  First, as shown in FIG. 2A, support base materials 101a and 101b in which land patterns 102a1 and 102b1 and wiring patterns 102a2 and 102b2 are formed on first conductive pattern layers 102a and 102b, respectively, are prepared. . An example of such a material is a copper foil with an aluminum carrier. In this method, as the supporting base materials 101a and 101b, a zincate treatment is performed on one surface of an aluminum foil having a thickness of about 40 μm, and then copper having a thickness of about 2 μm to 20 μm is deposited by electroplating to obtain a surface roughness (Ra) of 0. The surface is roughened to about 3 to 0.7 μm.

  In the first embodiment, as support substrates 101a and 101b, an aluminum carrier having a surface roughness (Ra) of about 0.3 μm and a small surface roughness is obtained by plating a copper foil of 5 μm on an aluminum foil of 40 μm. Copper foil was used. Then, photosensitive resist coating, resist baking, mask exposure, development and the like were performed. Thereafter, using a sulfuric acid-hydrogen peroxide solution capable of selectively etching copper and aluminum, the copper portion is selectively etched so that desired land patterns 102a1 and 102b1 and wiring patterns 102a2 and 102b2 remain. One conductive pattern layer 102a, 102b was patterned.

  It is also important to make the support base materials 101a and 101b thin in order to facilitate removal by chemical etching. However, even when the thickness is about 40 μm, wrinkles and bends are likely to occur depending on the way of handling. Therefore, as a reinforcing agent for the supporting base materials 101a and 101b, a foam release having an appropriate strength and an acid and alkali resistance polyethylene terephthalate film (PET) foamed at about 140 ° C. A sheet (manufactured by Nitto Denko Corporation, trade name is Riva Alpha) was used.

  Note that the first conductive pattern layers 102a and 102b can be formed on the entire surfaces of the supporting base materials 101a and 101b by using a vacuum process such as vapor deposition or sputtering. Further, when the supporting base materials 101a and 101b are metal plates, it is advantageous in terms of productivity to use electrolytic plating. In addition, pattern plating can also be used as a formation method of the 1st electroconductive pattern layers 102a and 102b on the support base materials 101a and 101b.

  Next, as shown in FIGS. 2B and 2C, only the land patterns 102a1 and 102b1 are selected from the first conductive pattern layers 102a and 102b formed on the support base materials 101a and 101b. Photosensitive resist coating, resist baking, mask exposure, development, and the like were performed so that plating could be formed. Thereafter, plating, roughening treatment of the plating surface, and resist peeling were performed to form land patterns 103a1 and 103b1 on the second conductive pattern layers 103a and 103b.

  Here, as a surface pretreatment for ensuring the adhesion strength of the plating to the land patterns 102a1 and 102b1, a soft etching treatment was performed with a sodium persulfate-sulfuric acid solution for about 30 seconds to clean the surface.

  Further, as the material of the second conductive pattern layers 103a and 103b, the same copper as that of the first conductive pattern layers 102a and 102b was formed by electroplating. The plating thickness was set to about 4 μm, and plating was performed after the current density was optimized so as not to cause variations in thickness.

  Furthermore, in order to improve the adhesiveness with the conductive paste 107, the surface of the plating is roughened, and the second conductive having irregularities with a surface roughness (Ra) of about 0.5 to 1.0 μm. Pattern layers 103a and 103b were formed. As a method for forming the unevenness, there are used a method of etching the surface, a method of forming bumpy particles by plating, and a method of mechanical roughening.

  The thickness of the two conductive pattern layers composed of the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b is preferably in the range of 4 to 12 μm, particularly preferably 5-9 μm. If the conductive pattern layer is thin, it is advantageous for fine pattern formation, but good conductivity cannot be obtained. If the thickness of the two conductive pattern layers is less than 4 μm, good conductivity may not be obtained. If the thickness is more than 12 μm, it is difficult to form a fine pattern.

  Next, as shown in FIG. 2D, a via hole 106 penetrating all of the electrically insulating substrate 105, the adhesive layers 104a and 104b, and the protective films 109a and 109b is formed. For the formation of the via hole 106, drilling, punching, laser processing, or the like is used. When the via hole 106 becomes minute or productivity is required, laser processing is most suitable.

  Subsequently, as shown in FIG. 2E, after filling the via hole 106 with the conductive paste 107, the protective films 109a and 109b are peeled off. When the conductive paste 107 is used as the conductive material, the resin in the conductive paste is discharged when the conductive paste 107 is compressed, and the conductive component density in the conductive paste 107 is substantially improved, so that the conductive paste 107 is preferable because it becomes dense and stable electrical connection is realized. Further, since the conductive paste 107 can be filled by printing, there is an advantage that the productivity is very excellent.

  Note that the protective films 109 a and 109 b have a function as a mask in the process of printing the conductive paste 107. In addition, the volume of the conductive paste 107 to be filled is increased by the thickness of the protective films 109a and 109b as compared with the case where such a protective film is not used. There is an effect that a sufficient amount of conductive paste is filled in the hole 106.

  In the above description, the via hole 106 is formed and the conductive paste 107 is filled, but the conductor may be directly embedded in the electrically insulating substrate 105. In this case, as the conductor, a metal wire, a conductive paste cured to some extent, or the like is used.

  Next, as shown in FIG. 2 (f), the first conductive material is formed on both surfaces of the electrically insulating substrate 105 in a state where the protective films 109a and 109b are peeled and the adhesive layers 104a and 104b are exposed on the surface. Support base materials 101a and 101b on which pattern layers 102a and 102b and second conductive pattern layers 103a and 103b are formed are disposed.

And as shown in FIG.2 (g), these are adhere | attached by heating and pressurizing with a vacuum hot press. The pressurizing force of this vacuum hot press was 1470-1960 × 10 ⁴ Pa (150-200 kg / cm ² ), the temperature was 200 ° C., and heating was performed for 1 hour. By this pressurization and heating, the adhesive layers 104a and 104b flow, and the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b are embedded in the adhesive layers 104a and 104b. As a result, the conductive paste 107 in the via hole 106 is pressurized and the conductive filler in the conductive paste 107 is densified, so that a good and stable electrical connection can be obtained.

  As shown in FIG. 2 (h), by selectively removing the support base materials 101a and 101b while leaving the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b made of a copper material. Thus, the double-sided circuit board 110 is obtained. At this time, the aluminum foil of the supporting base materials 101a and 101b can be easily obtained by heating an etching solution of hydrochloric acid: pure water = 1: 1 or an etching solution of 5 to 7% by weight of sodium hydroxide to about 70 ° C. It is possible to select and remove.

  The thicknesses of the adhesive layers 104a and 104b are set according to the volume of the conductive pattern layer so as to have a predetermined thickness. In addition, it is reliable that the predetermined thickness is thin enough that the second conductive pattern layers 103a and 103b do not deviate from the conductive paste 107 due to thermal expansion and humidity expansion of the adhesive layers 104a and 104b. It is preferable from the viewpoint of realizing high connection.

  Since the surface of the second conductive pattern layers 103a and 103b formed in the land portion is roughened in the circuit board according to the first embodiment manufactured in this way, stable connection reliability is ensured. can get.

  In addition, strong anchoring can be maintained by an anchor effect in which conductive patterns are embedded in the adhesive layers 104a and 104b formed on both surfaces of the electrically insulating substrate 105. Furthermore, if a thermosetting organic resin is used as the adhesive layers 104a and 104b, the stability with respect to the reliability test can be improved. Since the thermosetting adhesive layers 104a and 104b are not softened at a high temperature, the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b are bonded to the electrically insulating substrate 105. The condition does not worsen at higher temperatures. Further, when the temperature is returned to the room temperature, the thermosetting adhesive layers 104a and 104b are formed by applying the first conductive pattern layers 102a and 102b and the second conductive pattern layers 103a and 103b to the conductive paste 107. Since the action of fixing in the compressed state is maintained, a reliable connection can be obtained.

(Embodiment 2)
A circuit board and a manufacturing method thereof according to Embodiment 2 of the present invention will be described with reference to FIGS. In addition, about the structure similar to the structure demonstrated in Embodiment 1, the code | symbol used in Embodiment 1 is appended, and the detailed description is abbreviate | omitted.

  FIG. 3 is a cross-sectional view showing the configuration of the circuit board according to the second embodiment.

  The circuit board according to the second embodiment has adhesive layers 104 a and 104 b on both surfaces of the electrically insulating base material 105. The first conductive pattern layers 202a and 202b are embedded in the adhesive layers 104a and 104b. The surface roughness of the first conductive pattern layers 202a and 202b on the side of the electrically insulating substrate 105 of the wiring pattern portions 208a2 and 208b2 is chemically polished to reduce the surface roughness. Accordingly, the wiring pattern portions 208a2 and 208b2 and the land portions 208a1 and 208b1 are double-sided circuit boards having different surface roughnesses.

  A conductive paste 107 is filled in a via hole provided through the electrically insulating substrate 105 and the adhesive layers 104a and 104b. The first conductive pattern layers 202a and 202b are electrically connected via the conductive paste 107. With this configuration, the surface roughness of the wiring pattern portions 208a2 and 208b2 is reduced, and transmission loss can be reduced.

  Next, the manufacturing process of the circuit board according to the second embodiment will be described with reference to FIGS.

  FIG. 4 is a cross-sectional view of the circuit board in the manufacturing process of the circuit board according to the second embodiment. Note that detailed description of steps similar to those described in Embodiment 1 is omitted.

  First, as shown in FIG. 4A, support base materials 201a and 201b in which land patterns 202a1 and 202b1 and wiring patterns 202a2 and 202b2 are formed on the first conductive pattern layers 202a and 202b, respectively, are prepared. . An example of such a material is a copper foil with an aluminum carrier. In the second embodiment, as support base materials 201a and 201b, aluminum having a surface roughness (Ra) of about 0.7 μm and a relatively large surface roughness obtained by plating a 40 μm thick aluminum foil with a thickness of 9 μm. A copper foil with a carrier was used. By increasing the surface roughness, the anchor effect is advantageous in connection reliability with the conductive paste.

  Next, a photosensitive resist coating is applied so that only the wiring patterns 202a2 and 202b2 of the first conductive pattern layers 202a and 202b formed on the support base materials 201a and 201b are exposed and can be selectively chemically polished. Then, resist baking, mask exposure, development and the like were performed. After that, as shown in FIG. 4B, the surface irregularities of the wiring patterns 202a2 and 202b2 were processed by chemical polishing so that the surface roughness (Ra) became about 0.3 μm. Further, by removing the resist, it is possible to obtain the first conductive pattern layers 202a and 202b in which only the surfaces of the wiring patterns 202a2 and 202b2 have a small surface roughness.

  As a chemical polishing method for the surfaces of the wiring patterns 202a2 and 202b2, a smooth surface can be obtained by lightly soft etching with a sulfuric acid-hydrogen peroxide-based polishing liquid. As a method for reducing the unevenness on the surface of the wiring patterns 202a2 and 202b2, electrolytic polishing, mechanical submerged brush polishing, and the like are also used.

  Next, as shown in FIGS. 4C to 4E, adhesive layers 104a and 104b are formed on both surfaces of the electrically insulating substrate 105, and protective films 109a and 109b are formed on the outer sides thereof. Then, via holes 106 penetrating these are formed, and the conductive paste 107 is filled. Thereafter, the protective films 109a and 109b are peeled off.

  Next, as shown in FIG. 4F, the support base material 201a, 201b on which the first conductive pattern layers 202a, 202b are formed is bonded to the adhesive layer 104a, formed on the electrically insulating base material 105, Align with the surface of 104b. And these are adhered as shown in FIG.4 (g) by heat-pressing with a vacuum hot press. Then, the double-sided circuit board 120 is obtained by selectively removing the support base materials 201a and 201b while leaving the first conductive pattern layers 202a and 202b made of a copper material.

  The circuit board according to the second embodiment is a circuit board with low transmission loss and excellent high frequency characteristics because the surface roughness of the wiring patterns 202a2 and 202b2 is reduced by chemical polishing.

  As described above, by selectively varying the surface roughness of the conductive pattern layer depending on the part, a circuit board having excellent connection stability, pattern accuracy, peel strength, high frequency characteristics, and the like can be realized.

  In addition, strong anchoring can be maintained by an anchor effect in which conductive patterns are embedded in the adhesive layers 104a and 104b formed on both surfaces of the electrically insulating substrate 105. Furthermore, if a thermosetting organic resin is used as the adhesive layers 104a and 104b, the stability with respect to the reliability test can be improved. Since the thermosetting adhesive layers 104a and 104b are not softened at a high temperature, the bonding state between the first conductive pattern layers 202a and 202b and the electrically insulating substrate 105 does not deteriorate even at a high temperature. Further, when the temperature is returned to room temperature, the thermosetting adhesive layers 104a and 104b continue to retain the action of fixing the first conductive pattern layers 202a and 202b in a compressed state to the conductive paste 107. A reliable connection is obtained.

  In the circuit board manufacturing method of each embodiment, if a composite of fiber and thermosetting resin is used as the electrically insulating base material 105, it is easy to impart rigidity to the completed printed wiring board. Yes, it is excellent in mountability of electronic circuit components. In particular, those using glass as a fiber and using an epoxy resin as a thermosetting resin are generally widespread as glass epoxy materials and are advantageous in price. In addition, those using an aramid fiber as a fiber and an epoxy resin as a thermosetting resin are advantageous in that they are excellent in laser processability and easy to produce.

  In addition, when an organic resin film is used as the electrically insulating base material 105, the thickness of the circuit board can be reduced and flexibility can be imparted. As the organic resin film, an aramid film, a polyimide film, a liquid crystal polymer film, or the like is used. If it is an organic resin film, the thin thing about 10 micrometers thick can be obtained easily, and a thin wiring board is realizable. When the organic resin film is thin to this extent, it is possible to connect wiring with an inner via hole having a small diameter, and as a result, a high-density wiring board can be realized. In addition, these materials have high heat resistance and high rigidity, and can have properties suitable for semiconductor mounting.

  Moreover, in each embodiment, you may make it change the surface roughness of the wiring pattern part among electroconductive pattern layers according to the pattern dimension. By selecting or forming a surface roughness that satisfies the required wiring pattern dimensions, the wiring pattern dimensions can be formed with high accuracy.

  Further, the surface roughness (Ra) of the wiring pattern portion of the conductive pattern layer is 0.3 μm in the circuit board of each embodiment, but is preferably in the range of 0.1 to 0.5 μm. Especially preferably, it is the range of 0.1-0.3 micrometer. By setting the surface of the wiring pattern portion to such a surface roughness, a circuit board having excellent high frequency characteristics can be obtained.

  In addition, the conductive paste 107 preferably contains at least one metal powder selected from the group consisting of Cu, Ag, and alloys thereof as a conductive material. By including these, an interlayer connection with a very good connection resistance can be obtained.

  As described above, it is possible to manufacture a substrate having excellent connection reliability and high frequency characteristics by the circuit board manufacturing method of each embodiment. In addition, by using at least one circuit board according to each embodiment, it is possible to provide a multilayer circuit board having a more stable interlayer connection than the conventional one and having excellent high frequency characteristics.

  The method for manufacturing a circuit board, the circuit board, and the multilayer circuit board according to the present invention have excellent effects in stable interlayer connection and high frequency characteristics, and electrically connect a plurality of layers of wiring by inner via hole connection, for example, It is useful as a circuit board having a fine wiring pattern and excellent in high frequency characteristics, a method for manufacturing the circuit board, and the like.

Sectional drawing which shows the structure of the circuit board in Embodiment 1 of this invention Sectional drawing of the circuit board which shows the process of the manufacturing method of the circuit board in Embodiment 1 of this invention Sectional drawing which shows the structure of the circuit board in Embodiment 2 of this invention Sectional drawing of the circuit board which shows the process of the manufacturing method of the circuit board in Embodiment 2 of this invention Sectional drawing of the circuit board which shows the process of the manufacturing method of the conventional circuit board Sectional drawing of the circuit board which shows the process of the manufacturing method of the conventional multilayer circuit board Sectional drawing of the circuit board which shows the process of the manufacturing method of the conventional all-layer IVH structure resin multilayer substrate Sectional drawing of the circuit board which shows the process of the manufacturing method of the conventional all-layer IVH structure resin multilayer substrate

Explanation of symbols

101a, 101b Support base material 102a, 102b First conductive pattern layer 103a, 103b Second conductive pattern layer 104a, 104b Adhesive layer 105, 505 Electrical insulating base material 106, 506, 706 Via hole 107, 507 , 707 Conductive paste 102a1, 102b1 Land pattern 102a2, 102b2 Wiring pattern 108a2, 108b2 Wiring pattern part 108a1, 108b1 Land part 109a, 109b Protective film 110, 120 Double-sided circuit board 530 Four-layer circuit board

Claims (11)

Conductive patterns are formed on the surfaces of the two support substrates so that the roughness of the surface of the conductive pattern layer formed on at least one of the two support substrates varies depending on the region. Forming a layer;
Forming a via hole penetrating the electrically insulating substrate having an adhesive layer on both sides; and
Filling the via hole with a conductive paste;
The two supporting substrates are superimposed on both surfaces of the electrically insulating substrate in which the via hole is filled with a conductive paste so that the conductive pattern layer faces the adhesive layer, Pressure bonding so that a pattern layer is embedded in the adhesive layer, and connecting a part of the conductive pattern of the conductive pattern layer and the conductive paste;
And the step of removing the support substrate leaving the conductive pattern layer,
The method of manufacturing a circuit board, wherein a surface roughness of the part of the conductive pattern connected to the conductive paste is rougher than a surface of the other conductive pattern. Of the steps of forming a conductive pattern layer on the surfaces of the two supporting substrates, the step of forming a conductive pattern layer on the surface of the at least one supporting substrate,
Forming a first conductive pattern layer on the surface of the at least one supporting substrate;
Forming a second conductive pattern layer on a portion of the first conductive pattern layer to be connected to the conductive paste;
The method for manufacturing a circuit board according to claim 1, wherein the surface of the second conductive pattern layer is roughened. Of the steps of forming a conductive pattern layer on the surfaces of the two supporting substrates, the step of forming a conductive pattern layer on the surface of the at least one supporting substrate,
Forming a first conductive pattern layer on the surface of the at least one supporting substrate;
The method for manufacturing a circuit board according to claim 1, wherein the surface of a portion other than the portion to be connected to the conductive paste in the first conductive pattern layer is polished.   4. The circuit board according to claim 1, wherein the electrically insulating substrate is at least one material selected from a polyimide film, a liquid crystal polymer film, and an aramid film, and has an adhesive layer on both sides. Production method.   The circuit board manufacturing method according to claim 1, wherein the adhesive layer is formed of a thermosetting organic resin.   The circuit board manufacturing method according to claim 1, wherein the conductive material included in the conductive paste includes at least one metal powder selected from the group consisting of Cu, Ag, and alloys thereof. The step of removing the support substrate leaving the conductive pattern layer,
The method for manufacturing a circuit board according to claim 1, comprising a step of selectively dissolving and removing the support base material by chemical etching. An electrically insulating substrate;
An adhesive layer disposed on both surfaces of the electrically insulating substrate;
A via hole penetrating the electrically insulating substrate and the two adhesive layers;
A conductive paste filled in the via hole;
A conductive pattern layer embedded in at least one of the two adhesive layers;
The roughness of the surface of the land part which is a part connected to the conductive paste in the conductive pattern layer is greater than the surface of the wiring pattern part which is a part other than the land part in the conductive pattern layer. Rough, circuit board.   The circuit board according to claim 8, wherein the roughness of the surface of the portion embedded in the adhesive layer of the wiring pattern portion varies depending on the pattern dimension of the wiring pattern portion.   The circuit board according to claim 8, wherein a thickness of the land portion is thicker than a thickness of the wiring pattern portion. A multilayer circuit board comprising at least one circuit board according to claim 8.

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