JP2001308521A - Method for manufacturing multilayered circuit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayered circuit board which is excellent in lamination accuracy and productivity. SOLUTION: A releasing film 309 on one surface of an insulative composite body 310 comprised of an insulative base material 306, an adhesive agent 308, and a releasing film 309 is peeled off, and it is is overlapped with a circuit pattern 307a so that it may be brought into contact with it. Then they are pressurized and heated, and are temporarily fixed and laminated for fixation. After a position corresponding to the circuit pattern is recognized, a non-through hole 303 is made, and it is filled with a conductive paste 302. Then, the releasing film 309 is peeled off, a metallic foil 304 provided with an opening 311 is positioned and overlapped, and it is temporarily fixed and laminated for fixation. Furthermore, an alignment mark 307b of a supporting base material 320 and an exposure mask are positioned, and a pattern is formed. After the steps are repeated, the board is pressurized and heated at a temperature for curing the adhesive agent 308 when a metallic foil is laminated as an outermost layer, so that a circuit pattern 337 is formed. Finally, the supporting base material is selectively removed to leave a circuit pattern, thereby obtaining a multilayered circuit board.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a multilayer circuit board in which a plurality of circuit patterns are electrically connected by inner via hole connection.

[0002]

2. Description of the Related Art In recent years, with the miniaturization and high density of electronic devices, LSIs have been used not only in industrial applications but also in consumer applications.
It is strongly desired that a multilayer circuit board on which semiconductor chips such as those described above can be mounted at high density be supplied at low cost. In such a multilayer circuit board, it is important that a finer wiring pitch can be easily produced at a high yield in order to achieve the purpose of miniaturization by increasing the mounting density. In response to such market demands, instead of using metal-plated conductors with built-in through-holes, which have become the mainstream of interlayer connections in conventional multilayer circuit boards, any electrode of the multilayer circuit board can be placed at any wiring pattern position. Connectable inner via hole (IV
H) A multilayer circuit board employing a connection method, that is, all layers IV
An H-structure resin multilayer circuit board is known (see, for example, Japanese Patent Application Laid-Open No. 6-268345).

In this all-layer IVH structure resin multilayer circuit board, only necessary layers can be connected by filling a conductive paste in a via hole of the multilayer circuit board, and an inner via hole is provided directly below a component land. Therefore, a reduction in the size of the substrate and high-density mounting can be realized.

Here, a method for manufacturing a four-layer substrate will be described. First, a method for manufacturing a double-sided circuit board serving as a base of a multilayer board will be described. 2A to 2G are process cross-sectional views of a double-sided circuit board.

First, as shown in FIG. 2 (a), a thickness (t1 = about 150 μm) obtained by impregnating an aromatic polyamide fiber with a thermosetting epoxy resin is approximately 20 μm thick on both sides of an insulating substrate 101. A release film 105 such as terephthalate (PET) is laminated. Next, FIG.
Release film 105 and insulating substrate 1 as shown in FIG.
01 are formed. next,
As shown in FIG.
Fill 2 As a filling method, the insulating base material 101 having the through-holes 103 is placed on a table of a screen printing machine (not shown), and the conductive paste 102 is directly printed on the release film 105. At this time, the release film 105 on the upper surface plays a role of a printing mask and a role of preventing contamination of the insulating base material 101.

Next, as shown in FIG. 2D, the release film 105 is peeled off from both surfaces of the insulating base material 101 to obtain an insulating joined body 106. Then, as shown in FIG. 2E, an 18 μm-thick metal foil 104 made of Cu or the like is overlaid on both surfaces of the insulating joint body 106. Pressing and heating with a hot press in this state causes the insulating base material 1 to be heated as shown in FIG.
01 is compressed (t2 = approximately 100 μm), the insulating joint 106 and the metal foil 104 are bonded together, and the metal foils 104 on both surfaces are electrically conductive by the conductive paste 102 filled in the through holes 103 provided at predetermined positions. Connected.

2 (g), the metal foils 104 on both sides are selectively etched to form circuit patterns 107a and 107.
As a result, the double-sided circuit board 110 is obtained.

FIGS. 3A to 3E are cross-sectional views showing steps of a conventional method for manufacturing a multilayer circuit board, and show a four-layer board as an example. First, as shown in FIG.
Circuit patterns 107 manufactured according to (a) to (g)
a, a double-sided circuit board 110 having an insulating joint body 206 a having a through-hole filled with a conductive paste 202.
06b (the insulating joints 206a and 206b are manufactured by the steps (a) to (d) of FIG. 2).

The work stage 209 has a double-sided circuit board 11
0, and the positioning holes 211 are positioned and overlapped by image recognition or the like in the order of the insulating joint body 206a, and the tip provided above and below a predetermined position has a 10 mm × 6 mm tip at 300 to 350 ° C.
A pressure of about 5 kg / cm ² is applied for 3 seconds by the heater chip 208 heated to a temperature of 3 mm to cure the resin component of the insulating joint body 206 a and adhere to the double-sided circuit board 110.

Next, as shown in FIG. 3 (b), the double-sided circuit board 110 to which the insulating joint body 206a is bonded and fixed is taken out of the work stage 209, and is set on the work stage 209 with the double-sided circuit board 110 facing upward. Then, after positioning and recognizing the insulating joint body 206b by image recognition or the like and positioning the insulating joint body 206b, the heater component 208 presses and heats to cure the resin component of the insulating joint body 206b and adhere to the double-sided circuit board 110. .

Next, as shown in FIG. 3 (c), the double-sided circuit board 110 to which the insulating joints 206a and 206b are adhered and fixed on both sides is taken out from the work stage 209, and the metal foil 204 is overlaid on both sides. As shown in FIG. 3 (d), after the metal foil 204 is overlaid on both sides, the entire surface is pressurized and heated at a pressure of 50 kg / cm ^{2 at} a temperature of 200 ° C. for 1 hour by a hot press, so that the insulating bonded body 206a While the thickness of 206b is compressed, the double-sided circuit board 110 and the metal foil 204 are bonded by the insulating joints 206a and 206b, and the circuit patterns 107a and 107b are connected to the metal foil 204 and the inner via hole by the conductive paste 202.

Then, as shown in FIG. 3E, the metal foils 204 on both sides are selectively etched to form a circuit pattern 2.
By forming the layers 07a and 207b, a four-layer substrate can be obtained. If a multilayer circuit board having four or more layers is to be obtained, the same steps as described above are repeated using the multilayer circuit board manufactured by the above manufacturing method instead of the double-sided circuit board.

[0013]

However, in the above-mentioned conventional method for manufacturing a multilayer circuit board, in order to meet the demands for further increasing the pattern density, reducing the diameter of vias, and increasing the number of layers, the use of an insulating base material and a metal foil will increase. By repeating the process of curing the epoxy resin impregnated in the insulating base material and the epoxy resin in the conductive paste by applying pressure and heating to the adhesive with a hot press, and making an electrical connection with the copper foil. The pressing process takes 2 to 3 hours for a press cycle such as heating, curing temperature keeping, cooling, etc., and the longer the number of layers, the longer the lead time. There has been a problem that the electrical connection becomes unstable due to a dimensional deviation caused by a difference in the thermal expansion coefficients of the constituent materials, and reliability is reduced.

The present invention has been made to solve the above-mentioned conventional problems, and provides a method of manufacturing a multilayer circuit board which can realize a multilayer circuit board having high lamination accuracy and excellent productivity. .

[0015]

In order to achieve the above object, a method for manufacturing a multilayer circuit board according to the present invention can be realized by a method comprising the following steps.

A. A step of forming a desired circuit pattern and an alignment mark made of a conductor on the surface of the supporting substrate;

B. An adhesive layer is formed on both sides of the insulating base material, and the release layer on one side of the insulating base composite body further having a release film laminated on the adhesive layer is peeled off to form the adhesive layer and the adhesive layer. A step of superimposing the circuit pattern on the supporting base material so as to be in contact with the circuit pattern, and applying pressure and heating at a temperature lower than the curing temperature of the adhesive layer to temporarily fix and fix the adhesive layer.

C. A step of recognizing a circuit pattern on an insulating base material provided with the release film at a place where an electrical connection is to be made, and irradiating a predetermined position with a laser to form a non-through hole reaching the surface of the circuit pattern;

D. Filling a conductive paste into the non-through holes.

E. A step of positioning a metal foil on the support substrate after the release film is peeled off, and applying pressure and heating at a temperature lower than the curing temperature of the adhesive layer to temporarily fix and fix the laminate.

F. A step of positioning an exposure mask and an alignment mark formed on the supporting base material, and forming a desired circuit pattern and a next layer alignment mark on the metal foil.

G. A step of forming a circuit pattern by pressurizing and heating at a curing temperature of the adhesive layer after laminating a metal foil when forming a circuit pattern of a required number of outermost layers after repeating steps b to f. h. A step of selectively removing the support substrate while leaving a circuit pattern of the support substrate.

As described above, the temporary fixing lamination and fixing are sequentially repeated by pressurizing and heating at a temperature lower than the curing temperature of the adhesive layer of the insulating base material, and the hot pressing is performed at the curing temperature of the adhesive layer when forming the required number of outermost layers. By doing so, a multilayer circuit board electrically and mechanically joined can be realized.

It is preferable that the means for temporarily fixing and laminating the insulating film and the metal foil by pressurizing and heating is at least one means selected from the group consisting of laminating, vacuum hot pressing and autoclave.

Further, the insulating base material is a polyimide film,
It is preferably at least one material selected from the group consisting of a liquid crystal polymer film and an aramid film. By selecting a film material having high heat resistance and high rigidity, properties suitable for semiconductor mounting can be provided.

Further, since a thin film having a uniform composition can be formed, a via hole having a fine diameter can be formed.

Preferably, the adhesive layer of the insulating substrate is a semi-cured organic resin. As a result, the pattern is embedded in the adhesive layer, and strong temporary fixing can be maintained by the anchor effect.

The conductive material of the conductive paste is Cu, A
g and at least one metal powder selected from the group consisting of these alloys. This is because an interlayer connection with extremely good connection resistance can be obtained.

Further, if the thickness of the adhesive layer formed on the insulating base material before pressing is substantially equal to or smaller than the thickness of the circuit pattern embedded in the adhesive layer, the insulating base material may be substantially removed. The circuit pattern can be embedded, and the reduction in the compressive force of the conductive paste due to the lateral spread of the adhesive layer during compression can be minimized.

Preferably, the metal foil provided on the upper layer has an opening so that the alignment mark provided on the lower layer can be seen. Recognition of the position and shape of the alignment mark and the exposure mask already formed in the opening can be easily performed.

[0031]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIGS. 1A to 1H are process sectional views showing an embodiment of the present invention, and show a four-layer substrate as an example. Hereinafter, embodiments will be described in detail based on examples.

As shown in FIG. 1A, a supporting substrate 320 having a circuit pattern 307a and an alignment mark 307b formed on one side is prepared. As such a material, for example, a copper foil with an aluminum carrier (trade name is UTC copper foil) manufactured by Furukawa Circuit Foil Co., Ltd. is commercially available. A zincate treatment is performed on one surface of an aluminum foil having a thickness of about 40 μm as the support substrate 320, and then a copper having a thickness of about 5 to 20 μm is precipitated by electrolytic plating, and the surface is roughened.

In this embodiment, a photosensitive resist coating, resist baking, mask exposure, development, and the like are performed by using a UTC copper foil having a thickness of 9 μm on an aluminum foil having a thickness of 40 μm as a supporting substrate 320. The copper portion was selectively etched with a persulfuric acid-hydrogen peroxide solution to form a circuit pattern 307a and an alignment mark 307b.

Next, as shown in FIG. 1B, an adhesive layer 308 is formed on both surfaces of the insulating base material 306, and a release film 309 is laminated on the adhesive layer 308. A material obtained by peeling the release film on one side of the base composite body 310 is prepared, and the adhesive layer 308 is overlapped with the circuit pattern 307a and the alignment mark 307b of the support base 320 so as to be in contact with each other. It is temporarily fixed and fixed by heating under pressure in an autoclave or the like.

As the release film 309, for example, P
ET (polyethylene terephthalate) film and PEN
(Polyethylene naphthalate) films can be used. However, when processing with a YAG laser having a wavelength of 351 nm, the PET film does not absorb the laser light having a wavelength of 351 nm. Therefore, an ultraviolet absorber that absorbs the laser light having a wavelength of 351 nm is mixed with the PET film, or the surface of the PET film is coated. do it.

As the adhesive layer 308, for example, a thermosetting epoxy resin or a polyimide resin is preferably used, and the thermosetting resin is preferably kept in a semi-cured state in order to secure the embedding property of the circuit pattern and the alignment mark. The insulating substrate 306 is not particularly limited, and for example, a polyimide film, an aramid film, a liquid crystal polymer film, or the like can be used.

In this embodiment, as the insulating base material 306, 12
A μm thick polyimide film was used. Adhesive layer 308
In particular, a 5 μm-thick thermosetting modified polyimide resin which was dried after application was used. Release film 30
As 9, a 9 μm thick PEN film was used. Pressure of 5kg / cm by vacuum lamination for temporary fixing
^2. Pressurized and heated at a temperature of 70 to 80 ° C for 1 minute.

Next, as shown in FIG. 1C, the circuit pattern 30 is placed on an insulating base material 306 provided with a release film 309.
A laser is irradiated to a predetermined position where electrical connection is made while recognizing the position and shape of the circuit pattern 307a.
A non-through hole 303 reaching the surface was formed. As the laser, a third harmonic YAG solid-state laser having a wavelength of 351 nm was used. A non-through hole 303 having a hole diameter of about 50 μm was formed by the short-wavelength laser.

Next, as shown in FIG. 1D, the non-through holes 303 were filled with the conductive paste 302. As a filling method, there are a screen printing method, a vacuum centrifugal method, a roller pressing method and the like. In this embodiment, the release film 30 is screen-printed.
9, a conductive paste 3 having a thickness of 0.2 to 0.3 mm
02 is formed on the entire surface, and then the conductive paste 3 is formed by vacuum centrifugation.
02 was filled in the non-through holes 303, and the conductive paste 302 remaining on the release film 309 was removed and recovered by a screen printing method. At this time, the release film 309 plays a role of a printing mask and a role of preventing contamination of the surface of the adhesive layer 308.

Next, as shown in FIG. 1E, the release film 309 is peeled off, and
311 corresponding to the alignment mark 307b of FIG.
The metal foil 304 provided with the pressure is superimposed and the pressure is 150 to 200 kg / cm ^{2 at} a temperature of 70 to 80 ° C. by a vacuum hot press.
The laminate was temporarily fixed and fixed by heating under pressure. Metal foil 304
A roughened Cu foil having a thickness of 9 μm on both sides of about 1 to 1.5 μm was used.

Next, as shown in FIG. 1 (f), the alignment mark 307b corresponding to the opening 311 of the metal foil 304 temporarily fixed and fixed and the alignment mark of an exposure mask (not shown) are image-recognized. Positioning is performed to form a desired circuit pattern 317a and a next layer alignment mark 317b.

Next, as shown in FIG.
After repeating the steps of (b) to (g) of FIG. 1, the circuit pattern 3 of the outermost layer (the fourth layer in the case of the present embodiment) of the required number of layers
In forming the layer 37a, after laminating the metal foil 304, a circuit pattern is formed after vacuum hot pressing at the curing temperature of the adhesive layer 308. In this embodiment, a pressure of 150 is used as a vacuum hot press.
Heating was performed under a pressure of 200 kg / cm ² and a temperature of 200 ° C. for 1 hour.

The adhesive layer 308 flows by the pressure and heating, and the circuit patterns 307a, 317a, and 327a are embedded in the adhesive layer 308 to form the insulating base material 306.
Is deformed, the conductive paste 302 in the non-through hole 303 is compressed, and the resin component in the conductive paste 302 is
08, the conductive component in the conductive paste 302 is densified, and good electrical connection with the circuit pattern of each layer is obtained.

Next, as shown in FIG. 1 (h), the support base 320 is selectively removed while leaving the circuit pattern 307a and the alignment marks 307b made of the copper material of the support base 320, thereby forming the four-layer substrate 330. can get. At this time, the aluminum foil of the supporting base material 320 can be easily removed by using an etching solution having a ratio of hydrochloric acid: pure water = 1: 1.

In the above-described embodiment, the method for manufacturing up to a four-layer board has been described. However, it is apparent that a multilayer circuit board having a desired number of layers can be obtained by repeating the above steps.

[0047]

As described above, according to the present invention, the insulating substrate and the metal foil are sequentially temporarily fixed and fixed, and the via holes and the circuit pattern are formed by recognizing the pattern and the alignment mark. The present invention can provide a manufacturing method excellent in productivity in a multilayer circuit board which is required to have a smaller size, a smaller via diameter, and a larger number of layers.

[Brief description of the drawings]

FIG. 1 is a process sectional view showing a method for manufacturing a multilayer circuit board according to an embodiment of the present invention.

FIG. 2 is a process sectional view showing a method for manufacturing a conventional double-sided circuit board.

FIG. 3 is a process sectional view showing a method for manufacturing a conventional four-layer substrate.

[Explanation of symbols]

101, 306 Insulating base material 102, 202, 302 Conductive paste 103 Through hole (via hole) 104, 204, 304 Metal foil 105, 309 Release film 106 Insulating joined body 107a, 107b, 207a, 207b, 307a,
317a, 327a, 337a Circuit pattern 110 Double-sided circuit board 303 Non-through hole 306 Insulating substrate 307b, 317b, 327b Alignment mark 308 Adhesive layer 320 Supporting substrate 330 4-layer substrate

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H05K 3/40 H05K 3/40 K (72) Inventor Satoshi Nakamura 1006 Kazuma Kadoma, Kadoma, Osaka Matsushita Electric Industrial (72) Inventor Hideki Higashiya 1006 Kazuma Kadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd. F-term (reference) DD63 DD76 ER55 ER58 FF07 FF13 FF24 GG08 5E346 AA12 AA16 CC10 CC32 DD12 EE12 EE13 FF18 GG15 GG22 HH26 HH33

Claims (7)

[Claims] 1. A method for manufacturing a multilayer circuit board, comprising the following steps. a. A step of forming a desired circuit pattern and an alignment mark made of a conductor on the surface of the supporting substrate; b. An adhesive layer is formed on both sides of the insulating base material, and the release layer on one side of the insulating base composite body further having a release film laminated on the adhesive layer is peeled off to form the adhesive layer and the adhesive layer. A step of superimposing the circuit pattern on the supporting base material so as to be in contact with the circuit pattern, and applying pressure and heating at a temperature lower than the curing temperature of the adhesive layer to temporarily fix and fix the adhesive layer. c. A step of recognizing a circuit pattern on an insulating base material provided with the release film at a place where an electrical connection is to be made, and irradiating a predetermined position with a laser to form a non-through hole reaching the surface of the circuit pattern; d. Filling a conductive paste into the non-through holes. e. A step of positioning a metal foil on the support substrate after the release film is peeled off, and applying pressure and heating at a temperature lower than the curing temperature of the adhesive layer to temporarily fix and fix the laminate. f. A step of positioning an exposure mask and an alignment mark formed on the supporting base material and forming a desired circuit pattern on the metal foil and an alignment mark of a next layer. g. A step of forming a circuit pattern by pressurizing and heating at a curing temperature of the adhesive layer after laminating the metal foil when forming a circuit pattern of a required number of outermost layers after repeating steps b to f. . h. A step of selectively removing the support substrate while leaving a circuit pattern of the support substrate. 2. The multilayer according to claim 1, wherein the means for temporarily fixing and laminating the insulating base material and the metal foil by pressurizing and heating is at least one means selected from the group consisting of laminating, vacuum hot pressing and autoclave. A method for manufacturing a circuit board. 3. The material according to claim 1, wherein the insulating substrate is at least one material selected from the group consisting of a polyimide film, a liquid crystal polymer film, and an aramid film.
A method for manufacturing the multilayer circuit board according to the above. 4. The method for manufacturing a multilayer circuit board according to claim 1, wherein the adhesive layer of the insulating substrate is a semi-cured organic resin. 5. The method according to claim 1, wherein the conductive material of the conductive paste includes at least one metal powder selected from the group consisting of Cu, Ag, and an alloy thereof. . 6. The method according to claim 1, wherein the thickness of the adhesive layer formed on the insulating base material before the pressing is substantially equal to or smaller than the thickness of the circuit pattern embedded in the adhesive layer. 1
Item 13. The method for producing a multilayer circuit board according to item 9. 7. The method according to claim 1, wherein the metal foil provided on the upper layer has an opening so that the alignment mark provided on the lower layer can be seen.