TWI479972B - Multi-layer flexible printed wiring board and manufacturing method thereof - Google Patents

Multi-layer flexible printed wiring board and manufacturing method thereof Download PDF

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TWI479972B
TWI479972B TW098103413A TW98103413A TWI479972B TW I479972 B TWI479972 B TW I479972B TW 098103413 A TW098103413 A TW 098103413A TW 98103413 A TW98103413 A TW 98103413A TW I479972 B TWI479972 B TW I479972B
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layer
hole
conductive
stacked
conductive layer
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TW200945987A (en
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Fumihiko Matsuda
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Nippon Mektron Kk
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Description

多層可撓性印刷配線板及其製造方法Multilayer flexible printed wiring board and method of manufacturing same

本發明,係有關於多層可撓性印刷配線板及其製造方法,特別是有關於具備有可撓性纜線部之堆疊(build-up)型多層可撓性印刷配線板及其製造方法。The present invention relates to a multilayer flexible printed wiring board and a method of manufacturing the same, and more particularly to a build-up type multilayer flexible printed wiring board including a flexible cable portion, and a method of manufacturing the same.

近年來,電子機器、特別是行動電話之高功能化係日益進行,伴隨於此,被安裝在多層可撓性印刷配線板處之構件,亦被置換為晶片尺寸封裝(Chip-Size Package,亦被稱為Chip-Scale Package,以下,稱為CSP),而有著被高功能且高密度地作封裝,並不使基板尺寸變大地而附加高功能之傾向。In recent years, the high functionality of electronic devices, especially mobile phones, has been increasingly carried out. Accordingly, the components mounted on the multilayer flexible printed wiring board have also been replaced by chip-size packages (Chip-Size Package). Known as the Chip-Scale Package (hereinafter referred to as CSP), it has a tendency to be packaged with high functionality and high density, and does not increase the size of the substrate to add high functionality.

此CSP之墊片節距,起初係為0.8mm節距者,但是,在近年,係開始有了0.4mm節距以下之狹窄節距者的要求。於其中,搭載將10墊片×10墊片以上之墊片數的CSP之墊片以滿網格(full grid)來作配置的狹窄節距CSP一事,在先前技術之多層可撓性印刷配線板中,係為非常困難。The gasket pitch of this CSP was originally 0.8 mm pitch, but in recent years, the system began to have a narrow pitch of 0.4 mm pitch. In the case of a narrow pitch CSP in which a CSP pad having a number of pads of 10 shims × 10 shims or more is placed in a full grid, the multilayer flexible printed wiring of the prior art is used. In the board, it is very difficult.

於此,若是對在多層可撓性印刷配線板上搭載狹窄節距CSP的必要條件作探討,則係為如下述一般。Here, the necessity of mounting the narrow pitch CSP on the multilayer flexible printed wiring board is as follows.

(1)在CSP安裝墊片上不存在有貫通孔。(1) There is no through hole in the CSP mounting spacer.

此係為了不使在安裝中所需要之銲錫流入。This is in order not to allow the solder required for installation to flow in.

(2)導通部之高密度配置係為可能。(2) High-density configuration of the conduction portion is possible.

由於係從狹窄節距CSP安裝墊片而直接與下方之配線層作連接,因此,作為所要求之最小節距,係成為需要設為與所搭載之CSP的墊片節距相同之節距。Since the spacer is directly connected to the wiring layer below from the narrow pitch CSP, it is necessary to set the pitch to be the same as the pitch of the spacer of the mounted CSP.

(3)細微配線形成能力。(3) Fine wiring forming ability.

此係因為,不論外層或內層,均需要從100墊片以上之多數的墊片來進行配線引繞之故。又,在CSP安裝墊片間作引繞之配線的根數,係為對可搭載之CSP的規格(specification)作決定之重要的要素。特別是,在搭載CSP時,將較CSP安裝墊片所存在之外層的配線更下方之內層的配線作細微化一事,係為有效。This is because, regardless of the outer layer or the inner layer, it is necessary to wire the wires from a plurality of spacers of 100 or more. Moreover, the number of wirings to be wound between the CSP mounting pads is an important factor for determining the specifications of the mountable CSP. In particular, when the CSP is mounted, it is effective to make the wiring of the inner layer below the wiring of the outer layer of the CSP mounting pad fine.

(4)CSP安裝墊片之平坦性。(4) The flatness of the CSP mounting gasket.

此係因為,當將CSP在多層可撓性印刷配線板上以面朝下而進行倒裝晶片安裝時,係有必要藉由CSP側之墊片上的銲錫球之高度來將CSP安裝墊片之凹凸作吸收之故。在多層可撓性印刷配線板中,係有必要將各層之導體層的厚度所致之階段差藉由接著材等來作填充而確保平坦性。This is because when the CSP is flip-chip mounted face down on the multilayer flexible printed wiring board, it is necessary to mount the CSP by the height of the solder ball on the CSP side spacer. The bumps are absorbed. In the multilayer flexible printed wiring board, it is necessary to fill the step difference due to the thickness of the conductor layer of each layer by a bonding material or the like to ensure flatness.

作為滿足此種要求之多層可撓性印刷配線板,係存在有專利文獻1中所記載之6層構造的可撓性印刷配線板。而,在行動電話或是數位視訊攝像機等之主基板中,若是6層構造,則配線層之層數係為不足,而使用8層構造基板的情況係變多。A flexible printed wiring board having a six-layer structure described in Patent Document 1 is a multilayer flexible printed wiring board that satisfies such a requirement. On the other hand, in the main substrate such as a mobile phone or a digital video camera, if the structure is a six-layer structure, the number of layers of the wiring layer is insufficient, and the case of using an eight-layer structure substrate is increased.

作為使用8層構造之基板的其他理由,係因為存在有在基板之第1導電層處安裝構件,並在第2導電層處配置接地層,而在第3導電層處進行訊號線之引繞的情況之故。訊號線之引繞,由於係藉由在CSP之銷間所通過的配線之根數而被決定,因此,藉由配置在CSP搭載銲墊之正下方的通孔來連接於下層之訊號線的構造,係最適合於高密度化。Another reason for using a substrate having an 8-layer structure is that a member is mounted on the first conductive layer of the substrate, and a ground layer is disposed on the second conductive layer, and the signal line is wound at the third conductive layer. The reason for this. The routing of the signal line is determined by the number of wires passing between the pins of the CSP. Therefore, the signal line connected to the lower layer is connected by a through hole disposed directly under the CSP mounting pad. The structure is most suitable for high density.

進而,藉由在存在有訊號線之配線層的銲墊之間使多根的訊號線通過,能夠對應於高密度CSP。故而,係有必要將上述之銲墊徑盡可能的縮小,並將訊號線形成為細微。Further, by passing a plurality of signal lines between the pads in which the wiring layers of the signal lines are present, it is possible to correspond to the high-density CSP. Therefore, it is necessary to reduce the above-mentioned pad diameter as much as possible and to form the signal line as fine.

圖5,係為展示先前技術之6層構造的多層可撓性印刷配線板之構造者。此配線板,係為將堆疊層各設置一層之8層構造。Fig. 5 is a view showing a constructor of a multilayer flexible printed wiring board of a 6-layer structure of the prior art. This wiring board is an 8-layer structure in which each of the stacked layers is provided in one layer.

為了製造此配線板,首先,係如圖5中所示一般,準備了將在聚醯亞胺等之可撓性絕緣基底材之兩面上具備有銅箔之雙面貼銅層積板作為出發材料的雙面可撓性配線板101。In order to manufacture the wiring board, first, as shown in FIG. 5, a double-sided copper-clad laminate having copper foil on both sides of a flexible insulating base material such as polyimide or the like is prepared as a starting point. A double-sided flexible wiring board 101 of material.

接著,準備作為對於雙面可撓性印刷配線板101之堆疊層的雙面可撓性配線基材102,並於其之內層側形成覆蓋層103。經由接著材104,而將於內層側施加了覆蓋層103之雙面可撓性配線基材102與雙面可撓性印刷配線板101相貼合,而作為6層之配線基材105。Next, a double-sided flexible wiring substrate 102 as a stacked layer of the double-sided flexible printed wiring board 101 is prepared, and a cover layer 103 is formed on the inner layer side thereof. The double-sided flexible wiring substrate 102 to which the cover layer 103 is applied on the inner layer side is bonded to the double-sided flexible printed wiring board 101 via the adhesive material 104, and is a wiring substrate 105 of six layers.

接著,對於6層之配線基材105,而藉由雷射加工等之手法來形成導通用孔,並藉由進行通孔電鍍,而得到層間導通。進而,為了1層1層地進行堆疊,而在通孔電鍍中選擇了灌孔(via fill)電鍍,藉由此,而在6層之配線基材102的通孔上將堆疊層之通孔重疊形成,而能夠設為所謂的疊孔構造。Next, with respect to the wiring substrate 105 of the six layers, a via hole is formed by a laser processing or the like, and via-hole plating is performed to obtain interlayer conduction. Further, in order to stack one layer by one layer, via fill plating is selected in the via plating, whereby the via holes of the stacked layers are formed on the via holes of the wiring layer 102 of the 6 layers. The overlap is formed, and it can be set as a so-called stacked structure.

在6層之配線基材105上,經由接著材106而貼合單面可撓性印刷配線板107,藉由此,而進行堆疊。而後,藉由以雷射加工等之手法來形成導通用孔並進行通孔電鍍而形成外層之圖案,而得到8層構造之多層可撓性印刷配線板108。The single-sided flexible printed wiring board 107 is bonded to the wiring substrate 105 of the six layers via the bonding material 106, whereby stacking is performed. Then, a general-purpose hole is formed by laser processing or the like, and through-hole plating is performed to form a pattern of the outer layer, thereby obtaining a multilayer flexible printed wiring board 108 having an eight-layer structure.

[專利文獻1]日本特開2007-128970號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2007-128970

然而,當在上述之6層構造的多層可撓性印刷配線板中,使用有將堆疊層各設置1層之8層構造的多層可撓性印刷配線板的情況時,會由於將堆疊層作堆疊時之位置精確度、在製造成為核心基板之6層構造的多層可撓性印刷配線板時之基板的尺寸伸縮,而無法將銲墊徑縮小,並成為為了於CSP之銷之間而使配線通過時的限制。However, in the case of the multilayer flexible printed wiring board having the above-described six-layer structure, a multilayer flexible printed wiring board having an eight-layer structure in which one layer of each of the stacked layers is provided is used, The positional accuracy at the time of stacking and the size of the substrate when the multilayer flexible printed wiring board having a six-layer structure of the core substrate is manufactured is stretched and stretched, and the diameter of the pad cannot be reduced, and it is made to be between the pins of the CSP. Limitation when wiring is passed.

進而,為了在6層構造之多層可撓性印刷配線板上作1層之堆疊,係有必要將核心基板之通孔藉由灌孔電鍍等來將孔填埋,或是使用能夠填充通孔之厚的堆疊接著材。Further, in order to stack a single layer on a multilayer flexible printed wiring board having a six-layer structure, it is necessary to fill the holes of the core substrate by filling holes or the like, or to fill the through holes. Thick stacked backing material.

因此,亦會產生有以下之問題:對堆疊層之層間連接的信賴性作確保一事成為困難、或是由於堆疊接著材係為厚,而使得硬化時之基板的尺寸伸縮量變大,故而,就算是8層構造,要製造可合適地搭載高密度CSP之多層可撓性印刷配線板一事亦係為困難。Therefore, there is also a problem that it is difficult to ensure the reliability of the interlayer connection of the stacked layers, or because the thickness of the stacked adhesive is thick, so that the amount of expansion and contraction of the substrate during hardening becomes large, so even It is an 8-layer structure, and it is difficult to manufacture a multilayer flexible printed wiring board in which a high-density CSP can be suitably mounted.

本發明,係為考慮上述之點而進行者,其目的,係在於提供一種:能夠搭載狹窄節距之高密度CSP的多層可撓性印刷配線板,以及將此配線板低價且安定地製造之方法。The present invention has been made in view of the above, and an object thereof is to provide a multilayer flexible printed wiring board capable of mounting a high-density CSP having a narrow pitch, and to manufacture the wiring board at low cost and in a stable manner. The method.

為了達成上述目的,在本申請案中,係提供下述之各發明。In order to achieve the above object, in the present application, the following inventions are provided.

若依據第1發明,則係為一種在兩面具備有配線圖案之核心基板之至少單面處具備有3層構造之堆疊層的多層可撓性印刷配線板,其特徵為:在從前述堆疊層之外層側起的第1層之第1導電層處,係具備有安裝晶片尺寸封裝之安裝墊片,在從前述堆疊層之外層側起的第2層之第2導電層處,係至少在搭載前述晶片尺寸封裝之區域的正下方具備有接地層,在從前述堆疊層之外層側起的第3層之第3導電層處,係具備有從前述安裝墊片起而經由跳過前述第2導電層之接地層的跳階通孔而被導通的用以將訊號電路作引繞之配線圖案,前述跳階通孔,係為有底之盲通孔,該盲通孔之底係與前述第1導電層之前述安裝墊片的背面相接,同時,具備有與前述跳階通孔相異之將前述堆疊層與前述核心基板作導通的通孔,具備有與前述堆疊層作了一體化之可撓性纜線部。According to the first aspect of the invention, there is provided a multilayer flexible printed wiring board having a three-layered stacked layer on at least one side of a core substrate having a wiring pattern on both sides, characterized in that: from the foregoing stacked layer The first conductive layer of the first layer from the side of the outer layer is provided with a mounting spacer having a package of a wafer size mounted thereon, and at least the second conductive layer of the second layer from the outer layer side of the stacked layer is at least a ground layer is provided directly under the region in which the wafer-sized package is mounted, and the third conductive layer of the third layer from the outer layer side of the stacked layer is provided with the jump from the mounting spacer a wiring pattern for guiding the signal circuit to be turned on by the jump-through via of the ground layer of the conductive layer, wherein the jump-through via is a bottomed blind via, and the bottom of the blind via is The back surface of the mounting pad of the first conductive layer is in contact with each other, and is provided with a through hole different from the stepped via hole for conducting the stacked layer and the core substrate, and is provided with the stacked layer Integrated flexible cable section.

又,若依據第2發明,則係為一種在兩面具備有配線圖案之核心基板之至少單面處具備有3層構造之堆疊層的多層可撓性印刷配線板之製造方法,其特徵為,具備有:(a)在兩面型之可撓性配線基材的其中一面處的導通用孔之形成部位上,形成雷射加工用之開口,並在另外一面上形成包含有接地層以及導通用孔之形成部位的開口之配線圖案的工程;和(b)將前述可撓性配線基材之形成了配線圖案的面與單面型之可撓性配線基材的可撓性絕緣基底材側之面經由接著材來作貼合,並形成3層構造之配線基材的工程;和(c)對於成為前述3層構造之配線基材的從外層側起之第3層的導電層之第3導電層的導通用孔之形成部位的開口進行雷射加工,並形成到達成為從外層側起之第1層的導電層之第1導電層處的有底之導通用孔的工程;和(d)對於前述導通用孔而進行導電化處理,並藉由電解電鍍而形成盲通孔的工程;和(e)在前述第3導電層處形成配線圖案的工程;和(f)在前述第3導電層之前述配線圖案上形成覆蓋層(coverlay)的工程;和(g)將前述堆疊層之形成了前述覆蓋層的側,朝向另外製作之前述核心基板的側,並經由接著材而層積於前述核心基板上的工程;和(h)對於前述層積配線基材,而形成從前述第1導電層之導通用孔的形成部位起而到達前述合金基板之導通用孔的工程;和(i)對於前述導通用孔進行導電化處理,並藉由電解電鍍而形成通孔的工程。According to the second aspect of the invention, there is provided a method of manufacturing a multilayer flexible printed wiring board having a three-layered stacked layer on at least one side of a core substrate having a wiring pattern on both sides thereof, wherein The method includes: (a) forming an opening for laser processing on a portion of the conductive hole formed on one of the two-sided flexible wiring substrate, and forming a ground layer on the other surface and guiding And (b) a surface of the flexible wiring substrate on which the wiring pattern is formed and a flexible insulating base material side of the single-sided flexible wiring substrate; The surface of the wiring substrate of the three-layer structure is bonded to the surface via the bonding material; and (c) the third layer of the conductive layer from the outer layer side of the wiring substrate which is the three-layer structure (3) the opening of the portion where the conductive hole of the conductive layer is formed is subjected to laser processing, and the bottomed conductive hole reaching the first conductive layer of the conductive layer of the first layer from the outer layer side is formed; and d) conducting the conductive portion for the aforementioned common hole And forming a blind via hole by electrolytic plating; and (e) forming a wiring pattern at the third conductive layer; and (f) forming a cap layer on the wiring pattern of the third conductive layer ( The work of the coverlay); and (g) the side of the stacked layer on which the cover layer is formed, toward the side of the core substrate to be separately fabricated, and laminated on the core substrate via the bonding material; and (h) a step of forming a conductive hole from the portion where the conductive hole of the first conductive layer is formed and reaching the conductive hole of the alloy substrate; and (i) conducting a conductive treatment on the conductive hole And the process of forming a through hole by electrolytic plating.

藉由此些之特徵,本發明係可得到下述一般之效果。By virtue of the above features, the present invention achieves the following general effects.

本發明所致之多層可撓性印刷配線板,由於係將第1導電層(CSP安裝層)與第3導電層(訊號層)作了對位,因此,能夠將第3導電層之銲墊小口徑化,且藉由在第2導電層處配置接地層,能夠將電性特性提升。由於CSP安裝面係成為通孔之底側,因此,平坦性係被作確保,不會受到通孔之凹陷的影響,而能夠合適地安裝CSP。In the multilayer flexible printed wiring board according to the present invention, since the first conductive layer (CSP mounting layer) is aligned with the third conductive layer (signal layer), the third conductive layer pad can be used. The small diameter is reduced, and the electrical characteristics can be improved by arranging the ground layer at the second conductive layer. Since the CSP mounting surface is the bottom side of the through hole, the flatness is ensured, and the CSP can be appropriately mounted without being affected by the recess of the through hole.

又,於此情況,由於纜線係可配置在第3導電層處,因此,能夠以最短距離來連接構件安裝部。當訊號線存在於第2導電層中的情況時,亦能對將纜線配置在第2導電層中一事作對應。Moreover, in this case, since the cable can be disposed in the third conductive layer, the member mounting portion can be connected at the shortest distance. When the signal line exists in the second conductive layer, it is also possible to correspond to the arrangement of the cable in the second conductive layer.

進而,藉由將兩面之堆疊層挾持核心基板而作直接連接,亦能夠將通孔或是貫通孔減少。其結果,能夠將可搭載狹窄節距之高密度CSP的多層可撓性印刷配線板低價且安定地作製造。Further, by directly connecting the stacked layers on both sides to the core substrate, the through holes or the through holes can be reduced. As a result, it is possible to manufacture a multilayer flexible printed wiring board capable of mounting a high-density CSP having a narrow pitch at a low cost and in a stable manner.

以下,參考所添附之圖面,而對本發明之實施例作說明。Hereinafter, embodiments of the invention will be described with reference to the attached drawings.

[實施例1][Example 1]

圖1A乃至圖1D,係為展示本發明之製造方法的工程圖。藉由此工程圖,而展示具備有纜線部之8層構造的多層可撓性印刷配線板之製造方法。1A to 1D are drawings showing the manufacturing method of the present invention. By this drawing, a manufacturing method of a multilayer flexible printed wiring board having an eight-layer structure having a cable portion is shown.

首先,如圖1A(1)中所示一般,對於雙面貼銅層積板4,而形成內層側之銅箔2的在雷射加工時之正形遮罩2a以及電路圖案2b。作為雙面貼銅層積板4,例如係使用在聚醯亞胺等之可撓性絕緣基底材1(於此,係為厚度12.5μm之聚醯亞胺)的兩面處,具備有厚度為12μm之銅箔2以及3者。First, as shown in Fig. 1A (1), in the case of the double-sided copper-clad laminate 4, the positive-shaped mask 2a and the circuit pattern 2b at the time of laser processing of the copper foil 2 on the inner layer side are formed. The double-sided copper-clad laminate 4 is used, for example, on both sides of a flexible insulating base material 1 such as polyimine (here, a polyimide having a thickness of 12.5 μm), and has a thickness of 12 μm of copper foil 2 and 3 of them.

正形遮罩2a以及電路圖案2b,係經由將銅箔2以感光蝕刻加工(Photofabrication)手法來作蝕刻而形成之。又,在成為外層側之銅箔3處,形成雷射加工時之正形遮罩3a。亦可一併地形成之後的與第3導電層間之對位記號等。藉由此工程,而得到配線基材5。The positive mask 2a and the circuit pattern 2b are formed by etching the copper foil 2 by a photofabrication method. Moreover, the positive mask 3a at the time of laser processing is formed in the copper foil 3 which becomes the outer side. It is also possible to form the alignment mark and the like between the subsequent third conductive layer and the like. By this work, the wiring substrate 5 is obtained.

而後,如圖1A(2)中所示一般,對於在聚醯亞胺等之可撓性絕緣基底材6(於此,係為厚度12.5μm之聚醯亞胺)的單面處具備有厚度12μm之銅箔7的所謂單面貼銅層積板8,因應於必要,而將對位用之導引具等作脫模,並將用以層積配線基材5之接著材9預先作脫模,而進行對位。經由接著材9,而將雙面之配線基材5與單面之配線基材使用滾輪層壓或是平板衝壓、真空衝壓等來作堆疊。在到此為止的工程中,係得到3層之多層配線基材。Then, as shown in FIG. 1A (2), generally, a thickness is provided at one side of a flexible insulating base material 6 such as polythenimine (here, a polyimide having a thickness of 12.5 μm). The so-called single-sided copper-clad laminate 8 of the copper foil 7 of 12 μm is used for demolding the alignment guides and the like, and the laminate 9 for laminating the wiring substrate 5 is previously prepared. Demoulding, and performing the alignment. The wiring substrate 5 on both sides and the wiring substrate on one side are laminated by roll bonding, flat plate pressing, vacuum pressing, or the like via the bonding material 9. In the engineering up to this point, a three-layer multilayer wiring substrate was obtained.

接著,如圖1A(3)中所示一般,使用正形遮罩7a而進行雷射加工,並形成導通用孔10。作為在雷射加工中所使用之雷射,除了二氧化碳氣體雷射或是YAG雷射等之紅外雷射以外,亦可選擇準分子雷射或是UV-YAG雷射等的紫外雷射。Next, as shown in FIG. 1A (3), laser processing is performed using the positive mask 7a, and the conductive hole 10 is formed. As the laser used in the laser processing, in addition to the infrared laser such as a carbon dioxide gas laser or a YAG laser, an ultraviolet laser such as an excimer laser or a UV-YAG laser may be selected.

各導通用孔之口徑,係如下述一般而設定。首先,導通用孔10,當在可撓性絕緣基底材1以及6處係如同此實施例1一般而使用12.5μm厚之聚醯亞胺的情況時,由於就算是在直徑50μm下亦可作製造之用以確保信賴性之必要電鍍厚度,係為10μm左右,因此,於此係設為了直徑50μm。The diameter of each of the common holes is set as follows. First, the general-purpose hole 10, when the flexible insulating base material 1 and 6 is used as in the case of the first embodiment, is 12.5 μm thick polyimine, since it can be used even at a diameter of 50 μm. The necessary plating thickness for ensuring reliability is about 10 μm, and therefore, the diameter is 50 μm.

而後,如圖1A(4)所示一般,在具備有導通用孔10之3層的多層電路基材處,進行10μm左右的電解電鍍並取得層間導通,而設為了跳階通孔11。於此,係採用除了導通用孔以外並不施加電鍍的所謂釦電鍍手法。Then, as shown in FIG. 1A (4), in general, a multilayer circuit substrate having three layers of the conductive holes 10 is subjected to electrolytic plating of about 10 μm to obtain interlayer conduction, and is formed as a stepped through hole 11. Here, a so-called buckle plating method in which plating is not applied except for the general-purpose hole is employed.

接下來,如圖1A(5)中所示一般,對於此3層之多層配線基材的外層側與內層側、亦即是對於第1導電層7以及第3導電層3,而形成兩面之電路圖案7b、3c。藉由感光蝕刻加工所致之蝕刻手法,而在第1導電層7上形成雷射加工時之正形遮罩7a、在第3導電層3上形成雷射加工時之正形遮罩3b以及電路圖案3c。在到此為止的工程中,係得到3層之形成了圖案的配線基材12。Next, as shown in FIG. 1A (5), generally, the outer layer side and the inner layer side of the three-layer multilayer wiring substrate, that is, the first conductive layer 7 and the third conductive layer 3, are formed on both sides. Circuit patterns 7b, 3c. A positive mask 7a for laser processing, a positive mask 3b for laser processing on the third conductive layer 3, and a positive mask 3b for laser processing are formed on the first conductive layer 7 by an etching method by photosensitive etching. Circuit pattern 3c. In the work up to this point, three layers of the wiring substrate 12 having the pattern formed thereon were obtained.

此時之兩面的對位,由於係對於平坦之材料來進行。因此不會被材料之伸縮等所影響,而能容易地確保高位置精確度。因應於必要,亦可使用能夠進行高精確度之對位的曝光機。The alignment of the two sides at this time is performed for the flat material. Therefore, it is not affected by the expansion or the like of the material, and the high positional accuracy can be easily ensured. An exposure machine capable of high-precision alignment can also be used as necessary.

由於係想定為:第1導電層7係為構件安裝面,第2導電層係為主要由接地層所成之幾乎平坦的配線層,而第3導電層係作為訊號線而起作用,因此,由於第1導電層7與第3導電層3之間的對位精確度,係與通孔之乘載銲墊的大小等有直接關連,故而在高密度電路之形成中係為重要。It is assumed that the first conductive layer 7 is a component mounting surface, the second conductive layer is a substantially flat wiring layer mainly formed of a ground layer, and the third conductive layer functions as a signal line. Since the alignment accuracy between the first conductive layer 7 and the third conductive layer 3 is directly related to the size of the pass pad of the via hole, etc., it is important in the formation of a high-density circuit.

於此,係想定為:將多銷CSP等之高密度構件作搭載的場所之安裝部,係為上述之跳階通孔11的通孔底側,而安裝面(第1導電層)係並不存在有通孔之凹陷,能夠進行對於第3導電層3之訊號線的直接連接。Here, it is assumed that the mounting portion of the place where the high-density member such as the multi-pin CSP is mounted is the bottom side of the through hole of the above-described stepped through hole 11, and the mounting surface (first conductive layer) is There is no recess having a through hole, and a direct connection to the signal line of the third conductive layer 3 can be performed.

又,在第3導電層3之電路圖案處,由於係並未被附加有電鍍,因此,係亦可使其作為彎曲纜線而起作用。另一方面,第2導電層2與第1導電層7、第3導電層3間之位置精確度,相較於上述之第1導電層7與第3導電層3之間的對位,係並非為如此重要,只要能夠形成通孔之餘裕部分或是接地用之口徑較大的乘載銲墊即可。Further, since the circuit pattern of the third conductive layer 3 is not plated, it can function as a curved cable. On the other hand, the positional accuracy between the second conductive layer 2, the first conductive layer 7, and the third conductive layer 3 is compared with the alignment between the first conductive layer 7 and the third conductive layer 3 described above. It is not so important as long as it can form a margin of the via hole or a large-sized pad with a large diameter for grounding.

不用說,當重視於第1導電層7與第2導電層2之間的對位的情況時,只要配合於其而將各層彼此作對位即可。Needless to say, when importance is placed on the alignment between the first conductive layer 7 and the second conductive layer 2, the layers may be aligned with each other as long as they are fitted.

接下來,如圖1B(6)中所示一般,準備在例如12μm厚之聚醯亞胺薄膜13之上具備有厚度25μm之丙烯、環氧樹脂等的接著材14的所謂之覆蓋層15。Next, as shown in FIG. 1B (6), a so-called cover layer 15 having a laminate 14 of propylene, epoxy resin or the like having a thickness of 25 μm is provided on, for example, a 12 μm-thick polyimide film 13 .

在3層之形成了圖案的配線基材12之第3導電層3側處,將覆蓋層15藉由真空衝壓、真空層壓等來作貼附。藉由此,由於跳階通孔11之內側亦完全地被填充有接著材14,因此,在吸濕後之狀態下的回銲工程中,亦不會產生膨脹等的現象。在到此為止的工程中,係得到附加有覆蓋層之堆疊層16。The cover layer 15 is attached by vacuum pressing, vacuum lamination, or the like on the third conductive layer 3 side of the wiring layer 12 on which the pattern is formed. As a result, since the inner side of the stepped through hole 11 is completely filled with the adhesive material 14, the phenomenon of expansion or the like does not occur in the reflow process in the state after moisture absorption. In the work up to this point, the stacked layer 16 to which the cover layer is attached is obtained.

於此,從圖1A(1)起直到圖1B(6)為止的一連串之工程,由於係全部可藉由滾輪至滾輪(roll to roll)來連續性地流動,因此,能夠以自動化‧少人數化來將多層可撓性印刷配線板低價地作生產。Here, a series of projects from FIG. 1A (1) up to FIG. 1B (6) can be automated by a roll to roll. The multilayer flexible printed wiring board is produced at low cost.

圖1B(7),係為將跳階通孔11之週邊以實際尺寸比例而作了展示的擴大橫剖面圖,而能夠將實際之通孔的大小與覆蓋層15等之厚度作對比。藉由此,可以得知,藉由25μm厚之覆蓋層接著材14,能夠將在正形遮罩口徑為50μm之跳階通孔11中附加了10μm之厚度的電鍍後之孔的內部作填充。Fig. 1B (7) is an enlarged cross-sectional view showing the periphery of the stepped through hole 11 in an actual size ratio, and the size of the actual through hole can be compared with the thickness of the cover layer 15 or the like. From this, it can be seen that the inside of the plated hole having a thickness of 10 μm can be filled in the stepped through hole 11 having a positive mask diameter of 50 μm by the cover layer 14 having a thickness of 25 μm. .

圖1B(8),係為展示被堆疊在雙面貼銅層積板的相反面處的附有覆蓋層之另外一個的堆疊層16b之構造。Fig. 1B(8) is a view showing the construction of the stacked layer 16b with the other one of the cover layers stacked on the opposite side of the double-sided copper-clad laminate.

而,圖1B(9),係為展示應被挾持在2個的堆疊層16、16b之間的雙面貼銅層積板、亦即是核心基板21的構造。如同此圖1B(9)中所示一般,在對於雙面貼銅層積板而藉由NC鑽頭等來形成導通用孔18的同時,對於導通用孔18而藉由導電化處理與導電化處理後之電解電鍍處理,而形成層間導電路。1B(9) shows the structure of the double-sided copper-clad laminate which is to be held between the two stacked layers 16, 16b, that is, the core substrate 21. As shown in FIG. 1B (9), in general, the conductive hole 18 is formed by an NC drill or the like for the double-sided copper-clad laminate, and the conductive hole 18 is electrically conductively treated and electrically conductive. The electrolytic plating treatment after the treatment forms an interlayer conduction circuit.

雙面貼銅層積板,係在聚醯亞胺等之可撓性絕緣基底材17(於此,係為厚度25μm之聚醯亞胺)的兩面處,具備有厚度為8μm之銅箔者。在電解電鍍處理中,係形成10μm左右之電解電鍍皮膜。在到此為止的工程中,係形 成身為貫通型之導通部的通孔18。The double-sided copper-clad laminate is provided on both sides of a flexible insulating base material 17 such as polyimine (here, a polyimide having a thickness of 25 μm), and has a copper foil having a thickness of 8 μm. . In the electrolytic plating treatment, an electrolytic plating film of about 10 μm is formed. In the project so far, the shape The through hole 18 is formed into a through-type conduction portion.

進而,經由為了藉由感光蝕刻加工手法來形成兩面之電路圖案所進行的光阻層之形成、曝光、顯像、蝕刻、光阻層剝離等之一連串的工程,並形成電路圖案19以及20。在直到此圖1B(9)為止之工程中,得到雙面型之核心基板21。Further, the circuit patterns 19 and 20 are formed by a series of processes such as formation of a photoresist layer, exposure, development, etching, and photoresist layer peeling to form a circuit pattern on both sides by a photosensitive etching process. In the work up to this FIG. 1B (9), the double-sided core substrate 21 was obtained.

接下來,如圖1C(10)中所示一般,將用以把附有覆蓋層之堆疊層16以及16b堆疊於雙面核心基板21上的接著材22預先作脫模並進行對位。Next, as shown in Fig. 1C (10), the bonding material 22 for stacking the stacked layers 16 and 16b with the overcoat layer on the double-sided core substrate 21 is previously demolded and aligned.

而後,經由接著材20來將附有覆蓋層之堆疊層與雙面核心基板21藉由真空衝壓等來作層積。在到此為止的工程中,係得到多層配線基材23。作為接著材22,係以使用低流動性之預浸漬材料或是銲錫薄片等之流出較少者為理想。接著材22之厚度,係可選擇15μm左右者。Then, the stacked layer with the cover layer and the double-sided core substrate 21 are laminated by vacuum pressing or the like via the bonding material 20. In the work up to this point, the multilayer wiring substrate 23 is obtained. As the backing material 22, it is preferable to use a low-flow prepreg or a solder flake or the like. Next, the thickness of the material 22 can be selected to be about 15 μm.

接著,如圖1C(11)中所示一般,使用正形遮罩2a、3a、7a而進行雷射加工,並形成用以將4層作連接之4種類的導通用孔24、25。在雷射加工中,係可選擇UV-YAG雷射、二氧化碳雷射、準分子雷射等來使用。Next, as shown in Fig. 1C (11), laser processing is performed using the positive masks 2a, 3a, and 7a, and four types of conductive holes 24, 25 for connecting the four layers are formed. In laser processing, UV-YAG laser, carbon dioxide laser, excimer laser, etc. can be selected for use.

各導通用孔之口徑,係如下述一般而設定。導通用孔24、25,雖係存在有積體度以及層間連接之信賴性的問題,但是,在此實施例1中,在8層的導體層中,由於從第2層起到第7層為止係可將導體層厚度設為10μm左右而為薄,因此,亦能夠將在填充中所必要之接著材9或是接著材14、接著材22的厚度設為薄。The diameter of each of the common holes is set as follows. The general-purpose holes 24 and 25 have a problem of the degree of integration and the reliability of the interlayer connection. However, in the first embodiment, in the conductor layer of the eight layers, the layer from the second layer to the seventh layer Since the thickness of the conductor layer can be made thin by about 10 μm, the thickness of the binder 9 or the binder 14 and the binder 22 which are required for filling can be made thin.

其結果,就算是較薄的電鍍厚度,亦能確保其信賴性。作為在電鍍厚度15~20μm的程度下而能夠確保信賴性的孔徑,於導通用孔24處,係設為下孔徑100μm,而上孔徑,係考慮到與下孔間之對位,而在下孔徑上再加上100μm而設為200μm,於導通用孔25處,則係設為了孔徑100μm。進而,藉由電鍍而進行用以實行層間連接之去膠渣處理以及導電化處理。As a result, even a thin plating thickness ensures reliability. The aperture which can ensure reliability with a plating thickness of 15 to 20 μm is set to a lower aperture of 100 μm at the common hole 24, and the upper aperture is considered to be aligned with the lower aperture, and the lower aperture is considered. When 100 μm was added to the upper surface and 200 μm was added, the hole was set to have a hole diameter of 100 μm. Further, desmear treatment and conductivity treatment for performing interlayer connection are performed by electroplating.

另外,在雷射加工中,除了上述一般之使用正形遮罩的加工以外,亦可適用預先將較雷射之光束徑為更大的銅遮罩作偏移並進行雷射加工的大窗(large window)法。不用說,亦可適用將銅箔與樹脂直接藉由雷射光來貫通的直接雷射法。In addition, in the laser processing, in addition to the above-described general processing using a positive mask, it is also possible to apply a large window in which a copper mask having a larger beam diameter is offset and laser processing is performed in advance. (large window) method. Needless to say, a direct laser method in which copper foil and resin are directly penetrated by laser light can also be applied.

進而,亦可將上述之使用有正形遮罩的加工與大窗法以及直接雷射法作組合。另外,當使用直接雷射法的情況時,如同此實施例1一般,銅箔之厚度係以成為20μm以下為理想。Further, the above-described processing using a positive mask can be combined with a large window method and a direct laser method. Further, when the direct laser method is used, as in the first embodiment, the thickness of the copper foil is preferably 20 μm or less.

接下來,如圖1D(12)中所示一般,在具備有導通用孔24、25之多層配線基材26處,進行15~20μm左右的電解電鍍,並進行層間導通。在到此為止的工程中,亦即是藉由一次的雷射加工以及電鍍工程,而能夠形成藉由導通用孔24所得到之階段通孔27(將第1導電層7’、第2導電層2’、第3導電層3’以及第4導電層20’相互作連接),和藉由導通用孔25所得到之跳階通孔28(將第1導電層7與第4導電層19作連接),並能夠進行從外層起到內層為止之所有的層間導通。Next, as shown in FIG. 1D (12), in general, the multilayer wiring substrate 26 having the conductive holes 24 and 25 is subjected to electrolytic plating of about 15 to 20 μm to conduct interlayer conduction. In the above-mentioned process, the stage through hole 27 obtained by the common hole 24 can be formed by one laser processing and plating process (the first conductive layer 7' and the second conductive layer are formed). The layer 2', the third conductive layer 3' and the fourth conductive layer 20' are connected to each other, and the jump-holes 28 obtained by the common via 25 (the first conductive layer 7 and the fourth conductive layer 19) It is connected) and can conduct all interlayer conduction from the outer layer to the inner layer.

在到此為止的工程中,係得到完成了層間導通之多層配線基材29。又,當需要插入構件等之安裝用的貫通孔的情況時,亦可在導通用孔之形成時,藉由NC鑽頭等來形成貫通孔,並在上述通孔電鍍時,同時形成貫通孔。In the work up to this point, the multilayer wiring substrate 29 in which the interlayer conduction is completed is obtained. Further, when it is necessary to insert a through hole for mounting a member or the like, the through hole may be formed by an NC drill or the like at the time of forming the common hole, and the through hole may be simultaneously formed during the plating of the through hole.

接下來,如圖1D(13)中所示一般,將外層之圖案30藉由通常之感光蝕刻加工手法而形成。此時,若是有在位置於堆疊層16或是16b之內層側的覆蓋層13上所析出之電鍍層,則此亦會被除去。Next, as shown in Fig. 1D (13), the pattern 30 of the outer layer is formed by a usual photosensitive etching process. At this time, if there is a plating layer deposited on the overcoat layer 13 positioned on the inner layer side of the stacked layer 16 or 16b, this will also be removed.

之後,因應於需要,對基板之表面施加銲錫電鍍、鎳電鍍、金電鍍等之表面處理,並形成光敏抗銲劑(photo solder resist)層,並使用銀糊、薄膜等來形成纜線之對外層側的保護層,並進行外形加工,藉由此,而得到於外層具備有纜線部31之8層構造的多層可撓性印刷配線板32。Thereafter, a surface treatment such as solder plating, nickel plating, gold plating, or the like is applied to the surface of the substrate as needed, and a photo solder resist layer is formed, and a silver paste, a film, or the like is used to form a pair of outer layers of the cable. The protective layer on the side and the outer shape processing are used to obtain a multilayer flexible printed wiring board 32 having an eight-layer structure of the cable portion 31 on the outer layer.

圖2,係為展示將晶片尺寸封裝33安裝在跳階通孔11之通孔底側的安裝墊片34上後的狀態之縱剖面圖。此圖2,係為將安裝了晶片尺寸封裝後之8層構造的多層可撓性印刷配線板32以略實際尺寸的比例來作展示者,相對於一般之晶片尺寸封裝的厚度之1mm左右,8層可撓性印刷配線板32之厚度係為0.3mm左右。由此,可以得知8層可撓性印刷配線板32係為極薄。2 is a longitudinal cross-sectional view showing a state in which the wafer size package 33 is mounted on the mounting pad 34 on the bottom side of the through hole of the stepped through hole 11. 2 is a view showing a multilayer flexible printed wiring board 32 having an 8-layer structure in which a wafer size package is mounted, in a ratio of a practical size, which is about 1 mm in thickness with respect to a general wafer size package. The thickness of the eight-layer flexible printed wiring board 32 is about 0.3 mm. Thereby, it can be seen that the eight-layer flexible printed wiring board 32 is extremely thin.

[實施例2][Embodiment 2]

圖3,係為展示本發明之第2實施例的構造之剖面圖。如同於此圖3中所示一般,藉由將在製作堆疊層16b時的部份打穿之場所作變更,能夠將外層之纜線部於第2導電層之電路35處而以單層來形成。藉由此,而得到於外層處具備有單層纜線之8層可撓性印刷配線板37。Fig. 3 is a cross-sectional view showing the structure of a second embodiment of the present invention. As shown in FIG. 3, by changing the place where the portion of the stacked layer 16b is broken, the cable portion of the outer layer can be formed in a single layer at the circuit 35 of the second conductive layer. form. As a result, an eight-layer flexible printed wiring board 37 having a single-layer cable at the outer layer was obtained.

藉由設為此種纜線構造,能夠合適地適用在行動電話之樞紐部等的被要求有彎曲性之部位處。又,藉由如圖3一般地與貫通通孔38作組合,亦能夠將全部層直接作連接。With such a cable structure, it can be suitably applied to a portion where bending is required, such as a hinge portion of a mobile phone. Further, all of the layers can be directly connected by being combined with the through vias 38 as shown in FIG.

[實施例3][Example 3]

圖4,係為展示本發明之第3實施例的構造之剖面圖。如此圖4中所示一般,藉由將堆疊層之一部分殘留並以彎曲了的狀態來作堆疊,而亦能夠將第3導電層之電路39直接連接於相反面之第3導電層3’,而能夠將成為被安裝在第1導電層7處之構件的訊號層之第3導電層3的訊號有效率地連接至相反面之第3導電層3’(相反面之訊號層)處。Fig. 4 is a cross-sectional view showing the structure of a third embodiment of the present invention. As shown in FIG. 4, in general, by stacking one of the stacked layers and stacking in a bent state, the circuit 39 of the third conductive layer can be directly connected to the third conductive layer 3' on the opposite side. Further, the signal of the third conductive layer 3 which is the signal layer of the member mounted on the first conductive layer 7 can be efficiently connected to the third conductive layer 3' (the opposite signal layer) of the opposite surface.

又,作為將4層作連接之層間連接,亦可形成通孔40(將第1導電層7與核心基板21作連接)、階段通孔41(將第1導電層7’、第3導電層3’以及核心基板21相互作連接)、階段通孔27(將第1導電層7’、第2導電層2’、第3導電層3’以及核心基板21相互作連接)、跳階通孔28(將第1導電層7與核心基板21作連接),而能夠進行從外層起直到內層為止之所有的層間導通。Further, as the interlayer connecting four layers, the via hole 40 (the first conductive layer 7 and the core substrate 21 are connected) and the step via 41 (the first conductive layer 7' and the third conductive layer) may be formed. 3' and the core substrate 21 are connected to each other), the stage through hole 27 (the first conductive layer 7', the second conductive layer 2', the third conductive layer 3', and the core substrate 21 are connected to each other), and the stepped through hole 28 (the first conductive layer 7 is connected to the core substrate 21), and all of the interlayer conduction from the outer layer to the inner layer can be performed.

本發明所致之8層構造的多層可撓性印刷配線板,由於係將第1導電層7、7’(CSP安裝層)與第3導電層3、3’(訊號層)作了對位,因此,能夠將第3導電層3、3’之銲墊小口徑化,且藉由在第2導電層2、2’處配置接地層,能夠將電性特性提升。The multilayer flexible printed wiring board having an 8-layer structure resulting from the present invention is in alignment with the first conductive layer 7, 7' (CSP mounting layer) and the third conductive layer 3, 3' (signal layer). Therefore, the pads of the third conductive layers 3 and 3' can be made small in diameter, and the ground layer can be disposed on the second conductive layers 2 and 2' to improve the electrical characteristics.

又,於此情況,由於纜線係可配置在第3導電層3、3’處,因此,能夠以最短距離來連接構件安裝部。當訊號線存在於第2導電層2、2’中的情況時,亦能對將纜線配置在第2導電層2、2’中一事作對應。雖然有必要將連接第1導電層7、7’(CSP安裝層)與第3導電層3、3’(訊號層)的通孔以狹窄節距來作配置,但是,由於跳階通孔28(將第1導電層7與第3導電層3作連接)係為70μm而為小口徑,因此,係能夠配置為節距0.3mm以下。Further, in this case, since the cable can be disposed at the third conductive layers 3, 3', the member mounting portion can be connected at the shortest distance. When the signal line exists in the second conductive layers 2, 2', it is also possible to correspond to the arrangement of the cable in the second conductive layers 2, 2'. Although it is necessary to arrange the through holes connecting the first conductive layers 7, 7' (CSP mounting layer) and the third conductive layers 3, 3' (signal layer) with a narrow pitch, due to the stepped through holes 28 (The first conductive layer 7 and the third conductive layer 3 are connected to each other) and have a small diameter of 70 μm. Therefore, the pitch can be set to a pitch of 0.3 mm or less.

由於上述事態,因此,不需經過成本為高之灌孔電鍍或是其他之孔填埋工程,便能夠將可搭載狹窄節距之高密度CSP的8層構造之多層可撓性印刷配線板作製造。又,針對其他之要件,由於在CSP安裝墊片上係沒有貫通孔,因此,在可安裝CSP之平坦性上亦充分地作了確保。Due to the above-mentioned situation, it is possible to use a multilayer flexible printed wiring board of 8-layer structure capable of carrying a high-density CSP having a narrow pitch without going through a high-cost perforation plating or other hole filling work. Manufacturing. Moreover, since there is no through hole in the CSP mounting spacer for other requirements, the flatness of the mountable CSP is also sufficiently ensured.

進而,由於係可與核心基板分開地而將3層構造之堆疊層直到形成覆蓋層之工程為止而藉由滾輪至滾輪來作連續性的流動,因此,自動化‧少人化係成為可能,而能夠低價地作生產。Further, since the stacked layer of the three-layer structure can be separated from the core substrate until the process of forming the cover layer and the flow is continuously performed by the roller to the roller, the automation and the humanization system are possible, and Can produce at low prices.

1...可撓性絕緣基底材1. . . Flexible insulating substrate

2...銅箔2. . . Copper foil

2a...正形遮罩2a. . . Orthotropic mask

2b...電路圖案2b. . . Circuit pattern

3...銅箔3. . . Copper foil

3a、3b...正形遮罩3a, 3b. . . Orthotropic mask

3c...電路圖案3c. . . Circuit pattern

4...雙面貼銅層積板4. . . Double-sided copper laminated board

5...配線基材5. . . Wiring substrate

6...可撓性絕緣基底材6. . . Flexible insulating substrate

7...銅箔7. . . Copper foil

7a...正形遮罩7a. . . Orthotropic mask

8...單面貼銅層積板8. . . Single-sided copper laminated board

9...接著材9. . . Subsequent

10...導通用孔10. . . Universal hole

11...跳階通孔11. . . Jump through hole

12...配線基材12. . . Wiring substrate

13...聚醯亞胺薄膜13. . . Polyimine film

14...接著材14. . . Subsequent

15...覆蓋層15. . . Cover layer

16、16b...堆疊層16, 16b. . . Stacking layer

17...可撓性絕緣基底材17. . . Flexible insulating substrate

18...通孔18. . . Through hole

19、21...電路圖案19, 21. . . Circuit pattern

21...雙面核心基板twenty one. . . Double-sided core substrate

22...接著材twenty two. . . Subsequent

23...多層配線基材twenty three. . . Multilayer wiring substrate

24、25...導通用孔24, 25. . . Universal hole

26...具備有導通用孔之多層配線基材26. . . Multilayer wiring substrate with conductive holes

27...階段通孔(將第1導電層-第3導電層與核心基板作連接)27. . . Stage via (connecting the first conductive layer - the third conductive layer to the core substrate)

28...跳階通孔(將第1導電層與核心基板作連接)28. . . Jump through hole (connecting the first conductive layer to the core substrate)

29...結束了層間導通之多層配線基材29. . . Multi-layer wiring substrate that ends the interlayer conduction

30...外層圖案30. . . Outer layer pattern

31...纜線部31. . . Cable department

32...具備有纜線部之8層可撓性印刷配線板32. . . 8-layer flexible printed wiring board with cable section

33...晶片尺寸封裝33. . . Wafer size package

34...安裝墊片34. . . Mounting gasket

35...第2導電層之纜線部35. . . Cable portion of the second conductive layer

36...第3導電層之纜線部36. . . Cable portion of the third conductive layer

37...於外層處具備有單層纜線之8層構造的多層可撓性印刷配線板37. . . Multilayer flexible printed wiring board having an 8-layer structure with a single-layer cable at the outer layer

38...貫通通孔38. . . Through hole

39...第3導電層之電路(對相反側之第3導電層直接作連接)39. . . Circuit of the third conductive layer (directly connected to the third conductive layer on the opposite side)

40...通孔(將第1導電層與核心基板作連接)40. . . Through hole (connecting the first conductive layer to the core substrate)

41...階段通孔(將第1導電層以及第3導電層與核心基板作連接)41. . . Stage via (connecting the first conductive layer and the third conductive layer to the core substrate)

101...雙面可撓性印刷配線板101. . . Double-sided flexible printed wiring board

102...雙面可撓性配線基材102. . . Double-sided flexible wiring substrate

103...覆蓋層103. . . Cover layer

104...接著材1056層之配線基材104. . . Next, the wiring substrate of the 1056 layer

106...接著材106. . . Subsequent

107...單面可撓性印刷配線板107. . . Single-sided flexible printed wiring board

1088...層構造之多層可撓性印刷配線板1088. . . Multilayer flexible printed wiring board

[圖1]展示本發明之多層可撓性印刷配線板的製造工程之概念性剖面工程圖。Fig. 1 is a conceptual sectional view showing a manufacturing process of a multilayer flexible printed wiring board of the present invention.

[圖2]展示本發明之其中一種實施例的安裝了CSP之8層構造的多層可撓性印刷配線板之剖面構成圖。Fig. 2 is a cross-sectional structural view showing a multilayer flexible printed wiring board having an 8-layer structure in which a CSP is mounted, in one embodiment of the present invention.

[圖3]展示本發明之其他實施形態的概念性剖面構成圖。Fig. 3 is a conceptual cross-sectional structural view showing another embodiment of the present invention.

[圖4]展示本發明之其他實施形態的概念性剖面構成圖。Fig. 4 is a conceptual cross-sectional structural view showing another embodiment of the present invention.

[圖5]先前技術之工法所致的多層可撓性印刷配線板之概念性剖面構成圖。Fig. 5 is a conceptual cross-sectional structural view of a multilayer flexible printed wiring board by a prior art method.

1...可撓性絕緣基底材1. . . Flexible insulating substrate

2a...正形遮罩2a. . . Orthotropic mask

2b...電路圖案2b. . . Circuit pattern

3a、3b...正形遮罩3a, 3b. . . Orthotropic mask

3c...電路圖案3c. . . Circuit pattern

4...雙面貼銅層積板4. . . Double-sided copper laminated board

5...配線基材5. . . Wiring substrate

6...可撓性絕緣基底材6. . . Flexible insulating substrate

7...銅箔7. . . Copper foil

7a...正形遮罩7a. . . Orthotropic mask

7b...電路圖案7b. . . Circuit pattern

8...單面貼銅層積板8. . . Single-sided copper laminated board

9...接著材9. . . Subsequent

10...導通用孔10. . . Universal hole

11...跳階通孔11. . . Jump through hole

12...配線基材12. . . Wiring substrate

Claims (7)

一種多層可撓性印刷配線板,係為在兩面具備有配線圖案之核心基板之至少單面處具備有3層構造之堆疊(build-up)層的多層可撓性印刷配線板,其特徵為:在從前述堆疊層之外層側起的第1層之第1導電層處,係具備有安裝晶片尺寸封裝之安裝墊片,在從前述堆疊層之外層側起的第2層之第2導電層處,係至少在搭載前述晶片尺寸封裝之區域的正下方具備有接地層,在從前述堆疊層之外層側起的第3層之第3導電層處,係具備有從前述安裝墊片起而經由跳過前述第2導電層之接地層的跳階通孔而被導通的用以將訊號電路作引繞之配線圖案,前述跳階通孔,係為有底之盲通孔,該盲通孔之底係與前述第1導電層之前述安裝墊片的背面相接,同時,具備有與前述跳階通孔相異之將前述堆疊層與前述核心基板作導通的通孔,具備有與前述堆疊層作了一體化之可撓性纜線部。 A multilayer flexible printed wiring board is a multilayer flexible printed wiring board having a three-layer build-up layer on at least one side of a core substrate having a wiring pattern on both sides, and is characterized in that The first conductive layer of the first layer from the outer layer side of the stacked layer is provided with a mounting pad on which a wafer size package is mounted, and the second conductive layer of the second layer from the outer layer side of the stacked layer The layer is provided with a ground layer directly under the region in which the wafer-sized package is mounted, and the third conductive layer of the third layer from the outer layer side of the stacked layer is provided with the mounting spacer And a wiring pattern for guiding the signal circuit to be turned on by skipping the jump hole of the ground layer of the second conductive layer, wherein the jump hole is a blind via having a bottom, the blind The bottom of the through hole is in contact with the back surface of the mounting pad of the first conductive layer, and has a through hole that is different from the stepped through hole and that electrically connects the stacked layer and the core substrate. Flexible cable integrated with the aforementioned stacked layers unit. 如申請專利範圍第1項所記載之多層可撓性印刷配線板,其中,前述可撓性纜線部,係僅藉由前述堆疊層之前述第2導電層又或是前述第3導電層的單層纜線所構成。 The multilayer flexible printed wiring board according to the first aspect of the invention, wherein the flexible cable portion is formed only by the second conductive layer of the stacked layer or the third conductive layer. A single layer cable. 如申請專利範圍第1項或第2項所記載之多層可撓性印刷配線板,其中,係以將前述堆疊層彎折於前述核心 基板之兩面處的狀態而堆疊所成,並具備有將前述堆疊層間作連接的可撓性纜線部。 The multilayer flexible printed wiring board according to the first or second aspect of the invention, wherein the stacked layer is bent to the core The substrate is stacked on both sides of the substrate, and is provided with a flexible cable portion that connects the stacked layers. 一種多層可撓性印刷配線板之製造方法,係為在兩面具備有配線圖案之核心基板之至少單面處具備有3層構造之堆疊層的多層可撓性印刷配線板之製造方法,其特徵為,具備有:(a)在兩面型之可撓性配線基材的其中一面處的導通用孔之形成部位上,形成雷射加工用之開口,並在另外一面上形成包含有接地層以及導通用孔之形成部位的開口之配線圖案的工程;和(b)將前述可撓性配線基材之形成了配線圖案的面與單面型之可撓性配線基材的可撓性絕緣基底材側之面經由接著材來作貼合,並形成3層構造之配線基材的工程;和(c)對於成為前述3層構造之配線基材的從外層側起之第3層的導電層之第3導電層的導通用孔之形成部位的開口進行雷射加工,並形成到達成為從外層側起之第1層的導電層之第1導電層處的有底之導通用孔的工程;和(d)對於前述導通用孔而進行導電化處理,並藉由電解電鍍而形成盲通孔的工程;和(e)在前述第3導電層處形成配線圖案的工程;和(f)在前述第3導電層之前述配線圖案上形成覆蓋層(coverlay)的工程;和(g)將前述堆疊層之形成了前述覆蓋層的側,朝向 另外製作之前述核心基板的側,並經由接著材而堆疊於前述核心基板上以形成堆疊配線基材的工程;和(h)對於前述堆疊配線基材,而形成從前述第1導電層之導通用孔的形成部位起而到達前述核心基板之導通用孔的工程;和(i)對於前述導通用孔進行導電化處理,並藉由電解電鍍而形成通孔的工程。 A method for producing a multilayer flexible printed wiring board, which is characterized in that a multilayer flexible printed wiring board having a three-layered stacked layer is provided on at least one side of a core substrate having a wiring pattern on both sides thereof, and is characterized in that The present invention includes: (a) forming an opening for laser processing on a portion of the conductive hole formed on one of the two-sided flexible wiring substrate, and forming a ground layer on the other surface; And (b) a flexible insulating substrate on which the surface of the flexible wiring substrate on which the wiring pattern is formed and the single-sided flexible wiring substrate; The surface of the material side is bonded to the wiring material to form a wiring substrate having a three-layer structure; and (c) the conductive layer of the third layer from the outer layer side of the wiring substrate which is the three-layer structure. The opening of the portion where the conductive hole of the third conductive layer is formed is subjected to laser processing to form a bottomed conductive hole reaching the first conductive layer of the conductive layer of the first layer from the outer layer side; And (d) for the aforementioned general purpose hole Conducting a conductive process and forming a blind via hole by electrolytic plating; and (e) forming a wiring pattern at the third conductive layer; and (f) forming the wiring pattern on the third conductive layer Forming a coverlay; and (g) forming a side of the aforementioned stacked layer forming the aforementioned cover layer, facing Further, the side of the foregoing core substrate is fabricated and stacked on the core substrate via a bonding material to form a stacked wiring substrate; and (h) for the aforementioned stacked wiring substrate, a guide from the first conductive layer is formed a process of forming a general-purpose hole to reach a common hole of the core substrate; and (i) performing a conductive process on the conductive hole and forming a through hole by electrolytic plating. 如申請專利範圍第4項所記載之多層可撓性印刷配線板之製造方法,其中,前述(e)工程,係包含有:在前述第3導電層處形成配線圖案,同時,在前述第1導電層之導通用孔的形成部位處形成雷射加工用之開口的工程,前述(h)工程,係為對於前述堆疊配線基材,而將前述第1導電層之導通用孔的形成部位之雷射加工用的開口作為遮罩,並藉由雷射加工而形成到達前述核心基板處之導通用孔的工程。 The method for producing a multilayer flexible printed wiring board according to the fourth aspect of the invention, wherein the (e) project includes forming a wiring pattern on the third conductive layer, and the first The formation of the opening for the laser processing is performed at the portion where the conductive hole of the conductive layer is formed, and the (h) engineering is for forming the portion of the conductive hole of the first conductive layer with respect to the stacked wiring substrate. The opening for laser processing is used as a mask, and a project to reach a common hole at the core substrate by laser processing is formed. 如申請專利範圍第4項所記載之多層可撓性印刷配線板之製造方法,其中,前述(h)工程,係為對於前述堆疊配線基材,而在前述第1導電層之導通用孔的形成部位處,藉由鑽頭加工來形成包含有前述核心基板地而將全層作貫通之導通用孔的工程。 The method for producing a multilayer flexible printed wiring board according to the fourth aspect of the invention, wherein the (h) engineering is for the stacked wiring substrate, and the conductive hole of the first conductive layer At the formation site, a process of forming a common hole through which the entire core layer is formed including the core substrate is formed by a drill. 如申請專利範圍第4項所記載之多層可撓性印刷配線板之製造方法,其中, 前述(g)工程,係為將前述堆疊層的形成有覆蓋層之側在朝向另外製作的前述核心基板之側而彎折了的狀態下,來經由接著材而堆疊於前述核心基板之兩面處的工程。The method for producing a multilayer flexible printed wiring board according to the fourth aspect of the invention, wherein In the above (g), the side of the stacked layer in which the cover layer is formed is bent toward the side of the core substrate which is separately formed, and is stacked on both sides of the core substrate via the adhesive. Engineering.
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Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011096293A1 (en) * 2010-02-08 2011-08-11 日本メクトロン株式会社 Method of manufacturing multi-layered printed circuit board
CN102686052A (en) * 2011-03-16 2012-09-19 钒创科技股份有限公司 Flexible printed circuit board and manufacture method thereof
CN103037625B (en) * 2011-09-30 2016-01-13 无锡江南计算技术研究所 With chip window printed substrate remove short-circuiting method
CN103052281A (en) * 2011-10-14 2013-04-17 富葵精密组件(深圳)有限公司 Embedded multilayer circuit board and manufacturing method thereof
CN103579008B (en) * 2012-07-26 2017-11-10 中芯国际集成电路制造(上海)有限公司 A kind of pad structure and preparation method thereof
CN104131278B (en) * 2013-04-30 2016-08-10 富葵精密组件(深圳)有限公司 Melanism liquid medicine and the manufacture method of circuit board
JP6240007B2 (en) * 2014-03-18 2017-11-29 日本メクトロン株式会社 Method for manufacturing flexible printed circuit board and intermediate product used for manufacturing flexible printed circuit board
CN106231788A (en) * 2016-09-30 2016-12-14 深圳天珑无线科技有限公司 Circuit board
JP6732723B2 (en) * 2017-12-14 2020-07-29 日本メクトロン株式会社 Printed wiring board for high frequency transmission
CN114430626B (en) * 2020-10-29 2024-07-19 鹏鼎控股(深圳)股份有限公司 Printed circuit board-to-printed circuit board connection structure and manufacturing method thereof
CN114698225A (en) * 2020-12-31 2022-07-01 深南电路股份有限公司 Battery protection plate, manufacturing method thereof and electronic device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003078062A (en) * 2001-09-05 2003-03-14 Hitachi Cable Ltd Wiring board and production method therefor
TW200814893A (en) * 2006-04-12 2008-03-16 Nippon Mektron Kk Multilayer circuit board having cable section, and manufacturing method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7256354B2 (en) * 2000-06-19 2007-08-14 Wyrzykowska Aneta O Technique for reducing the number of layers in a multilayer circuit board
JP2002329966A (en) * 2001-04-27 2002-11-15 Sumitomo Bakelite Co Ltd Wiring board for manufacturing multilayer wiring board, and multilayer wiring board
JP2006310543A (en) * 2005-04-28 2006-11-09 Ngk Spark Plug Co Ltd Wiring board and its production process, wiring board with semiconductor circuit element
JP4527045B2 (en) * 2005-11-01 2010-08-18 日本メクトロン株式会社 Method for manufacturing multilayer wiring board having cable portion
TWI278268B (en) * 2006-02-23 2007-04-01 Via Tech Inc Arrangement of non-signal through vias and wiring board applying the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003078062A (en) * 2001-09-05 2003-03-14 Hitachi Cable Ltd Wiring board and production method therefor
TW200814893A (en) * 2006-04-12 2008-03-16 Nippon Mektron Kk Multilayer circuit board having cable section, and manufacturing method thereof

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