TWI467672B - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

Info

Publication number
TWI467672B
TWI467672B TW100108174A TW100108174A TWI467672B TW I467672 B TWI467672 B TW I467672B TW 100108174 A TW100108174 A TW 100108174A TW 100108174 A TW100108174 A TW 100108174A TW I467672 B TWI467672 B TW I467672B
Authority
TW
Taiwan
Prior art keywords
bonding
viscosity
bonding layer
manufacturing
semiconductor device
Prior art date
Application number
TW100108174A
Other languages
English (en)
Other versions
TW201145417A (en
Inventor
Yasuo Tane
Yukio Katamura
Atsushi Yoshimura
Fumihiro Iwami
Kazuyoshi Sakurai
Original Assignee
Toshiba Kk
Kyocera Chem Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk, Kyocera Chem Corp filed Critical Toshiba Kk
Publication of TW201145417A publication Critical patent/TW201145417A/zh
Application granted granted Critical
Publication of TWI467672B publication Critical patent/TWI467672B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/27312—Continuous flow, e.g. using a microsyringe, a pump, a nozzle or extrusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
    • H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
    • H01L2224/2732—Screen printing, i.e. using a stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2741—Manufacturing methods by blanket deposition of the material of the layer connector in liquid form
    • H01L2224/27418—Spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2741—Manufacturing methods by blanket deposition of the material of the layer connector in liquid form
    • H01L2224/2742—Curtain coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
    • H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
    • H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/278—Post-treatment of the layer connector
    • H01L2224/27848—Thermal treatments, e.g. annealing, controlled cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/27—Manufacturing methods
    • H01L2224/279—Methods of manufacturing layer connectors involving a specific sequence of method steps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29199—Material of the matrix
    • H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/757—Means for aligning
    • H01L2224/75743—Suction holding means
    • H01L2224/75745—Suction holding means in the upper part of the bonding apparatus, e.g. in the bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/83908—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving monitoring, e.g. feedback loop
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/0665—Epoxy resin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

半導體裝置之製造方法
下述實施形態大致係關於一種半導體裝置之製造方法。
本申請案係基於且主張2010年4月23日申請之先前之日本專利申請案第2010-100321號的優先權的權益，其全文以引用之方式併入本文中。
先前，提出有一種適於使用非接觸型之塗佈裝置，使接合劑噴出至半導體元件之背面(與形成有電路圖案之面相對向之面)的接合劑。
然而，若未考慮半導體裝置之各個組裝步驟、例如密封步驟等並調整由接合劑形成之接合層之黏度，則有生產性下降之虞。
本發明之實施形態提供一種可提高組裝步驟中之生產性之半導體裝置之製造方法。
實施形態之半導體裝置之製造方法包括以下步驟：晶粒黏合(die bonding)步驟，其經由設置於半導體元件之一面上之接合層，將上述半導體元件接合於基材之特定位置；黏合(bonding)步驟，其經由黏合線連接形成於上述半導體元件上之端子與及形成於上述基材上之端子；及密封步驟，其密封上述半導體元件與上述黏合線。並且，對上述黏合步驟中之上述接合層之黏度進行控制，以使其不超過上述密封步驟中之上述接合層之黏度。
根據本發明之實施形態，可提供一種能夠提高組裝步驟中之生產性之半導體裝置之製造方法。
以下，一面參照圖式，一面對本發明之實施形態進行例示。
此處，半導體裝置之製造步驟包括：藉由所謂之前步驟中之成膜‧抗蝕劑塗佈‧曝光‧顯影‧蝕刻‧抗蝕劑去除等而於晶圓之表面形成電路圖案的步驟、檢查步驟、清洗步驟、熱處理步驟、雜質導入步驟、擴散步驟、平坦化步驟等。又，於所謂之後步驟中包括：切割步驟、晶粒黏合步驟、黏合步驟、密封步驟等組裝步驟，及進行功能或可靠性檢查之檢查步驟等。
於本實施形態之半導體裝置之製造方法中，於組裝步驟中，控制設置於半導體元件(半導體晶片)之一面上之接合層之黏度(接合層之硬化程度)、或半導體元件與基材之間之接合層之黏度(接合層之硬化程度)。即，如下所述，對選自由晶粒黏合步驟、黏合步驟、及密封步驟所組成之群中之至少1個步驟中的接合層之黏度進行控制，以使其成為特定之範圍。又，控制形成接合層之接合劑之黏度。再者，由於除控制接合層之黏度(接合層之硬化程度)、接合劑之黏度以外，可使用已知之技術，故省略上述各步驟之說明。
尤其是使用非接觸型之塗佈裝置於半導體元件之背面形成接合層之情形與使用晶粒黏著膜(以下有時稱為「DAF」(Die Attach Film))於半導體元件之背面形成接合層之情形時，在接合層之黏度控制上存在不同點。即，其原因在於，使用非接觸型之塗佈裝置於半導體元件之背面形成接合層係相當於在半導體元件之背面形成DAF，與將已完成之DAF貼附於半導體元件之背面不同。
圖1係用以例示本實施形態之使用非接觸型之塗佈裝置的半導體裝置之製造方法之示意圖。
再者，圖1係概念性地表示下述形成接合層之接合劑之黏度、晶粒黏合步驟中之接合層之黏度、黏合步驟中之接合層之黏度、及密封步驟中之接合層之黏度者。又，圖中之箭頭係概念性地表各步驟中之黏度範圍者。
首先，關於附著於晶圓或半導體元件之背面之接合劑之黏度進行例示。作為接合劑，可例示含有作為溶質之樹脂及溶劑者。
作為樹脂，可例示絕緣性樹脂。又，作為絕緣性樹脂，可例示熱硬化性樹脂或熱塑性樹脂等。於該情形時，就接合性或耐熱性之觀點而言，較佳為採用環氧樹脂、壓克力樹脂、胺酯樹脂、矽樹脂等熱硬化性樹脂，更佳為採用環氧樹脂。作為環氧樹脂，例如可例示雙酚A型環氧樹脂、雙酚F型環氧樹脂、酚醛清漆型環氧樹脂等。再者，可單獨使用該等樹脂，亦可混合2種以上使用。
作為溶劑，可適當地選擇能夠溶解作為溶質之樹脂者。例如可例示γ-丁內酯(GBL(Gamma-Butyrolactone))、環己酮、異佛酮等。再者，可單獨使用該等溶劑，亦可混合2種以上使用。又，亦可視需要添加已知之硬化促進劑、觸媒、填料、偶合劑等。
此處，若於所形成之接合層之表面上存在凹凸，則存在於將半導體元件接合於基材時捲入空氣，而產生空隙之情況。並且，若產生此種空隙，則有產生接合強度下降等不良情況之虞。因此，藉由添加具有抑制表面張力差之作用(調平作用)之添加劑，亦可抑制於接合層之表面上產生凹凸。作為具有抑制表面張力差之作用之添加劑，例如可例示矽系表面調整劑、丙烯酸系表面調整劑、乙烯系表面調整劑等。於該情形時，較佳為採用表面張力之均勻化效果較高之矽系表面調整劑。
作為使接合劑以膜狀附著之方法，例如可例示塗佈方式、噴墨法、噴霧法、霧狀之塗佈方式、輥塗法、網版印刷法、噴射點膠方式、刮漿板方式等。於該情形時，較佳為採用可於不接觸半導體元件之狀態下使接合劑以膜狀附著的噴墨法、噴霧法，更佳為採用可形成厚度均勻之較薄之膜的噴墨法。
此處，於使用噴墨法作為使接合劑以膜狀附著之方法之情形時，為了抑制噴嘴之堵塞，較佳為使接合劑於25℃下之黏度為0.015 Pa‧s以下。再者，該黏度係使用B型黏度計(JIS K 7117-2)進行測定之情況。
於該情形時，接合劑之黏度可藉由作為溶質之樹脂之量與溶劑之量加以控制。
例如，於將溶質設為環氧樹脂、將溶劑設為γ-丁內酯(GBL)之情形時，若將接合劑中之環氧樹脂之比例設為25重量%左右，則可製成25℃下之黏度成為0.015 Pa‧s以下之接合劑。
雖然對使接合劑以膜狀附著時之厚度(膜厚)無限定，但若考慮下述溶劑之蒸散，則較佳為藉由1次塗佈使接合劑之膜厚成為1 μm(微米)左右。又，若使接合劑以膜狀附著時之厚度為10 μm(微米)左右，則亦可抑制於接合層之表面上產生凹凸。
藉由使以如此方式以膜狀附著之接合劑成為B階段狀態，而形成接合層。於使接合劑成為B階段狀態之時，加熱以膜狀附著之接合劑，而使溶劑蒸散。
關於以膜狀附著之接合劑之加熱，可使用加熱器等加熱機構。例如，可於內置有加熱器等之載置部上載置晶圓，經由晶圓而加熱接合劑。
於該情形時，可使加熱溫度(載置部之溫度)例如為40℃以上、120℃。
又，根據接合劑之組成、及使接合劑以膜狀附著時之厚度(膜厚)等而適當地決定適當之加熱溫度。
例如，於將接合劑之溶質設為環氧樹脂，將溶劑設為γ-丁內酯(GBL)，將接合劑中之環氧樹脂之比例設為25重量%，將使接合劑以膜狀附著時之厚度設為10 μm(微米)左右之情形時，可將加熱溫度(載置部之溫度)設為70℃左右。
以如上方式，可於晶圓之背面形成接合層。
於使接合層之厚度較厚之情形時，只要以藉由重複上述程序而積層之方式形成接合層即可。
只要對以此方式於背面形成有接合層之晶圓進行切割，則可獲得背面形成有接合層之半導體元件。背面形成有接合層之半導體元件係於下述之晶粒黏合步驟中經由接合層而與基材接合。
再者，雖例示有對背面形成有接合層之晶圓進行切割而獲得背面形成有接合層之半導體元件之情形，但不限定於此。例如，亦可進行所謂之預切割，於經切割之晶圓之背面形成接合層，藉此獲得背面形成有接合層之半導體元件。
其次，針對晶粒黏合步驟中之接合層之黏度(接合層之硬化程度)加以例示。
於晶粒黏合步驟中，利用針自黏著片上逐個地頂起背面形成有接合層之半導體元件，利用黏合吸嘴(bonding collet)真空吸附並拾取該被頂起之半導體元件。其後，將利用黏合吸嘴拾取之半導體元件經由接合層加壓接合於經加熱之基材之特定位置上。即，於晶粒黏合步驟中，經由設置於半導體元件之一面上之接合層將半導體元件接合於基材之特定位置上。
圖2係用以例示接合層之黏度對接合所造成之影響的示意圖。再者，圖2(a)係用以例示接合層之黏度過高之情形時之接合情況的示意圖。圖2(b)係用以例示接合層之黏度過低之情形時之接合情況的示意圖。
於晶粒黏合步驟中，若接合層之黏度過高，則如圖2(a)所示，有時於接合部分產生條紋狀之接合不均100。若產生此種接合不均100，則有接合強度下降之虞。
另一方面，若接合層之黏度過低，則如圖2(b)所示，有時於接合部分產生微小之空隙101。若產生此種微小之空隙101，則有接合強度下降之虞。又，亦成為將半導體元件與基材接合時產生位置偏移之主要原因。
此種不良情況係於使用非接觸型之塗佈裝置而於半導體元件之背面形成接合層之情形所特有者。另一方面，於將作為已完成之接合層之DAF貼附於半導體元件之背面之情形時，不產生此種不良情況。
根據本發明者等人所獲得之見解，若使接合層於晶粒黏合溫度下之黏度為3000 Pa‧s以下，則可抑制條紋狀之接合不均之產生。又，若使接合層於晶粒黏合溫度下之黏度為10 Pa‧s以上，則可抑制微小空隙之產生、位置偏移等。即，於晶粒黏合步驟中，對接合層於接合時之晶粒黏合溫度下之黏度進行控制，以使其成為10 Pa‧s以上、3000 Pa‧s以下。再者，該等黏度係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定之情況。
因此，如圖1所示，使藉由使以膜狀附著之接合劑成為B階段狀態而形成之接合層之黏度上升至晶粒黏合步驟中之適當之黏度範圍。於該情形時，接合層之黏度可藉由進行加熱處理而上升。又，於該加熱處理中，可藉由加熱溫度、加熱時間等而控制接合層之黏度。再者，對於黏度之測定，例如可使用日本工業標準JIS K 7244-10中規定之已知之黏度測定法。於該情形時，可使用動態黏彈性測定裝置(平行板振盪流變儀)等來測定黏度。
接合層之加熱處理可藉由上述內置有加熱器等之載置部而進行。即，於藉由使以膜狀附著之接合劑成為B階段狀態而形成接合層時，可成為晶粒黏合步驟中之適當之黏度。
又，於上述接合層之形成與晶粒黏合步驟之間，可使用加熱爐等進行加熱處理。作為加熱爐，例如可採用進行預固化(Precure)之固化爐等。作為此種固化爐，可例示於帶式輸送機之上下搭載有加熱器等加熱機構者、或使用熱風進行加熱者等。
又，亦可於晶粒黏合步驟中加熱接合層來進行黏度之控制。然而，即便於在晶粒黏合步驟中進行接合層之黏度控制之情形時，亦較佳為在其前階段預先形成使晶粒黏合步驟中之黏度之控制變得容易之接合層黏度。
於該情形時，例如於接合劑之溶質為環氧樹脂，溶劑為γ-丁內酯(GBL)，接合劑中之環氧樹脂之比例為25重量%，接合層之厚度為10 μm(微米)左右，加熱處理前之接合層於25℃下之黏度為0.015 Pa‧s左右之情形時，可將加熱溫度設為90℃左右，將加熱時間設為1小時左右。若以此方式，則可製成150℃下之黏度為100 Pa‧s左右之接合層。
再者，於0.015 Pa‧s之情形係使用B型黏度計(JIS K 7117-2)進行測定，於150℃下之黏度為109 Pa‧s之情形係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定。
其次，針對黏合步驟中之接合層之黏度(接合層之硬化程度)進行例示。
於黏合步驟中，進行藉由黏合線而連接形成於半導體元件上之端子與形成於基板或導線架等基材上之端子的引線黏合(wire bonding)。
進行此種引線黏合之引線黏合裝置具有黏合頭(bonding head)，於該黏合頭上設置有前端具備黏合工具(bonding tool)之超音波喇叭(ultrasonic horn)。並且，該超音波喇叭與搖臂同時藉由驅動源而擺動驅動。包含金(Au)等之黏合線穿過黏合工具。於該黏合線之前端形成球體，藉由對形成於半導體元件上之端子、形成於基板或導線架等基材上之端子一面施加超音波振動一面加壓，而進行該球體之黏合。
因此，若於黏合步驟中接合層之黏度過低，則有超音波振動會衰減，而產生黏合線之接合不良、接合強度不足等不良情況之虞。
於該情形時，若提高接合層之黏度，則可抑制黏合線之接合不良、接合強度不足等。然而，若過於提高接合層之黏度，則有於下述密封步驟中無法控制接合層之黏度，並且於接合層中產生空隙之虞。因此，於黏合步驟中之接合層之黏度控制時，對接合層之黏度進行控制，以使其至少不超過密封步驟中之接合層之黏度之適當範圍之上限值。
即，其原因在於：若為了提高接合層之黏度而使接合層之溶劑揮發來暫時提高接合層之黏度，則無法降低接合層之黏度。
於該情形時，於將密封步驟中之接合層之黏度控制為適當範圍之上限值以下之情形時，較佳為不超過該值。即，較佳為對黏合步驟中之接合層之黏度進行控制，以使其不超過密封步驟中之接合層之黏度。
根據本發明者等人所獲得之見解，若使接合層於接合溫度下之黏度為15000 Pa‧s以上，則可抑制黏合線之接合不良、接合強度不足等之產生。又，若使其為下述密封步驟中之接合層之黏度之上限值以下，則密封步驟中之接合層之黏度控制變得容易。因此，於黏合步驟中，對接合層於接合溫度下之黏度進行控制，以使其成為15000 Pa‧s以上、107 Pa‧s以下。於該情形時，較佳為對黏合步驟中之接合層之黏度進行控制，以使其不超過密封步驟中之接合層之黏度。再者，該等黏度係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定之情況。
此種黏度之控制，尤其是接合層之黏度依存於其後之步驟之方面，係於使用非接觸型之塗佈裝置於半導體元件之背面形成接合層之情形所特有者。於本實施例中，黏合步驟中之接合層之黏度之上限值依存於其後之密封步驟中之上限值。
因此，如圖1所示，使晶粒黏合步驟中之適當之黏度進一步上升，成為黏合步驟中之適當之黏度。於該情形時，接合層之黏度可藉由進行加熱處理而上升。又，於該加熱處理中，可藉由加熱溫度、加熱時間等控制接合層之黏度。再者，對於黏度之測定，例如可使用日本工業標準JIS K 7244-10中規定之已知之黏度測定法。於該情形時，可使用動態黏彈性測定裝置(平行板振盪流變儀)等來測定黏度。
接合層之加熱處理可於上述晶粒黏合步驟與黏合步驟之間，使用加熱爐等而進行。作為加熱爐，例如可採用進行預固化(Precure)之固化爐等。作為此種固化爐，可例示於帶式輸送機之上下搭載有加熱器等加熱機構者、或使用熱風進行加熱者等。
又，於黏合步驟中，亦可加熱接合層來進行黏度之控制。
於該情形時，例如於接合劑之溶質為環氧樹脂，溶劑為γ-丁內酯(GBL)，接合劑中之環氧樹脂之比例為25重量%，接合層之厚度為10 μm(微米)左右，加熱處理前之接合層於25℃下之黏度為0.015 Pa‧s左右之情形時，可將加熱溫度設為90℃左右，將加熱時間設為1小時左右。若以此方式，則可製成接合時之溫度為150℃之情形時之黏度為100 Pa‧s左右的接合層。再者，該黏度係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定之情況。
其次，關於密封步驟中之接合層之黏度(接合層之硬化程度)進行例示。
於密封步驟中係利用樹脂將連接半導體元件或端子間之黏合線等密封。
進行此種樹脂密封之樹脂塑模裝置包括可開模之固定模與可動模，且具備加熱固定模與可動模之加熱機構。又，藉由將固定模與可動模合模，而形成模腔。
於使用此種樹脂塑模裝置來進行密封之情形時，於模腔內設置接合有半導體元件之基板或導線架等，並將熔融化之樹脂注入填充至模腔內。若以此方式注入填充熔融化之樹脂，則於對應於模腔之形狀而成形之樹脂密封成形體(塑模封裝)內密封連接半導體元件或端子間之黏合線等。
圖3係用以例示接合層之黏度對密封所造成之影響的示意圖。
有時於接合層之中央部形成有凸部(例如異物殘留於接合層中，於半導體元件與基材之間產生間隙之部分)。於形成此種凸部之情形時，若接合層之黏度(接合層之硬化程度)過高，則熔融化之樹脂難以填充至凸部之內部，有時會產生如圖3所示之空隙102。
此處，由於係藉由密封時之注入壓力而填入塑模樹脂，故空隙102消失或縮小。然而，由於在塑模樹脂之注入結束之時間點上壓力得到解放，故產生填入不充分之情況，若接合層之附著力較弱，則有產生剝離之虞。因此，必須降低塑模樹脂之黏度而優化填入性，根據本發明者等人所獲得之見解，可藉由謀求接合層之黏度之最佳化而進一步提高嵌入性。
根據本發明者等人所獲得之見解，若使接合層於密封步驟之溫度下之黏度為107 Pa‧s以下，則可有效地填埋空隙。因此，於密封步驟中，對接合層於密封步驟之溫度(塑模溫度)下之黏度進行控制，以使其成為107 Pa‧s以下。再者，該黏度係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定之情形。
另一方面，密封步驟中之接合層之黏度之下限係依存於前一步驟之接合層之黏度下限。於本實施例之情形時，密封步驟中之接合層之黏度之下限成為作為黏合步驟之下限值的15000 Pa‧s以上。
因此，如圖1所示，對密封步驟中之接合層之黏度進行控制，以使其不會變得過高。於該情形時，亦可視需要藉由加熱處理使接合層之黏度上升。又，於該加熱處理中，可藉由加熱溫度、加熱時間等來控制接合層之黏度。再者，對於黏度之測定，例如可使用日本工業標準JIS K 7244-10中規定之已知之黏度測定法。於該情形時，可使用動態黏彈性測定裝置(平行板振盪流變儀)等來測定黏度。
接合層之加熱處理可於上述黏合步驟與密封步驟之間，使用加熱爐等進行。作為加熱爐，例如可採用進行預固化(Precure)之固化爐等。作為此種固化爐，可例示於帶式輸送機之上下搭載有加熱器等加熱機構者、或使用熱風進行加熱者等。
又，於密封步驟中，亦可加熱接合層來進行黏度之控制。
於該情形時，例如於接合劑之溶質為環氧樹脂，溶劑為γ-丁內酯(GBL)，接合劑中之環氧樹脂之比例為25重量%，接合層之厚度為10 μm(微米)左右，加熱處理前之接合層於25℃下之黏度為0.015 Pa‧s左右之情形時，可將加熱溫度設為90℃左右，將加熱時間設為1小時左右。若以此方式，則可製成25℃下之黏度為100 Pa‧s左右之接合層。再者，該黏度係使用動態黏彈性測定裝置(平行板振盪流變儀)進行測定之情況。
組成A
(接合劑之組成比)
本實施形態之接合劑可藉由以下組成比來製作。例如，混合作為環氧樹脂之jER1001(Japan Epoxy Resins股份有限公司製造)100重量份、作為環氧樹脂用硬化劑之酚樹脂之BRG-556(昭和高分子股份有限公司製造)10重量份、作為矽烷偶合劑之KBM403(信越化學工業股份有限公司製造)2重量份、作為硬化促進劑之2E4MZ(四國化成工業股份有限公司製造)0.2重量份及U-CAT SA 102(San-Apro股份有限公司製造)1.5重量份、作為界面活性劑之BYK-302(BYK-Chemie Japan公司製造)0.2重量份、作為有機溶劑之γ-丁內酯(GBL，三菱化學股份有限公司製造)400重量份，於60℃下加熱溶解而製成之接合劑組合物(組成A)。
表1係將使用組成A之接合劑並控制各組裝步驟中之接合層之黏度之情形的效果作為一例而進行例示者。
又，本實施形態之接合劑亦可藉由以下組成比來製作。例如，混合jER1001(Japan Epoxy Resins股份有限公司製造)60重量份、作為環氧樹脂之EOCN103S(日本化藥股份有限公司製造)40重量份、作為環氧樹脂用硬化劑之酚樹脂之BRG-556(昭和高分子股份有限公司製造)15重量份、作為矽烷偶合劑之KBM403(信越化學工業股份有限公司製造)2重量份、作為硬化促進劑之2E4MZ(四國化成工業股份有限公司製造)1.0重量份及U-CAT SA 102(San-Apro股份有限公司製造)0.5重量份、作為界面活性劑之BYK-302(BYK-Chemie Japan公司製造)0.2重量份、作為有機溶劑之γ-丁內酯(GBL，三菱化學股份有限公司製造)400重量份，於60℃下加熱溶解而製成之接合劑組合物(組成B)。
表2係將使用組成B之接合劑並控制各組裝步驟中之接合層之黏度之情形的效果作為一例而進行例示者。
又，例示以下之組成比作為比較例。例如，混合作為環氧樹脂之jER1001(Japan Epoxy Resins股份有限公司製造)100重量份、作為環氧樹脂用硬化劑之芳香族胺之ELASMER1000(Ihara Chemical股份有限公司製造)15重量份、作為矽烷偶合劑之KBM403(信越化學工業股份有限公司製造)2重量份、作為硬化促進劑之2E4MZ(四國化成工業股份有限公司製造)1.0重量份、作為界面活性劑之BYK-302(BYK-Chemie Japan公司製造)0.2重量份、作為有機溶劑之γ-丁內酯(GBL，三菱化學股份有限公司製造)400重量份，於60℃下加熱溶解而製成之接合劑組合物(組成C)。
表3係將使用組成C之接合劑並控制各組裝步驟中之接合層之黏度之情形的效果作為一例進行例示者。
再者，上述表1~3中之「＊1)晶片位置偏移」、「＊2)空隙」、表1~2中之「＊3)由異物引起之剝離」如下所述。＊1)晶片位置偏移：於半導體元件之X、Y方向(水平面內)之位置偏移為100 μm(微米)以內之情形時，設為「無」。＊2)空隙：利用超音波影像裝置(Hitachi Engineering & Services股份有限公司)拍攝接合狀態，將空隙(Void)為整個面積中之5%以下之情形設為「無」。＊3)由異物引起之剝離：利用超音波影像裝置(Hitachi Engineering & Services股份有限公司)拍攝接合狀態，將空隙(Void)為整個面積中之5%以下之情形設為「無」。
又，於表3中進行例示之情形時，由於在黏合步驟中產生接合不良，故未進行密封步驟之評估。
根據以上說明之實施形態，可實現能夠提高組裝步驟中之生產性的半導體裝置之製造方法。
雖對特定之實施例進行了說明，然而該等實施例僅以例示之方法而揭示，並非用於限制本發明之範圍。事實上，此處說明之新穎之實施例能夠以各種其他形式實施；此外，以不脫離本發明之精神之前提下，可對此處所說明之實施例之形式進行各種省略、替換及變形。隨附之申請專利範圍及其等效形式意在包含本發明之範圍及精神內之形式與變形。再者，上述實施例可相互結合而實施。
100．．．接合不均
101、102．．．空隙
圖1係用以例示本發明之實施形態的半導體裝置之製造方法之示意圖。
圖2係用以例示接合層之黏度對接合所造成之影響之示意圖。圖2(a)係用以例示接合層之黏度過高之情形時的接合情況之示意圖。圖2(b)係用以例示接合層之黏度過低之情形時的接合情況之示意圖。
圖3係用以例示接合層之黏度對密封所造成之影響之示意圖。
(無元件符號說明)

Claims (13)

  1. 一種半導體裝置之製造方法，其特徵在於：包括以下步驟：晶粒黏合步驟，使用非接觸型之塗佈裝置，使設置於半導體元件之一面上之接合層成為B階段狀態後，將上述半導體元件接合於基材之特定位置；黏合步驟，其藉由黏合線連接形成於上述半導體元件上之端子與形成於上述基材上之端子；及密封步驟，其密封上述半導體元件及上述黏合線；並且上述晶粒黏合步驟之晶粒黏合溫度下之上述接合層之黏度為10Pa．s以上、3000Pa．s以下；將上述黏合步驟之黏合溫度下之接合層之黏度控制於15000Pa．s以上、107 Pa．s以下，；對上述密封步驟之溫度下之上述接合層之黏度進行控制，以使其成為15000Pa．s以上、107 Pa．s以下。
  2. 如請求項1之半導體裝置之製造方法，其中上述密封步驟中之上述接合層於密封步驟之溫度下之黏度係藉由對上述接合層進行加熱處理而控制。
  3. 如請求項1之半導體裝置之製造方法，其中對上述晶粒黏合步驟中之上述接合層於晶粒黏合溫度下之黏度係藉由對上述接合層進行加熱處理而控制。
  4. 如請求項1之半導體裝置之製造方法，其中上述黏合步驟中之上述接合層於黏合溫度下之黏度係藉由對上述接合層進行加熱處理而控制。
  5. 如請求項1之半導體裝置之製造方法，其中對形成上述接合層之接合劑於25℃下之黏度進行控制，以使其成為0.015Pa．s以下。
  6. 如請求項5之半導體裝置之製造方法，其中形成上述接合層之接合劑於25℃下之黏度係藉由上述接合劑之溶質之量及上述接合劑之溶劑之量之至少一者而控制。
  7. 如請求項1之半導體裝置之製造方法，其中進行複數次上述接合劑對上述半導體元件之面之附著。
  8. 如請求項7之半導體裝置之製造方法，其中藉由使上述接合劑附著複數次所形成之膜之厚度為10μm左右。
  9. 如請求項1之半導體裝置之製造方法，其中藉由對上述接合劑進行加熱處理而使其成為B階段狀態。
  10. 如請求項9之半導體裝置之製造方法，其中上述附著之接合劑之加熱處理時之溫度為40℃以上、120℃以下。
  11. 如請求項5之半導體裝置之製造方法，其中上述接合劑包含具有抑制表面張力差之作用之添加劑。
  12. 如請求項1之半導體裝置之製造方法，其中於與形成有電路圖案之面相對向之面上形成上述接合層。
  13. 如請求項1之半導體裝置之製造方法，其中使用噴墨法或噴霧法使上述接合劑附著於上述半導體元件之面上。
TW100108174A 2010-04-23 2011-03-10 Manufacturing method of semiconductor device TWI467672B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010100321A JP5680330B2 (ja) 2010-04-23 2010-04-23 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW201145417A TW201145417A (en) 2011-12-16
TWI467672B true TWI467672B (zh) 2015-01-01

Family

ID=44816142

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100108174A TWI467672B (zh) 2010-04-23 2011-03-10 Manufacturing method of semiconductor device

Country Status (3)

Country Link
US (1) US8629041B2 (zh)
JP (1) JP5680330B2 (zh)
TW (1) TWI467672B (zh)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070178623A1 (en) * 2006-01-30 2007-08-02 Renesas Technology Corp. Method of manufacturing semiconductor device
US20070191552A1 (en) * 2006-02-16 2007-08-16 Shin-Etsu Chemical Co., Ltd. Adhesive composition, adhesive film, and method of producing semiconductor device
JP2009111340A (ja) * 2007-10-11 2009-05-21 Hitachi Chem Co Ltd 接着剤付きウエハ、接着剤組成物及び接着剤付きウエハの製造方法
JP4360446B1 (ja) * 2008-10-16 2009-11-11 住友ベークライト株式会社 半導体装置の製造方法及び半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060012020A1 (en) * 2004-07-14 2006-01-19 Gilleo Kenneth B Wafer-level assembly method for semiconductor devices
JP2006199756A (ja) * 2005-01-18 2006-08-03 Sekisui Chem Co Ltd 接合フィルム、電子部品装置の製造方法及び電子部品装置
JP4612450B2 (ja) * 2005-03-28 2011-01-12 株式会社東芝 積層型半導体装置の製造方法
JP5183076B2 (ja) * 2006-02-16 2013-04-17 信越化学工業株式会社 半導体装置の製造方法
JP5380886B2 (ja) 2007-04-18 2014-01-08 日立化成株式会社 接着剤付きウエハ及びその製造方法
CN101755329B (zh) * 2007-07-25 2011-09-21 积水化学工业株式会社 电子部件用胶粘剂、半导体芯片的层叠方法及半导体装置
JP5215609B2 (ja) 2007-07-31 2013-06-19 京セラケミカル株式会社 接着層の形成方法
JP5549071B2 (ja) * 2008-02-28 2014-07-16 日立化成株式会社 接着剤組成物及び接着層
JP2009242605A (ja) * 2008-03-31 2009-10-22 Lintec Corp 粘接着剤組成物、粘接着シートおよび半導体装置の製造方法
JP2010006929A (ja) * 2008-06-26 2010-01-14 Shin-Etsu Chemical Co Ltd 接着剤組成物、接着用シート及びダイシング・ダイアタッチフィルム
EP2366751A3 (en) * 2008-08-27 2012-01-18 Hitachi Chemical Co., Ltd. Photosensitive adhesive composition, and film adhesive, adhesive sheet, adhesive pattern, semiconductor wafer with adhesive layer and semiconductor device using the photosensitive adhesive composition
JP4939574B2 (ja) * 2008-08-28 2012-05-30 日東電工株式会社 熱硬化型ダイボンドフィルム
JP2011233711A (ja) * 2010-04-27 2011-11-17 Toshiba Corp 半導体装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070178623A1 (en) * 2006-01-30 2007-08-02 Renesas Technology Corp. Method of manufacturing semiconductor device
US20070191552A1 (en) * 2006-02-16 2007-08-16 Shin-Etsu Chemical Co., Ltd. Adhesive composition, adhesive film, and method of producing semiconductor device
JP2009111340A (ja) * 2007-10-11 2009-05-21 Hitachi Chem Co Ltd 接着剤付きウエハ、接着剤組成物及び接着剤付きウエハの製造方法
JP4360446B1 (ja) * 2008-10-16 2009-11-11 住友ベークライト株式会社 半導体装置の製造方法及び半導体装置

Also Published As

Publication number Publication date
JP2011233599A (ja) 2011-11-17
US20110263078A1 (en) 2011-10-27
JP5680330B2 (ja) 2015-03-04
US8629041B2 (en) 2014-01-14
TW201145417A (en) 2011-12-16

Similar Documents

Publication Publication Date Title
JP4170839B2 (ja) 積層シート
KR101139740B1 (ko) 반도체 밀봉용 수지 조성물
JP2000003922A (ja) 半導体装置の製法
JP5890960B2 (ja) フリップチップ実装方法
TW201540507A (zh) 保護帶、及使用其之半導體裝置之製造方法、以及半導體裝置
JPWO2007043152A1 (ja) 半導体装置及びその製造方法
TW201448135A (zh) 中空密封用樹脂薄片及中空封裝之製造方法
JP4449325B2 (ja) 半導体用接着フィルム、半導体装置、及び半導体装置の製造方法。
TW201509659A (zh) 電子裝置封裝用樹脂片材及電子裝置封裝之製造方法
TW201727729A (zh) 保護帶及半導體裝置之製造方法
TWI702143B (zh) 保護帶、及使用有其之半導體裝置之製造方法
KR20160045628A (ko) 반도체용 접착제
JP2003258034A (ja) 多層配線基体の製造方法および多層配線基体
KR101763852B1 (ko) Qfn 반도체 패키지, 이의 제조방법 및 qfn 반도체 패키지 제조용 마스크 시트
TW201626517A (zh) 密封用片材、及半導體裝置
TWI467672B (zh) Manufacturing method of semiconductor device
JP5018455B2 (ja) 半導体装置の製造装置および半導体装置の製造方法
JP2009252799A (ja) 半導体装置の製造方法
JP3957244B2 (ja) 半導体装置の製法
JP2011049298A (ja) 半導体装置の製造方法
JP2018098228A (ja) 保護テープ、及びこれを用いた半導体装置の製造方法
TWI599632B (zh) 接著劑層形成方法及接著劑組合物
JP5209329B2 (ja) 半導体装置の製造方法
JP5833303B2 (ja) 接着剤層の形成方法、および接着剤組成物
JP3939849B2 (ja) 半導体装置の製法