TWI444120B - 含有覆蓋直接接合於主機板的晶粒的封裝的主機板組裝件、形成主機板組裝件的方法及計算系統 - Google Patents

含有覆蓋直接接合於主機板的晶粒的封裝的主機板組裝件、形成主機板組裝件的方法及計算系統 Download PDF

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TWI444120B
TWI444120B TW098129247A TW98129247A TWI444120B TW I444120 B TWI444120 B TW I444120B TW 098129247 A TW098129247 A TW 098129247A TW 98129247 A TW98129247 A TW 98129247A TW I444120 B TWI444120 B TW I444120B
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Taiwan
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die
motherboard
package
dca
disposed
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TW098129247A
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TW201026184A (en
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Damion Searls
Weston C Roth
Margaret D Ramirez
James D Jackson
Rainer E Thomas
Charles A Gealer
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Intel Corp
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Description

含有覆蓋直接接合於主機板的晶粒的封裝的主機板組裝件、形成主機板組裝件的方法及計算系統
揭示的實施例一般有關於計算系統，且特別是有關於系統層級板組裝件。
手持式計算裝置-如，例如，行動電話、智慧型電話、行動上網裝置等-典型上包括配置於系統層級電路板上的許多組件。以上所提及的組件可包括積體電路(IC)裝置、被動電氣組件、及種種的輸入/輸出(I/O)裝置、以及這些及/或其他組件的組合。這些組件中的許多組件-雖然也許不是全部-可被組裝至系統層級板上，此系統層級板可被稱為主機板。主機板提供電氣路徑來使這些種種的組件互連，以形成計算系統。
對於手持式計算裝置而言，具有小外形尺寸(form factor)的系統層級板組裝件會是想要的。達成小外形尺寸的一種解決方式為使用封裝疊加(package-on-package(PoP))架構，其一般包括堆疊於下方IC封裝上且與下方IC封裝相電氣耦接之上方IC封裝，各封裝包括配置於基板或其他的晶粒載體上之一個或多個IC晶粒。然而，PoP組件會增加組裝件的總高度(或厚度)。另外，平常在PoP組件的下方基板中所發現之相對較低的層數(例如，2-4層，與主機板相較，主機板可具有6層或更多層)會限制上方封裝與下方封裝之間的佈線彈性。反之，將這兩個封裝並排安裝至主機板上將增加組裝件的表面積。
 【發明內容及實施方式】
揭示的是系統層級組裝件的實施例，此系統層級組裝件包括直接接合於主機板的積體電路晶粒(IC晶粒)，及覆蓋此IC的至少一部分之封裝。直接與主機板或其他電路板相耦接的IC晶粒可被稱為直接晶片接合(DCA)晶粒。此封裝也被接合於此主機板，且此封裝可包括配置於基板或其他晶粒載體上之一個或多個的其他IC。此主機板提供此DCA晶粒與此覆蓋的封裝之間的電氣通訊，以及此DCA晶粒與配置於此主機板上之一個或多個的其他組件之間的電氣通訊。此主機板也可提供此封裝與配置於此主機板上之一個或多個的其他組件之間的電氣通訊。藉由範例，此DCA晶粒可包括處理系統，且此封裝可包括一個或多個記憶體裝置。再者，揭示的是以上所提及的主機板組裝件之製造方法的實施例。
現在回到圖1A，所繪示的是組裝件100的實施例。組裝件100包括配置於主機板110上的一些組件。主機板110包括第一側112及相對的第二側114，且各種的組件可被配置於第一側112及第二側114的任一側或兩側上。此主機板也包括一些電氣路徑(例如，導電跡線、導電貫孔、電鍍通孔等)，其將配置於主機板110上的一個或多個組件互連，以形成計算系統。主機板組裝件100可包含任何型式的計算系統，如手持式計算裝置(例如，行動電話、智慧型電話、行動上網裝置等)或行動計算裝置(例如，膝上型，上網型(net-top)電腦等)。然而，所揭示的實施例不受限於手持式及其他的行動計算裝置，且這些實施例可在其他型式的計算系統(如桌上型電腦及伺服器)中找到應用。
主機板110可包含能提供配置於此板上之一個或多個的各種組件之間的電氣通訊之任何適當型式的電路板或其他基板。在一實施例中，例如，主機板110包含印刷電路板(PCB)，其包含藉由一層介電材料而彼此分離且藉由導電貫孔而互連的多個金屬層。任何一個或多個的金屬層可以希望的電路圖案來予以形成，以佈線(也許與其他金屬層相結合)介於與板110相耦接的組件之間的電氣訊號。然而，應該瞭解所揭示的實施例不受限於上述的PCB，且，進一步的是，主機板110可包含任何其他適當的基板。
直接配置於主機板110之第一側112上的是IC晶粒120。IC晶粒120可包含任何型式的積體電路裝置。在一實施例中，IC晶粒120包括處理系統(單核心或多核心)。例如，此IC晶粒可包含微處理器、圖形處理器、訊號處理器、網路處理器、晶片組等。然而，應該瞭解所揭示的實施例不受限於任何特定型式或種類的IC裝置。
IC晶粒120係藉由一些互連125而電氣耦接至主機板110。互連125可包含能提供晶粒120與主機板110之間的電氣通訊之任何型式的結構及材料。此外，互連125可獨自或與耦接此晶粒及板的其他結構或特徵相結合而使IC晶粒120直接接合於主機板110。在一實施例中，互連125使晶粒120電氣耦接至板110，而且亦協助將此晶粒以機械方式固定於此主機板。然而，在其他實施例中，互連125可提供晶粒120機械式接合於主機板110的最小貢獻。在又一實施例中，一層底部填充材料也可協助將晶粒120以機械方式固定於主機板110，如下將予以說明。如先前所提及的，以上述所提及的組構而直接耦接至電路板的IC晶粒可被稱為直接晶片接合(DCA)晶粒。
如上述，互連125可包含任何適當型式的互連，且可包含任何適當的導電材料。根據一實施例，互連125包含延伸於晶粒120與主機板110之間的一排焊劑凸塊(也許與配置於晶粒120及/或板110上的一排銅柱及/或銅墊相結合)，且焊劑回焊程序可被利用來形成互連125。當然，應該瞭解許多其他型式的互連及材料是可行的(例如，延伸於晶粒120與主機板110之間的接合線(wirebond))。
也配置在主機板110上的是封裝150a。封裝150a覆蓋DCA晶粒120的至少一部分。在一實施例中，DCA晶粒120的周圍完全位在封裝150a的周圍內，而在又一實施例中，DCA晶粒120與封裝150a為面向彼此同心(如圖1A中所顯示)。封裝150a包括基板160a，其具有第一側162a及相對的第二側164a。此外，封裝150a包括配置於此基板的第一側162a上的至少一IC晶粒170a(或也許相對的第二晶粒162b，如將於底下予以說明)。再者，應該注意的是，在某些實施例中，其他組件可被配置於封裝150a上。可被配置於封裝150a上的其他組件包括，例如，電壓調節器，及如同電容器、濾波器、電感器等的被動電氣裝置。
IC晶粒170a可包含任何型式的積體電路裝置。根據一實施例，IC晶粒170a包含記憶體。例如，IC晶粒170a可包含任何型式的動態隨機存取記憶體(DRAM)、任何型式的靜態隨機存取記憶體(SRAM)、或任何型式的快閃記憶體。在又另一實施例中，封裝150a可包含固態硬碟(SSD)，其可具有包括記憶體控制器及一個或多個記憶體晶粒的許多IC晶粒(雖然在其他實施例中，封裝150a可不包括記憶體控制器)。然而，如讀者將瞭解的是，IC晶粒170a可包含任何其他型式或種類的IC裝置。
IC晶粒170a係藉由一些互連175a而電氣耦接至基板160a。互連175a提供晶粒170a與基板160a之間的電氣連接，且這些互連也可協助將此晶粒以機械方式固定於此基板。為了協助將晶粒170a固定於基板160a，一層底部填充材料(未顯示於圖式中)可被配置於晶粒170a與基板160a之間。互連175a可包含任何適當型式的互連，且可包含任何適當的導電材料。根據一實施例，互連175a包含延伸於晶粒170a與基板160a之間的一排焊劑凸塊(也許與配置於晶粒170a及/或基板160a上的一排銅柱及/或銅墊相結合)，且焊劑回焊程序可被利用來形成互連175a。當然，應該瞭解許多其他型式的互連及材料是可行的(例如，延伸於晶粒170a與基板160a之間的接合線)。
基板160a-有時稱為「封裝基板」-可包含能提供IC晶粒170a與下面主機板110之間的電氣通訊之任何適當型式的基板。基板160a也可提供晶粒170a的結構支撐。藉由範例，在一實施例中，基板160a包含圍繞核心層(介電或金屬的核心)所堆積的多層基板-包括交替的介電材料層及金屬層。在另一實施例中，基板160a包含無核心的多層基板。所揭示的實施例也可找出使用其他型式的基板及基板材料(例如，陶瓷、藍寶石、玻璃等)。另外，根據一實施例，基板160a可包含圍繞晶粒170a本身所堆積之交替的介電材料層及金屬層，此程序有時稱為「無凸塊堆積程序」。利用此種方法，可不需要互連175a(因為堆積層可直接被配置於晶粒170a之上)。
基板160a-且因此封裝150a-係藉由一些互連165a而電氣耦接至主機板110。互連165a提供封裝150a與主機板110之間的電氣連接，且這些互連也可協助將封裝150a機械式地固定於此板。在另一實施例中，如下將予以說明，一層底部填充材料可協助將封裝150a機械式地固定於主機板110。互連165a可包含任何適當型式的互連，且可包含任何適當的導電材料。根據一實施例，互連165a包含延伸於基板160a與主機板110之間的一排焊劑凸塊(也許與配置於基板160a及/或板110上的一排銅柱及/或銅墊相結合)，且焊劑回焊程序可被利用來形成互連165a。在一實施例中，回焊的互連165a之高度為使得間隙180存在於DCA晶粒120與封裝150a的下半面164a之間。根據其他實施例，回焊的互連165a之高度為使得晶粒120的至少部分接觸下半面164a。
除了DCA晶粒120與封裝150a之外，一個或多個額外組件可被配置於主機板110之側面112，114的任一側或兩側上。藉由範例，如圖式中所顯示，組件130a、130b、130c可被配置於主機板110的第一側112上，且組件140a，140b可被配置於主機板110的相對側114上。如例如是金屬墊或島的一些電氣端點(未顯示於圖式中)可被配置於此主機板的第一側112及第二側114上，以形成與這些額外組件的電氣連接。可被配置於主機板110上的額外組件包括其他IC裝置(例如，處理裝置、記憶體裝置、訊號處理裝置、無線通訊裝置等)、電源輸送組件(例如，電壓調節器、如電池的電源供應器、及/或如電容器的被動裝置)、及一個或多個I/O裝置(例如，天線、麥克風、鍵盤或如觸控螢幕顯示器的其他資料輸入裝置、及/或圖形裝置等)，以及這些及/或其他裝置的任何組合。
如上述，主機板110提供使配置於此板上的組件120、130a-c、140a-b、150a互連的電氣路徑，以形成計算系統。在一實施例中，主機板110提供使DCA晶粒120與封裝150a相電氣耦接的至少一電氣路徑。在另一實施例中，主機板110提供使DCA晶粒120與配置於此主機板上的另一組件(例如，組件130a-c，140a-b中的任一組件)相電氣耦接的至少一電氣路徑。在又一實施例中，主機板110提供使封裝150a與配置於此主機板上之組件中的另一組件相電氣耦接之至少一電氣路徑。例如，主機板110可包括使DCA晶粒120與封裝150a相耦接的電氣路徑190a、使DCA晶粒120耦接至組件130a的電氣路徑190b、使封裝150a耦接至組件130c的電氣路徑190c、及使IC封裝150a耦接至配置於此主機板的相對側114上之組件140b的電氣路徑190d。電氣路徑190a-d可包含由任何適當的導電材料(例如，銅)所製造之任何適當的導電結構(例如，跡線、貫孔、電鍍通孔等的任何組合)。所繪示的電氣路徑190a-d被呈現作為範例，以協助瞭解所揭示的實施例；然而，應該瞭解的是，實際上，此主機板可包括許多額外的電氣路徑(也許數百或甚至數千的這些路徑)，以使配置於此主機板上之一個或多個的各種組件互連。
在另一實施例中，輻射屏蔽(未顯示於圖式中)可被配置於主機板110上，且延伸於DCA晶粒120及封裝150a(或150b或150c)之上。DCA晶粒120及/或封裝150a可產生電磁輻射，且此輻射屏蔽可抑制此電磁輻射的逃離，以防止與鄰近晶粒120及封裝150a的敏感電氣組件之電磁干擾。此輻射屏蔽可包含任何適當的導電材料(例如，導電金屬，如鎳、銀、鋁、銅、及這些及/或其他金屬的合金)，且此屏蔽可具有任何適當的形狀及組構。在一實施例中，此輻射屏蔽係電氣耦接且接地至主機板110。再者，在其他實施例中，此輻射屏蔽也可協助去除來自封裝150a及/或DCA晶粒120的熱。在另一實施例中，其他的熱解決方案(例如，散熱器、散熱片等)可獨自或與輻射屏蔽結合而被配置於主機板110上。
應該強調的是，所揭示的實施例不受限於圖1A中所顯示的組構，且進一步而言，其他型式的封裝可被配置於DCA晶粒120之上。另外的實施例係繪示於底下說明之圖1B及1C的各圖。在圖1B及1C的各圖中，對於這些組裝件的類似元件會保持使用來識別圖1A中所顯示之組裝件100的某些特徵之參考標號。另外，在底下的本文中，不會重複先前於圖1A的討論中所述之類似元件的說明。
首先參考圖1B，所繪示的是組裝件100的另一實施例。圖1B的實施例與圖1A的實施例類似，但是圖1B的組裝件包括以晶粒向下(die-down)組構所配置的封裝150b。更具體而言，封裝150b包含基板160b，其具有第一側162b及相對的第二側164b。封裝150b係藉由一些互連165b而電氣耦接至此主機板。IC晶粒170b係配置於此基板的第二側164b，且藉由一些互連165b而電氣耦接至基板160b。IC晶粒170b面向DCA晶粒120。在一實施例中，間隙180b存在於IC晶粒170b與DCA晶粒120之間，然而在其他實施例中，IC晶粒170b的部分會接觸下面的DCA晶粒120。再者，在又一實施例中，如底下將予以說明的，一層底部填充材料(未顯示於圖1B中)可被配置於基板160b與主機板110之間，且此底部填充層也可存在於DCA晶粒120與主機板110之間的空間中、晶粒170b與晶粒120之間的間隙180b中、及/或晶粒170b與基板160b之間的空間中。再者，在又另一-實施例中，除了IC晶粒170b之外，一個或多個額外的IC晶粒可被配置於基板160b的相對側162b上。
接著參考圖1C，所繪示的是組裝件100的又一實施例。圖1C的實施例與圖1A的實施例類似，但是圖1C的組裝件包括具有配置於其上的晶粒堆疊之封裝150c。更具體而言，封裝150c包含基板160c，其具有第一側162c及相對的第二側164c。封裝150c係藉由一些互連165c而電氣耦接至主機板110。以堆疊組構所配置的一些晶粒170c係配置於基板160c上。晶粒170c可藉由膠合層178c而被接合於基板160c及彼此。在另一實施例中，間隔物可被配置於兩個相鄰的晶粒170c之間。一些互連175c-在此例中為接合線-可使晶粒170c中的各晶粒電氣耦接至基板160c及/或彼此。在一實施例中，晶粒170c的全部包含相同型式的積體電路，然而在其他實施例中，晶粒170c中的任一晶粒可與這些晶粒中的另一晶粒不同。在一實施例中，晶粒170c中的各晶粒包含記憶體裝置。在另一實施例中，晶粒170c中的至少一晶粒包含記憶體控制器，而此堆疊中之晶粒170c中的其他晶粒包含記憶體裝置。在一實施例中，封裝150c包含固態硬碟(SSD)。根據一實施例，間隙180c存在於基板160c與DCA晶粒120之間，然而在其他實施例中，晶粒120的部分可接觸下面的基板160c。再者，在又一實施例中，如底下將予以說明的，一層底部填充材料(未顯示於圖1C中)可被配置於基板160b與主機板110之間，且此底部填充層也可存在於DCA晶粒120與主機板110之間的空間中，及/或DCA晶粒120與基板160c之間的間隙180c中。
現在回到圖2，所繪示的是主機板組裝件之製造方法的實施例，如例如是圖1A-1C中所顯示的組裝件100之實施例中的任一實施例。圖2之方法的各種實施例被進一步繪示於圖3A至3E，且應該參考如底下本文中所稱呼的這些圖式。再者，應該注意的是，在圖3A-3E的各圖中，對於類似元件會保持使用來識別圖1A中所顯示之組裝件100的某些特徵之參考標號，且在底下的本文中，不會重複這些類似元件的說明。
首先參考圖2中的方塊210，晶粒係直接接合於主機板。這係繪示於圖3A中，其中IC晶粒120已藉由一些互連125而被直接接合於主機板110。可實施回焊操作，以產生DCA晶粒120與主機板110之間的互連125。然而，根據其他實施例，回焊操作可以不立即緊接著主機板110上之晶粒120的安置來予以實施。在另一實施例中，如方塊205中所提及且如圖3A中所顯示，在DCA晶粒120的接合之前，一個或多個其他組件可被固定於主機板110(例如，配置於此主機板的相對側114上之組件140a，140b)。然而，在其他實施例中，在DCA晶粒120之前，沒有組件被接合於此主機板。
如方塊220中所提及，封裝係接合於此主機板，且此封裝係配置於先前接合的DCA晶粒之至少部分之上。這係繪示於圖3B及3C中，其中封裝150a已被配置於DCA晶粒120上，且藉由互連165a而與此主機板相耦接。側視圖係顯示於圖3B中，而平面圖係顯示於圖3C中。如最佳於圖3C中所視，在所繪示的實施例中，封裝150a與DCA晶粒120一般為彼此同心，且晶粒120及互連125位於互連165a的圖案內。在另一實施例中，如方塊225中所提及，額外組件可伴隨封裝150a而被配置於主機板110上。這係繪示於圖3B中，其中組件130a-130c也已被配置於主機板110上(為了圖示的清楚及容易起見，圖3C已省略組件130a-130c)。在一實施例中，實施回焊操作，以完成延伸於封裝150a與主機板110之間的互連165a之形成，且使組件130a-c接合至主機板110。在另一實施例中，可實施單一回焊操作，以產生互連125及互連165a，而在又另一實施例中，此單一回焊操作也可使組件130a-c接合至主機板110。然而，在其他實施例中，可實施回焊操作，以僅產生互連165a(且實施之前的回焊操作，以僅產生互連125)。
參考方塊230，底部填充材料可被配置於此主機板上。這係繪示於圖3D中，其中材料已被配置於封裝150a與主機板110之間，以形成底部填充層105，此底部填充層105也填充DCA晶粒120與基板160a之間的空間180a，以及DCA晶粒120與主機板110之間的空間。底部填充層105可包含任何適當的材料，如液體或預加的環氧化合物。另外，此底部填充材料可使用任何適當的技術(例如，毛細管流動、噴膠(jet dispense)、預置板等)予以施加。在一實施例中，在底部填充層105的施加之後，實施加熱程序，以固化此底部填充層。在又另一實施例中，在回焊操作(例如，形成互連165a的回焊操作)期間，此底部填充層被固化。在又一實施例中，底部填充材料可以兩個步驟予以施加。例如，在一步驟中，底部填充層可被施加於DCA晶粒120之下，而在第二步驟中，底部填充層可被施加於封裝150a之下。
在另一實施例中，如方塊240中所提及，在底部填充之後(及/或在此封裝的接合之後)，可實施一個或多個額外程序。例如，額外組件(例如，組件130a-c及/或組件140a-b)可被固定於主機板110，且與主機板110相電氣耦接。再次，如上述，在組裝的較早階段，這些組件的一個或多個組件可被固定於此主機板。根據一實施例，形成來耦接這些額外組件130a-c，140a-b的一個或多個額外組件之電氣互連係在使用來形成互連125及/或互連165a的相同回焊操作中予以回焊。可實施的其他額外程序包括組件的機械式接合(例如，藉由鉚釘、夾鉗、螺絲、及其他固定件等的接合)，以及測試。
上述的實施例會顯現出許多顯著的特徵。例如，組裝件100的全部高度或厚度H(見圖1A)可相對小(例如，厚度H可約為1.6mm，而標準PoP組裝件之對應的厚度可約為2.7mm)。藉由另一範例，主機板110可具有相對較大數量的金屬層(例如，6層或更多層)，其可提供DCA晶粒120與封裝150a(及/或配置於主機板110上的其他組件)之間之增加的佈線彈性。再者，所揭示的實施例之應用不應該導致此主機板組裝件之全部尺寸或底面積的任何增加。
上述詳細的說明及附圖僅為例示而不是限制。其基本上已被提供用於所揭示的實施例之清楚且充分的瞭解，而且將從此瞭解沒有多餘的限制。在不脫離所揭示的實施例之精神及後附申請專利範圍的範圍之下，熟習此項技術者可想出在此所述的實施例之許多附加、刪除、及修改，以及替代的配置。
100．．．組裝件
105．．．底部填充層
110．．．主機板
112．．．第一側
114．．．第二側
120．．．IC晶粒
125．．．互連
130a．．．組件
130b．．．組件
130c．．．組件
140a．．．組件
140b．．．組件
150a．．．封裝
150b．．．封裝
150c．．．封裝
160a．．．基板
160b．．．基板
160c．．．基板
162a．．．第一側
162b．．．第一側
162c．．．第一側
164a．．．第二側
164b．．．第二側
164c．．．第二側
165a．．．互連
165b．．．互連
165c．．．互連
170a．．．IC晶粒
170b．．．IC晶粒
170c．．．晶粒
175a．．．互連
175c．．．互連
178c．．．膠合層
180a．．．間隙
180b．．．間隙
180c．．．間隙
190a．．．電氣路徑
190b．．．電氣路徑
190c．．．電氣路徑
190d．．．電氣路徑
圖1A係繪示包括具有覆蓋直接接合於主機板之IC晶粒的封裝之主機板的組裝件之一實施例的正視圖之概圖。
圖1B係繪示包括具有覆蓋直接接合於主機板之IC晶粒的封裝之主機板的組裝件之另一實施例的正視圖之概圖。
圖1C係繪示包括具有覆蓋直接接合於主機板之IC晶粒的封裝之主機板的組裝件之另外實施例的正視圖之概圖。
圖2係繪示製造包括具有覆蓋直接接合於主機板之IC晶粒的封裝之主機板的主機板組裝件之方法的一實施例之方塊圖。
圖3A-3E係繪示製造圖2中所顯示的主機板組裝件之方法的實施例之概圖。
100．．．組裝件
110．．．主機板
112．．．第一側
114．．．第二側
120．．．IC晶粒
125．．．互連
130a．．．組件
130b．．．組件
130c．．．組件
140a．．．組件
140b．．．組件
150a．．．封裝
160a．．．基板
162a．．．第一側
164a．．．第二側
165a．．．互連
170a．．．IC晶粒
175a．．．互連
180a．．．間隙
190a．．．電氣路徑
190b．．．電氣路徑
190c．．．電氣路徑
190d．．．電氣路徑

Claims (24)

  1. 一種主機板組裝件，包含：主機板；積體電路晶粒(DCA晶粒)，係直接接合於該主機板；以及封裝，係直接接合於該主機板且覆蓋該DCA晶粒的至少一部分；其中該主機板包括使該DCA晶粒耦接至該封裝的至少一電氣路徑，及使該DCA晶粒耦接至配置於該主機板上的電氣端點之至少一其他的電氣路徑，該電氣端點用以與另一組件相耦接。
  2. 如申請專利範圍第1項之組裝件，其中該封裝包含：基板；以及至少一其他的積體電路(IC)晶粒，係配置於該基板上。
  3. 如申請專利範圍第2項之組裝件，其中該至少一其他的IC晶粒面向該DCA晶粒。
  4. 如申請專利範圍第2項之組裝件，其中該DCA晶粒包含處理系統，而該至少一其他的IC晶粒包含記憶體。
  5. 如申請專利範圍第1項之組裝件，更包含配置於該封裝與該主機板之間的底部填充材料。
  6. 一種計算系統，包含： 主機板；積體電路晶粒(DCA晶粒)，係直接接合於該主機板；封裝，係直接接合於該主機板且覆蓋該DCA晶粒的至少一部分；以及至少一其他的組件，係配置於該主機板上；其中該主機板包括使該DCA晶粒耦接至該封裝的至少一電氣路徑，及使該DCA晶粒耦接至該至少一其他的組件之至少一其他的電氣路徑。
  7. 如申請專利範圍第6項之計算系統，其中該封裝包含：基板；以及至少一其他的積體電路(IC)晶粒，係配置於該基板上。
  8. 如申請專利範圍第7項之計算系統，其中該至少一其他的IC晶粒面向該DCA晶粒。
  9. 如申請專利範圍第6項之計算系統，更包含配置於該封裝與該主機板之間的底部填充材料。
  10. 如申請專利範圍第6項之計算系統，其中該DCA晶粒包含處理系統，該封裝包括至少一記憶體晶粒，而該至少一其他的組件包含無線通訊裝置。
  11. 如申請專利範圍第10項之計算系統，更包含：圖形顯示器，係配置於該主機板上，該主機板包括使該圖形顯示器耦接至該DCA晶粒及該封裝的至少一個之 電氣路徑；以及電源供應器，係配置於該主機板上，該主機板使該DCA晶粒及該封裝電氣地耦接至該電源供應器。
  12. 如申請專利範圍第10項之計算系統，更包含配置於該主機板上的資料輸入裝置。
  13. 一種計算系統，包含：主機板；積體電路晶粒(DCA晶粒)，係直接接合於該主機板，該DCA晶粒包括處理系統；以及封裝，係直接接合於該主機板且覆蓋該DCA晶粒的至少一部分，該封裝包括晶粒堆疊，該晶粒堆疊具有至少第一積體電路(IC)晶粒及第二IC晶粒；其中該主機板包括使該DCA晶粒耦接至該封裝的至少一電氣路徑，及使該DCA晶粒耦接至配置於該主機板上的另一組件之至少一其他的電氣路徑。
  14. 如申請專利範圍第13項之計算系統，其中該另一組件包含配置於該主機板上的圖形顯示器。
  15. 如申請專利範圍第14項之計算系統，其中該圖形顯示器包含用於資料輸入的觸控螢幕。
  16. 如申請專利範圍第13項之計算系統，其中該第一IC晶粒及該第二IC晶粒的各IC晶粒包含記憶體。
  17. 如申請專利範圍第16項之計算系統，其中該封裝包含固態硬碟(SSD)。
  18. 如申請專利範圍第17項之計算系統，其中該 SSD包括配置於該晶粒堆疊中的記憶體控制器。
  19. 一種形成主機板組裝件的方法，包含：將積體電路晶粒(DCA晶粒)直接接合於主機板；將封裝放置於覆蓋該DCA晶粒的至少一部分之位置處且使該封裝直接接合於該主機板；提供介於該DCA晶粒與該封裝之間之經過該主機板的電氣路徑；以及提供介於該DCA晶粒與配置於該主機板上的端點之間之經過該主機板的電氣路徑，該端點用以與另一組件相耦接。
  20. 如申請專利範圍第19項之方法，更包含使組件電氣耦接至該端點。
  21. 如申請專利範圍第20項之方法，更包含實施回焊操作，以使該封裝接合至該主機板，其中在該回焊操作期間，該組件係電氣耦接至該端點。
  22. 如申請專利範圍第19項之方法，更包含將底部填充材料分配於該DCA晶粒與該主機板之間的空間中，及該封裝與該主機板之間的空間中。
  23. 如申請專利範圍第22項之方法，其中該底部填充材料佔據該DCA晶粒與該封裝之間的空間。
  24. 如申請專利範圍第19項之方法，更包含實施單一回焊操作，以使該DCA晶粒接合至該主機板，且使該封裝接合至該主機板。
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WO2010027890A2 (en) 2010-03-11
KR20130051517A (ko) 2013-05-20
DE112009002155B4 (de) 2023-10-19
US10251273B2 (en) 2019-04-02
BRPI0913484A2 (pt) 2016-08-30
JP2012502476A (ja) 2012-01-26
RU2011113546A (ru) 2012-10-20
DE112009002155T5 (de) 2012-01-12
US10555417B2 (en) 2020-02-04
JP5448003B2 (ja) 2014-03-19
CN102150262A (zh) 2011-08-10
KR20110039396A (ko) 2011-04-15
TW201026184A (en) 2010-07-01
CN102150262B (zh) 2013-02-27
GB2475658B (en) 2012-11-28
US20190182958A1 (en) 2019-06-13
JP6232681B2 (ja) 2017-11-22
WO2010027890A3 (en) 2010-05-20
JP2014030042A (ja) 2014-02-13
BRPI0913484B1 (pt) 2019-06-04
GB201104809D0 (en) 2011-05-04
RU2480862C2 (ru) 2013-04-27
US20100061056A1 (en) 2010-03-11
GB2475658A (en) 2011-05-25

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