TWI427754B - 在鋸道上使用通孔晶粒之封裝中的封裝 - Google Patents

在鋸道上使用通孔晶粒之封裝中的封裝 Download PDF

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Publication number
TWI427754B
TWI427754B TW097115853A TW97115853A TWI427754B TW I427754 B TWI427754 B TW I427754B TW 097115853 A TW097115853 A TW 097115853A TW 97115853 A TW97115853 A TW 97115853A TW I427754 B TWI427754 B TW I427754B
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Taiwan
Prior art keywords
semiconductor die
die
thv
package
semiconductor
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TW097115853A
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English (en)
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TW200903765A (en
Inventor
Byung Tai Do
Heap Hoe Kuan
Seng Guan Chow
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Stats Chippac Ltd
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Priority claimed from US11/744,657 external-priority patent/US7569421B2/en
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of TW200903765A publication Critical patent/TW200903765A/zh
Application granted granted Critical
Publication of TWI427754B publication Critical patent/TWI427754B/zh

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    • H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
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Description

在鋸道上使用通孔晶粒之封裝中的封裝
本發明概括有關於半導體元件，而更特別有關於通孔(THV)之可堆疊半導體元件。
就發展中的趨勢而言，半導體製造商已經逐漸增加採用半導體元件的三維(3D)互連以及封裝。三維的互連得到諸如尺寸減小、減短的互連長度以及各別封裝中不同功能的元件整合之優點。
實現3D互連的諸多不同方式其中之一種包含使用THV技術。THV能夠設置在半導體元件或晶粒之內、或者順著鋸道的引導而位於晶粒之外部。
然而，目前的THV技術呈現數種的限制。設置於半導體元件之內的導孔會侷限半導體元件內具有額外電路之自由度。如同所能察知的，THV個別的位置會排斥其位置上的電路之放置。所以，限制了半導體元件的功能，並因而限制了使用該半導體元件之裝置。
設置於半導體元件外部的導孔，亦即順著鋸道之引導的導孔，需要較寬的鋸道以適應通孔之產生。所以，每個晶圓的半導體元件之產量降低。
有鑒於前述者，本發明之目標為提供一種THV可堆疊 之半導體元件，而不會有前述的任何一種伴隨之限制。
所以，在某一實施例中，本發明為一種半導體元件，包含一具有上、下與周圍表面之第一晶粒。一焊墊形成於該上表面之上。一有機材質連接至該第一晶粒、並且配置於其周圍表面之周邊。一通孔形成於有機材質之中。一金屬軌跡會將通孔連接至焊墊。將一傳導性材質沈積於通孔之中。重新分佈層(RDL)具有配置於第一晶粒之上表面上的互連焊墊。
在另一實施例中，本發明為一種半導體封裝中的封裝(PiP)元件，包含一第一晶粒，其合併順著第一晶粒周圍表面所配置的THV。該第一晶粒配置於一基板或導線架結構之上。一第二晶粒電連接至第一晶粒之THV、或者電連接至基板或導線架結構。一包封劑形成於第一晶粒與第二晶粒之上。
在另一實施例中，本發明為一種製造半導體元件之方法，所包含的步驟為：提供一具有上、下與周圍表面之第一晶粒、提供一形成於該上表面之上的焊墊、提供一連接至該第一晶粒並且配置於其周圍表面之周邊的有機材質、提供一形成於有機材質之中的通孔、提供一將通孔連接至焊墊的金屬軌跡、提供一沈積於通孔之中的傳導性材質、以及提供一具有配置於第一晶粒上表面之上的互連焊墊之RDL。
在另一實施例中，本發明為一種製造半導體PiP元件之方法，所包含的步驟為：提供一第一晶粒(其合併順著第 一晶粒周圍表面所配置的THV，且該第一晶粒配置於一基板或導線架結構之上)、提供一電連接至第一晶粒的THV或者電連接至基板或導線架結構之第二晶粒、以及提供一形成於第一晶粒與第二晶粒之上的包封劑。
在以下參照圖式的說明中，以一個或者多個實施例來說明本發明，其中相似的參考數字代表相同或者相似的構件。儘管依據實現本發明目的之最佳模式來說明本發明，然熟知該項技術者將會察知的是，其意指涵蓋替代物、修改、以及等效物，只要包含於所附的申請專利範圍以及由以下的揭示事項和附圖所支持的等效物所界定之本發明精神與範疇之內皆可。
在以下的說明與申請專利範圍中，可使用術語”包括”與”包含”、以及其衍生詞，並且意指彼此為同義字。此外，在以下的說明與申請專利範圍中，可使用術語”耦合”與”連接”、及其衍生詞。”連接”可用來指示彼此直接的實體接觸或者電接觸。”耦合”可意謂兩個或者多個構件直接的實體接觸或者電接觸。然而，”耦合”同樣也可意謂兩個或者多個構件彼此並非直接接觸，而仍彼此共同操作或者互動。例如，”耦合”可意謂兩個或者多個構件彼此不接觸，而透過其他構件或中間構件，間接地連結在一起。最後，術語”在某物之上”、”位於某物之上”、以及”處於某物上方”可用來指示兩個或者多個構件彼此直接實體接觸。然而，”處於 某物上方”同樣也可意謂兩個或者多個構件彼此並非直接接觸。例如，”處於某物上方”可意謂其中一個構件在另一構件之上，而彼此並無接觸，並且在該兩個構件之間，可具有另一構件或其他多個構件。
圖1闡述製作一晶圓級晶片尺度封裝的示範習知技術之方法100。數個半導體元件102則是從一晶圓中所切割。每個半導體元件102具有數個突出焊墊104，設置於元件之作用表面之上。
多個半導體元件102配置於可回縮薄膜106的上表面之上。藉由一框架108緊固著可回縮薄膜106。藉由一固定配件110來固定框架108，且在一工作平台112之上，置換可回縮薄膜106，之後並將之拉緊。
平台112能夠相對於固定配件110而向上移動。藉由一切割機將晶圓切割為如所示已經包封於半導體封裝之中的數個半導體元件102，之後並且藉由切割機118將之鋸開。柱軸114會向上移動，藉以相對於固定配件110舉起平台112。
本發明依照示範習知技術的製造方法進行改善，提出一種THV半導體元件，在某些實施例中，針對特定應用與實施而堆疊在一起。
圖2A與2B分別以俯視圖與側視圖闡述THV可堆疊半導體元件200之第一實施例。元件200具有一合併的晶粒202。元件200包含沈積於半導體晶粒202的作用側邊上之數個焊墊204。焊墊204能夠藉由電鍍處理而沈積於 晶粒202的電極終端上，或者以其他之方式亦可。焊墊204之材質能夠由傳導性金屬所製作，諸如鋁(Al)。焊墊204能夠進行焊接處理而結合至基板。
一系列的金屬軌跡206將焊墊204電耦合至導孔226。如圖2B所示的，導孔226從晶粒202的作用上表面212與周圍材質210垂直延伸至晶粒的下表面和周圍材質210，此與THV的設計一致。
就本發明之目的而指稱為”有機材質”的周圍材質210沈積於晶粒202周圍表面214之周邊，如所示。有機材質210為一種改良且不同於習知技術，如同將要進一步說明的。有機材質能夠包含諸如苯並環丁烯(BCB)、聚醯亞胺(PI)、或者相似之材質。如所示，導孔226形成於有機材質210中，並且成列組織之。在本實施例200中，導孔226形成於有機材質210每一側邊之中，例如側邊216與218，藉以完整地環繞著晶粒202之周圍。數個焊墊204其中每個皆電耦合至數個其中每個的導孔226。
如所示，能夠以各種不同組態來形成THV 226，例如順著數列之組態。再者，能夠以各種不同的實施例來形成如本圖所示的半切導孔或者完整未切的導孔，藉以適應特殊的實施。半導體元件200能夠藉由多種組態而與額外的晶粒202堆疊或者耦合。
圖3A與3B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第一步驟。一系列的焊墊204形成於晶圓300的作用表面上， 如所示的。以鋸道引導302來標出其晶圓。
圖4A與4B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第二步驟。藉由一切割源402，將晶圓300分割而成為所示的部件400。切割源402能夠包含一種鋸或者雷射切割工具。
在分割之前，將晶圓300置於一切割膠帶404上，其在分割處理期間中，將各不相同的區段400保持於適當之處。在分割處理之後，一系列的間隔406形成於各別的區段400，如所示。
圖5A與5B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第三步驟。在所示的各別區段中，晶圓300接受一種擴展處理。能夠藉由使用擴展臺將切割膠帶404拉伸，藉以提供一系列具有預定距離504的間隔502。所示的箭頭506指示晶圓擴展處理所會經歷的各種不同擴展方向。
如下一步驟，圖6A與6B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第四步驟。以前述的有機材質602來填充圖5A與5B所示的各不相同之間隔502。相應於已填充區段600上表面之平面604實質與相應於有機材質602上表面之平面606共平面。
能夠藉由諸如旋轉塗佈、針滴、或者相似塗佈之方法來實行有機材質602之塗佈。
圖7A與7B分別以側視圖與俯視圖闡述製造圖2A與 2B所示的THV可堆疊半導體元件之第一示範方法之第五步驟。區段700會接受相關處理，藉以在有機材質602中形成數個通孔702，如所示。能夠以各種不同的處理製程來形成通孔，包含雷射鑽孔處理或者蝕刻處理。如所示，每個通孔皆組態成置於有機材質602中，藉以相應通孔將與之連結的個別之凸塊墊204。
轉至圖8A與8B，分別以側視圖與俯視圖顯示製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第六步驟。圖8A與8B闡述一種金屬圖案成形處理，其將一系列的金屬軌跡206從焊墊204連接至通孔702。金屬軌跡206會將焊墊電連接至每個通孔702位置，如所示。
圖9A與9B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第七步驟。對組件900執行一種通孔金屬沈積處理，藉以將傳導性材質沈積於每個通孔702之中，形成一系列的金屬導孔902。傳導性材質能夠是諸如Al、銅(Cu)、鎢(W)、金屬合金組合、或者任何一種其他的傳導性材質。將金屬導孔902再次形成於有機材質602之中。能夠使用多種方法與技術來形成金屬導孔，諸如一種電鍍或者填塞處理。
圖10A與10B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第八步驟。藉由切割工具402第二次分割晶圓組件300與900，藉以形成間隔904。圖10A、10B與前述示範圖式所示的各晶粒202代表半導體元件整體之較小部分，此由特 殊晶圓300所產生。就其本身而論，在第二分割步驟之後的是，產生數個晶粒202類似於圖2A與2B所示的實施例，其中的有機材質210完整地環繞著晶粒202之周圍表面，而THV 902則順著晶粒的每側邊表面而組態成列，如之前所表示的。
在其一實施例中，於圖10A與10B所敘述的分割步驟之後，藉由一種晶粒取放處理來移除各別的晶粒202，藉以將每個晶粒202從切割膠帶404中移除。
圖11A與11B闡述合併數個完整THV的THV可堆疊半導體元件之第二實施例，分別如俯視圖與側視圖所示。顯示之前的圖中所示的各特徵，包含晶粒202、焊墊204、以及金屬軌跡，其形成於晶粒202作用表面之上。在本實施例906中，個別的THV 908為完整的，替代之前的實施例所示的半切形。能夠藉由圖3A與3B所示的鋸道引導302之特殊組態來形成所示的完整THV 908。較寬廣的鋸道引導302允許有機材質602如所示的切割，而保留完整的通孔908。
圖12A與12B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第三步驟。如所述的第二種製造方法共同使用前面兩個步驟，亦即提供一晶圓以及在切割膠帶404上分割成為個別的區段，如同上述的第一示範方法。此外，再次顯示諸如焊墊204的各種特徵。
如下一個步驟，從切割膠帶404取出晶圓區段550， 並且將之置於一晶圓支承系統405之上，如所示。晶圓支承系統在邏輯上能夠包含一第二切割膠帶405。然而，晶圓支承系統同樣也能夠是一種暫時的晶圓支承系統，諸如玻璃、陶瓷、層合物、或者矽(Si)基板。在其中之一實施中，使用擷取與放置機器，從切割膠帶404中取出已鋸開後的晶圓202，並且將之置於一晶圓支承系統405之上。擷取與放置處理會提供具有個別區段550之間預定寬度或距離412之間隔406。
圖13A與13B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第四步驟。再次以相似的旋轉塗佈、針滴、或者其他前述之方式，將有機材質602施加於區段650。區段650的平面642實質共平面於有機材質602之平面654。
轉至圖14A與14B，顯示製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第五步驟。將已重新塗佈的晶圓轉送至一第二晶圓支承系統408之上。第二晶圓支承系統能夠再次包含玻璃、Si基板材質、陶瓷、以及層合材質。
圖15A與15B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第六步驟。在步驟750中，相似於圖7A與7B所示的，數個通孔702形成於有機材質602之中，藉以與焊墊204一致。
圖16A與16B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第 七步驟850。步驟850再次相似於圖8A與8B所示的金屬軌跡206之金屬圖案成形步驟，藉以將焊墊204電耦合至導孔702之位置。
圖17A與17B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第八步驟950。以一種傳導性材質來填塞、電鍍或沈積該導孔702，藉以填充通孔702，並且提供金屬之導孔902，如所示。
在金屬導孔902形成處理之後，將通孔晶圓960轉送至一額外的切割膠帶410之上，如闡述第九步驟的圖18A與18B所示。
圖19A與19B分別以側視圖與俯視圖闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第十步驟。再次使用切割工具402對通孔晶圓960進行分割，進而成為所示的區段970，產生間隔904。在第二分割處理之後，充當最後步驟，能夠利用一晶圓擷取與放置機器，再次將每個元件200從切割膠帶410移除。
圖20闡述THV可堆疊半導體元件910之第三示範實施例，在側視圖中顯示利用晶粒對晶粒之堆疊組態。能夠將一系列的元件200如所示堆疊，藉以適應特殊的應用。使用直接導孔之金屬接合處理，每個金屬導孔902便能夠如合體912所示地結合在一起。能夠如所示地堆疊任何數目之元件200，藉以實現所需的實施。
圖21闡述THV可堆疊半導體元件之第四示範實施例， 再次於側視圖中顯示利用合併焊料膏916的晶粒對晶粒之堆疊組態。焊料膏916包含小焊料顆粒與助熔劑之混合物。能夠合併各種不同材質之多種焊料膏。能夠使用一種回流焊接法來施加焊料膏916，藉以在每個堆疊元件914之間，產生牢固的冶金接合。
圖22顯示THV可堆疊半導體元件918之第五示範實施例。本實施例包含多列的焊墊204與多列的通孔902，如俯視圖所示，其與金屬軌跡206適當地連接。每個通孔902配置於有機材質602之中，如所示。能夠實現具有多列焊墊204與多列通孔902的任何數目晶粒202之組態。除了本實施例918之外，尚能夠實現另一實施例，其將所示的半切外部導孔902連接至焊墊204，其並非設置於晶粒202的作用表面上，而是設置於一額外表面上，諸如一額外晶粒202或者特定實施之需求。
圖23顯示THV可堆疊半導體元件920之第六示範實施例。元件920闡述焊墊204、軌跡206與一系列半切導孔902之額外組態，其配置於晶粒202之相對側邊上。晶粒902形成於有機材質602之中，其配置於晶粒202每個周圍側邊之上，如所示。在所描述的實施例920之變體中，其組態能夠包含完整的導孔902。
圖24敘述THV可堆疊半導體元件922之第七示範實施例。元件922包含一系列的仿通孔924，其配置於晶粒202之相對側邊之上，如所示。導孔902配置於左手與右手邊，如所示。仿通孔924能夠針對特定應用而提供貫穿 元件922之電連接。使用打線接合處理，仿通孔924便能夠用來連接額外的元件922或者封裝。此外，通孔924能夠充當接地或者充當輸入/輸出(I/O)訊號之導管。
能夠以多種實施，諸如以導孔902，來組構仿通孔924。例如，能夠實現多列、或者完整或半切通孔924。圖25闡述其中一種如此元件926之實施例，其包含一列位於晶粒202左邊的半切仿導孔924、以及一列位於晶粒202右邊的THV 902，再次配置於有機材質602中。
圖26闡述THV可堆疊半導體元件928之第九示範實施例，敘述利用圖24與25所示的仿通孔而以一種打線接合處理來連接上方晶粒203之兩堆疊晶粒202與203。一系列的焊墊205配置於晶粒203的作用表面之上。打線接合207會將焊墊204連接至導孔902。將一介電、絕緣或接合材質209配置於晶粒202與晶粒203之間，藉以提供元件/封裝928結構的支承。
合併一系列THV 226或902而諸如200的半導體元件能夠在各種應用中提供多種功能性與彈性。有機材質210的使用允許導孔226放置於晶粒202之外部，此允許晶粒202之內有額外電路，因而增強元件200之功能。此外，藉由使用有機材質210替代晶圓300之材質，每晶圓個別產量增加。在任何數目的應用中，能夠配置有機材質厚如容納多種導孔226所需。
能夠將元件200合併於多種使用THV 226的PoP組態之中。如此的元件能夠包含半導體晶粒，而具有整合的THV 226。如此的半導體元件能夠稱為一種THV晶粒。目前封裝中封裝(PiP)之封裝技術使用接線及/或凸塊互連，藉以在晶粒、內插物與封裝之間提供電訊號。逐漸會有提供更強健、有效與空間節省的互連之需求。使用THV 226的類似結構、因而使用THV晶粒來提供如此的互連，便能夠提供更強健、有效與空間節省之互連。
轉至圖27A，顯示THV可堆疊半導體元件220之第十示範實施例。元件220包含晶粒202。將有機材質210配置圍繞於晶粒202的周圍表面214。順著晶粒202的側邊218與216配置有機材質。焊墊204形成於晶粒202的上表面之上、或者整合於晶粒202的上表面之中。焊墊204連接至THV 226，藉由金屬軌跡206將傳導性材質配置於其中。在顯示位於晶粒202上表面之上或者整合於其中的組態之內，配置一系列的RDL與互連焊墊。RDL與互連焊墊提供所要堆疊於THV晶粒元件202之上的額外晶粒之電連接終端。
圖27B闡述THV晶粒組態220之側視圖，包含一堆疊於THV晶粒202之上的第二半導體晶粒224。RDL與焊墊耦合至一系列的凸塊222，藉以電連接晶粒224。THV晶粒202合併前述的THV結構226，其整合於配置環繞著晶粒202周圍表面的有機材質210之中，如所示。一系列的焊墊204與金屬軌跡206提供電路徑，藉以按照路線指示通過導孔226的訊號發送至晶粒202的上表面。
圖28闡述一系列使用THV結構的封裝中封裝(PiP)組 態之第一示範實施例228。在某些狀況下，如範例中所闡述的，封裝中的封裝之結構形成於電路承載基板230之上。此外，然而下方基底材質能夠包含諸如導線架之結構。使用接線及/或凸塊互連，THV結構226便能夠用來連接一上積體電路或者一上積體封裝。導孔226能夠充當接地或者用以指定輸入/輸出(I/O)訊號之路徑，如前述者。
所闡述的封裝228包含晶粒202。一種諸如晶粒附著(D/A)之黏著材質，將晶粒202耦合至打線接合晶粒224。於終端位置213，在打線接合晶粒224上的焊墊205使用接線207，將晶粒204耦合至導孔226。將打線接合晶粒224與THV晶粒202配置於具有一系列凸塊232的基板230之上。將一包封劑211形成於THV晶粒202與打線接合晶粒224之上。
圖29闡述封裝234的額外打線接合之實施例，其中的打線接合晶粒224則會以打線接合至整合於晶粒202上表面之上的焊墊204。使用金屬軌跡206，將焊墊204耦合至導孔226。
在相似的實施例中，圖30闡述封裝236的額外打線接合之實施例，其中一系列的焊墊205允許晶粒224打線接合至位置213上的導孔226以及位置238上的基板230兩者。
圖31闡述一種示範封裝238，其中的打線接合晶粒224會突出THV晶粒202，如距離箭號240所標示的。焊墊205將晶粒224直接與基板230耦合。
圖32闡述一種PiP 242，其中將一覆晶晶粒244配置於THV晶粒202之上，並且使用凸塊248而電連接至RDL/互連焊墊。將一種隨選的填縫材質246配置於覆晶晶粒244與THV晶粒202之間。
在圖33所示的示範PiP 250中，將一突出的第三打線接合晶粒245配置於覆晶晶粒244之上。在終端213上，突出的打線接合晶粒245從焊墊252打線接合至導孔226。D/A 209再次將突出晶粒245黏著於覆晶晶粒244。
在PiP 254中，將導線架封裝256附加於THV晶粒202，如圖34所示。封裝256包含一已合併的晶粒258與晶粒拍260，其使用D/A 209所附加。一導線終端262允許接線207耦合至焊墊204與導孔226兩者。使用D/A 209將封裝256附加於THV晶粒202。封裝256能夠包含諸如四方扁平無鉛(QFN)封裝、小外型無鉛(SON)封裝、四方扁平封裝(QFP)、或者相似封裝組態之元件。
在圖35中，以陣列封裝266來替換導線架封裝256，其闡述示範PiP 264。陣列封裝266同樣也包含配置於基板之上的晶粒268，其凸塊270會將陣列封裝266耦合至THV晶粒202和耦合至RDL/焊墊。封裝266能夠包含諸如平面柵格陣列(LGA)、球柵格陣列(BGA)、或者相似封裝組態之元件。隨選的填縫材質208再次將封裝266耦合至晶粒202。
圖36闡述一種合併倒置上封裝274之PiP 272。倒置封裝274同樣也包含晶粒276與晶粒拍278。導線終端282 會以打線方式將封裝274接合至導孔226。倒置上封裝274能夠包含諸如QFN、SON、QFP、LGA、BGA、或者相似封裝組態之元件。
圖37闡述合併相似於封裝274的倒置上封裝286之另一封裝284。使用D/A材質288將封裝286黏著於THV晶粒202。使用凸塊248與隨選的填縫材質246，將一覆晶晶粒244配置於封裝286之上，如所示。覆晶晶粒244能夠包含打線接合晶粒或者額外的半導體積體電路封裝。
圖38闡述一種PiP 290組態，其中使用數個凸塊，將THV晶粒202配置於倒置封裝286之上，藉以將封裝286的上表面連接至導孔226之下表面。倒置下封裝286再次能夠包含諸如QFN、SON、QFP、LGA、BGA、覆晶裸晶粒、以及晶圓級封裝(WLP)286之元件。以D/A 288來附加封裝286，並且以打線將之接合至基板230，如所示。
圖39闡述圖38所示的組態，然具有額外的堆疊。封裝292包含一額外的覆晶晶粒244，其以相似於圖32之方式，利用凸塊248與填縫材質246，配置於THV晶粒202的上表面之上。諸如打線接合晶粒的其他半導體元件同樣也能夠用來替換覆晶晶粒244。
轉至圖40，示範的PiP 296合併一種倒置下封裝286。在所示的實施例中，將一系列的THV晶粒202其中一個堆疊於另一個之上，如所示。將上THV晶粒導孔226之下表面耦合至下THV晶粒導孔226之上表面。將上THV晶粒202以打線從導孔位置283接合至鄰接的THV晶粒導孔上 之位置213。
在相似的實施例中，將彼此鄰接的THV晶粒202堆疊於封裝286之上，如圖41所示。PiP 298再次合併附加於基板230之倒置下封裝286，如所示。在所示的實施例中，使用凸塊306，將一額外的覆晶晶粒304、或者相似的晶粒304或積體電路封裝304配置於THV晶粒202之上。
圖42闡述再次合併一倒置下封裝286之封裝308。將焊料膏310耦合至導孔226之下表面。將諸如電感器、濾波器、電容器、電阻器、或者相似被動元件之被動元件312耦合至焊料膏310，藉以提供封裝308額外的功能。在所示的實施例中，THV晶粒202會突出封裝286，而提供被動元件312之空間。包封劑211會覆蓋著封裝308所有部件之部分，如所示，藉以提供結構之支承。焊墊314會在位置294上，將THV晶粒202耦合至基板230。
在圖43所示的額外實施例中，PiP 316再次包含THV晶粒202，而具有使用焊料膏材質310所附加的被動元件312，其中的元件312則是附加於導孔226之上表面。倒置下封裝318能夠再次包含諸如QFN、SON、QFP、LGA、BGA、覆晶裸晶粒、以及WLP組態318之元件。焊墊314會使用接線209而透過被動元件312將THV晶粒202耦合至基板。之後再次提供包封劑211，以為封裝316的結構支承之用。
依照各種不同PiP實施例所闡述的，能夠使用THV晶粒202的THV 226來實現多種創新、強健、有彈性、以及 有效的PiP組態。
儘管已經詳細闡述了本發明一個或者多個實施例，然而熟知該項技術者將會察知可從事該實施例的修改與改版，而不違背以下申請專利範圍所提的本發明之範疇。
100‧‧‧晶圓級晶片尺度封裝方法
102‧‧‧半導體元件
104‧‧‧突出焊墊
106‧‧‧可回縮薄膜
108‧‧‧框架
110‧‧‧固定配件
112‧‧‧工作平台
114‧‧‧柱軸
116‧‧‧焊墊
118‧‧‧切割機
200‧‧‧THV可堆疊半導體元件
202‧‧‧半導體晶粒
203‧‧‧堆疊晶粒
204‧‧‧焊墊
205‧‧‧焊墊
206‧‧‧金屬軌跡
207‧‧‧接線
208‧‧‧填縫材質
209‧‧‧介電、絕緣或接合材質
210‧‧‧周圍材質
211‧‧‧包封劑
212‧‧‧晶粒的作用上表面
213‧‧‧終端
214‧‧‧晶粒的周圍表面
216‧‧‧有機材質的側邊
218‧‧‧有機材質的側邊
220‧‧‧THV可堆疊半導體元件
222‧‧‧凸塊
224‧‧‧晶粒
226‧‧‧導孔
228‧‧‧半導體元件
230‧‧‧基板
232‧‧‧凸塊
234‧‧‧電路封裝
236‧‧‧封裝
238‧‧‧封裝
240‧‧‧距離
242‧‧‧PiP組態
244‧‧‧覆晶晶粒
245‧‧‧突出晶粒
246‧‧‧填縫材質
248‧‧‧凸塊
250‧‧‧PiP組態
252‧‧‧焊墊
254‧‧‧PiP組態
256‧‧‧導線架封裝
258‧‧‧晶粒
260‧‧‧晶粒拍
262‧‧‧導線終端
264‧‧‧PiP組態
266‧‧‧陣列封裝
268‧‧‧晶粒
270‧‧‧凸塊
272‧‧‧PiP
274‧‧‧倒置上封裝
276‧‧‧晶粒
278‧‧‧晶粒拍
282‧‧‧導線終端
284‧‧‧封裝
286‧‧‧倒置封裝
288‧‧‧介電、絕緣或接合材質
290‧‧‧PiP組態
292‧‧‧封裝
294‧‧‧基板上的特定位置
296‧‧‧PiP組態
298‧‧‧PiP組態
300‧‧‧晶圓
302‧‧‧鋸道引導
304‧‧‧覆晶晶粒
306‧‧‧凸塊
308‧‧‧封裝
310‧‧‧焊料膏
312‧‧‧被動元件
314‧‧‧焊墊
316‧‧‧PiP組態
318‧‧‧在置封裝
400‧‧‧已分割之部件
402‧‧‧切割源
404‧‧‧切割膠帶
405‧‧‧晶圓支承系統
406‧‧‧間隔
408‧‧‧第二晶圓支承系統
410‧‧‧切割膠帶
412‧‧‧預定寬度或距離
500‧‧‧擴展處理
502‧‧‧間隔
504‧‧‧預定距離
506‧‧‧擴展處理方向
550‧‧‧晶圓區段
600‧‧‧已填充區段
602‧‧‧有機材質
604‧‧‧已填充區段上表面之平面
606‧‧‧有機材質上表面之平面
642‧‧‧區段的平面
650‧‧‧區段
654‧‧‧有機材質之平面
700‧‧‧區段
702‧‧‧通孔
750‧‧‧通孔形成步驟
800‧‧‧區段
850‧‧‧金屬圖案成形步驟
900‧‧‧晶圓組件
902‧‧‧導孔
904‧‧‧間隔
906‧‧‧THV可堆疊半導體元件
908‧‧‧通孔
910‧‧‧THV可堆疊半導體元件
912‧‧‧合體
914‧‧‧堆疊元件
916‧‧‧焊料膏
918‧‧‧THV可堆疊半導體元件
920‧‧‧THV可堆疊半導體元件
922‧‧‧THV可堆疊半導體元件
924‧‧‧仿通孔
926‧‧‧元件
928‧‧‧元件/封裝
950‧‧‧填充通孔步驟
960‧‧‧通孔晶圓
970‧‧‧分割的區段
圖1闡述製作一晶圓級晶片尺度封裝的示範習知技術之方法；圖2A與2B分別以俯視圖與側視圖，闡述THV可堆疊半導體元件之第一實施例；圖3A與3B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第一步驟；圖4A與4B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第二步驟；圖5A與5B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第三步驟；圖6A與6B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第四步驟；圖7A與7B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第 五步驟；圖8A與8B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第六步驟；圖9A與9B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第七步驟；圖10A與10B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第一示範方法之第八步驟；圖11A與11B闡述合併多個完整THV的THV可堆疊半導體元件之第二實施例，分別如俯視圖與側視圖所示；圖12A與12B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第三步驟；圖13A與13B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第四步驟；圖14A與14B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第五步驟；圖15A與15B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第六步驟； 圖16A與16B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第七步驟；圖17A與17B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第八步驟；圖18A與18B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV9可堆疊半導體元件之第二示範方法之第九步驟；圖19A與19B分別以側視圖與俯視圖，闡述製造圖2A與2B所示的THV可堆疊半導體元件之第二示範方法之第十步驟；圖20闡述THV可堆疊半導體元件之第三示範實施例，在側視圖中顯示利用晶粒對晶粒之堆疊組態；圖21闡述THV可堆疊半導體元件之第四示範實施例，再次於側視圖中顯示利用合併焊料膏的晶粒對晶粒之堆疊組態；圖22闡述THV可堆疊半導體元件之第五示範實施例，具有多列的焊墊與多列的通孔，如俯視圖所示；圖23闡述THV可堆疊半導體元件之第六示範實施例，合併耦合至晶粒相對側邊上的一列焊墊之多列半切通孔，如俯視圖所示；圖24闡述THV可堆疊半導體元件之第七示範實施例，合併相對側邊上的仿通孔，如俯視圖所示； 圖25闡述THV可堆疊半導體元件之第八示範實施例，合併單一側邊上的仿通孔，如俯視圖所示；圖26闡述THV可堆疊半導體元件之第九示範實施例，敘述利用圖24與25所示的仿通孔而以一種打線接合處理來連接上方晶粒之兩堆疊晶粒；圖27A闡述合併一THV晶粒之晶粒，其中一系列RDL與互連焊墊配置於該晶粒之上；圖27B闡述該系列的重新分佈層與互連焊墊，其會將THV晶粒連接至一第二晶粒；圖28闡述一配置於THV晶粒上的打線接合晶粒，其中的打線接合晶粒則會以打線接合至晶粒的THV；圖29闡述一配置於THV晶粒上的打線接合晶粒，其中的打線接合晶粒則會以打線接合至THV晶粒上的焊墊；圖30闡述一配置於THV晶粒上的打線接合晶粒，其中的打線接合晶粒則會以打線接合至晶粒的THV與一電路承載基板；圖31闡述一配置於THV晶粒上的突出打線接合晶粒；圖32闡述一配置於THV晶粒上的覆晶晶粒；圖33闡述一配置於覆晶晶粒上的第三晶粒，其中的覆晶晶粒則耦合至THV晶粒；圖34闡述一配置於THV晶粒上的導線架封裝；圖35闡述一配置於THV晶粒上的陣列封裝；圖36闡述一配置於THV晶粒上的倒置封裝；圖37闡述一配置於THV晶粒上的倒置封裝，其中一 第三晶粒配置於積體封裝之上；圖38闡述一配置於倒置封裝上的THV晶粒；圖39闡述一配置於倒置封裝上的THV晶粒，其中一第三晶粒配置於THV晶粒之上；圖40闡述一配置於倒置封裝上的多THV晶粒組態；圖41闡述一配置於倒置封裝上的多THV晶粒組態，其中一額外的晶粒配置於THV晶粒之上；圖42闡述一合併不突出的被動元件之THV晶粒；以及圖43闡述一合併突出的被動元件之THV晶粒。
200‧‧‧THV可堆疊半導體元件
202‧‧‧半導體晶粒
204‧‧‧焊墊
206‧‧‧金屬軌跡
210‧‧‧周圍材質
214‧‧‧晶粒的周圍表面
216‧‧‧有機材質的側邊
218‧‧‧有機材質的側邊
226‧‧‧導孔

Claims (15)

  1. 一種製造半導體元件之方法，包含：提供一包含上、下與周圍側表面之第一半導體晶粒；形成一焊墊於該第一半導體晶粒的上表面之上；沉積一有機材質於該第一半導體晶粒的周圍側表面之周邊並且從該第一半導體晶粒的上表面延伸至該第一半導體晶粒的下表面；形成一通孔從該第一半導體晶粒的上表面至該第一半導體晶粒的下表面穿過該有機材質；沉積一傳導性材質於通孔之中以形成一傳導通孔(THV)，其從該第一半導體晶粒的上表面延伸至該第一半導體晶粒的下表面；以及提供一傳導軌跡，其電性地連接該傳導THV至該焊墊；配置一重新分佈層(RDL)，該重新分佈層(RDL)包含在第一半導體晶粒上表面之上的互連焊墊；配置一第二半導體晶粒於該第一半導體晶粒之上；以及配置一包封劑於該第一半導體晶粒和該第二半導體晶粒之上，以形成一封裝中的封裝(PiP)半導體元件。
  2. 如申請專利範圍第1項之方法，進一步包含使用凸塊或打線接合將該第二半導體晶粒電連接至第一半導體晶粒。
  3. 如申請專利範圍第1項之方法，進一步包含配置一填縫材質於第一半導體晶粒與第二半導體晶粒之間。
  4. 如申請專利範圍第1項之方法，進一步包含配置一第三半導體晶粒於第二半導體晶粒之上並且電連接至該傳導性材質。
  5. 如申請專利範圍第1項之方法，進一步包含配置該第一半導體晶粒於一第三半導體晶粒之上。
  6. 一種製造半導體元件之方法，包含：提供一第一半導體晶粒；形成一有機材質，其在該第一半導體晶粒的之周邊區域周圍並且從該第一半導體晶粒的一第一表面延伸至該第一半導體晶粒的一第二表面；形成一傳導通孔，其穿過從該第一半導體晶粒的第一表面延伸至該第一半導體晶粒的第二表面的該有機材質；配置一第二半導體晶粒於該第一半導體晶粒之上；沉積一第一包封劑於該第一半導體晶粒和該第二半導體晶粒之上。
  7. 如申請專利範圍第6項之方法，進一步包含：形成一焊墊於該第一半導體晶粒的第一表面之上；以及形成一傳導軌跡於該該第一半導體晶粒的第一表面之上而被電連接於該船導通孔和該焊墊之間。
  8. 如申請專利範圍第6項之方法，其中該第二半導體晶粒被整合至被配置於該第一半導體晶粒之上的一倒置上封裝。
  9. 如申請專利範圍第6項之方法，進一步包含： 配置一第三半導體晶粒於該第一半導體晶粒之上；電連接該第三半導體晶粒至該第一半導體晶粒或該第二半導體晶粒。
  10. 如申請專利範圍第9項之方法，進一步包含在沉積該第一包封劑之前，沉積一第二包封劑於該第三半導體晶粒之上。
  11. 一種半導體元件，包含：一第半導體晶粒；一有機材質，其被沉積於該第一半導體晶粒的周圍區域之周邊並且從該第一半導體晶粒的一第一表面延伸至相對於該第一表面的該第一半導體晶粒的一第二表面；一傳導通孔，其被形成以穿過該有機材質；一重新分佈層，其包含形成於該第一半導體晶粒的第一表面之上的一互連焊墊；以及一第二半導體晶粒，其被配置於該第一半導體晶粒和重新分佈層之上。
  12. 如申請專利範圍第11項之半導體元件，進一步包含含有該第二半導體晶粒被配置於該第一半導體晶粒之上的一導線架封裝。
  13. 如申請專利範圍第11項之半導體元件，進一步包含耦合至該傳導通孔的一被動元件。
  14. 如申請專利範圍第11項之半導體元件，進一步包含被配置於該第二半導體晶粒之上的一第三半導體晶粒。
  15. 如申請專利範圍第11項之半導體元件，進一步包含 被沉積於該第一半導體晶粒和該第二半導體晶粒之上的一包封劑。
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