TWI419291B - 引線框架結構、使用引線框架結構之進階四方扁平無引線封裝結構,以及其製造方法 - Google Patents
引線框架結構、使用引線框架結構之進階四方扁平無引線封裝結構,以及其製造方法 Download PDFInfo
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- TWI419291B TWI419291B TW099138364A TW99138364A TWI419291B TW I419291 B TWI419291 B TW I419291B TW 099138364 A TW099138364 A TW 099138364A TW 99138364 A TW99138364 A TW 99138364A TW I419291 B TWI419291 B TW I419291B
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- Prior art keywords
- metal
- layer
- protruding
- blocks
- metal sheet
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- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 229910052751 metal Inorganic materials 0.000 claims description 305
- 239000002184 metal Substances 0.000 claims description 305
- 238000000034 method Methods 0.000 claims description 64
- 229920002120 photoresistant polymer Polymers 0.000 claims description 49
- 238000005530 etching Methods 0.000 claims description 15
- 239000008393 encapsulating agent Substances 0.000 claims description 12
- 239000000565 sealant Substances 0.000 claims description 9
- 238000012986 modification Methods 0.000 claims description 8
- 230000004048 modification Effects 0.000 claims description 8
- 238000007747 plating Methods 0.000 claims description 5
- 230000008878 coupling Effects 0.000 claims description 4
- 238000010168 coupling process Methods 0.000 claims description 4
- 238000005859 coupling reaction Methods 0.000 claims description 4
- 238000007654 immersion Methods 0.000 claims description 4
- 238000007772 electroless plating Methods 0.000 claims description 3
- 238000009713 electroplating Methods 0.000 claims description 3
- 150000002739 metals Chemical class 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 131
- 239000000463 material Substances 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 8
- 239000000203 mixture Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052763 palladium Inorganic materials 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 229910000881 Cu alloy Inorganic materials 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
本發明大體而言是有關於電子裝置封裝(electronic device packaging)。更特定而言,本發明是有關於引線框架結構(leadframe structure)以及使用引線框架結構之進階四方扁平無引線(advanced quad flat no lead,aQFN)封裝結構,以及其製造方法。
在射頻(radio frequency,RF)/無線、攜帶型應用及個人電腦(personal computer,PC)周邊設備市場中,一般對於提高較小封裝之效能以及增加之輸入/輸出(input/output,I/O)數目存在較高的需求。包括四方扁平無引線(QFN)封裝以及增強型無引線之引線框架式封裝的進階引線框架封裝已被廣泛接受,且通常適用於包括高頻傳輸(諸如經由RF頻寬進行之高頻傳輸)的晶片封裝。
對於QFN封裝結構而言,通常以平面引線框架基板製成晶粒墊(die pad)以及周圍接觸端子(引線墊)。QFN封裝結構通常透過表面黏著技術(surface mounting technology;SMT)焊接至印刷電路板(printed circuit board,PCB)。因此,QFN封裝結構之晶粒墊及/或接觸端子/接觸墊應設計成諸如藉由促進表面黏著而可與封裝處理能力相配,以及提升長期焊點可靠性。
有鑒於此,而產生了對開發本文所述之引線框架結構、封裝結構以及相關方法的需要。
因此,本發明之一態樣是針對引線框架結構、使用引線框架結構之進階四方扁平無引線(aQFN)封裝結構,以及其製造方法。
在一態樣中,本發明是關於一種封裝結構。在一實施例中,所述封裝結構包括晶片、安置在晶片周圍且電性耦接至晶片之多個引線以及形成於晶片以及所述多個引線上的封裝本體。所述多個引線中之至少一者包括:(a)具有上表面以及下表面之中央金屬層;(b)自中央金屬層之上表面向上延伸且具有上表面的第一突出金屬塊;(c)自中央金屬層之下表面向下延伸且具有下表面的第二突出金屬塊;(d)在第一突出金屬塊之上表面上的第一飾面層;以及(e)在第二突出金屬塊之下表面上的第二飾面層。封裝本體實質上覆蓋所述多個引線中之每一者之第一突出金屬塊以及第一飾面層。
此外,第一突出金屬塊可自中央金屬層之上表面向上延伸達中央金屬層之厚度的百分之三十五與百分之百之間的距離,且第二突出金屬塊可自中央金屬層之下表面向下延伸達中央金屬層之厚度的百分之三十五與百分之百之間的距離。
此外,第一突出金屬塊可具有實質上垂直於第一突出金屬塊之上表面的側表面。
此外,封裝可包括具有上表面以及下表面之晶粒墊,晶片安置在晶粒墊之上表面上。封裝亦可包括具有上表面以及下表面之第一金屬層,晶粒墊安置在第一金屬層之上表面上,其中第一金屬層與中央金屬層實質上厚度相同。封裝亦可包括具有上表面以及下表面之第二金屬層,第一金屬層安置在第二金屬層之上表面上,其中第二金屬層與第二突出金屬塊實質上厚度相同。封裝亦可包括安置在第二金屬層之下表面上的金屬飾面層。
此外,晶粒墊之上表面與中央金屬層之上表面可實質上在同一平面中。
此外,晶粒墊可自第一金屬層之上表面向上延伸達第一金屬層之厚度的百分之三十五與百分之百之間的距離。
在另一態樣中,本發明是關於一種形成引線框架結構之方法。在一實施例中,所述方法包括提供金屬片、形成於金屬片之上表面上之第一經圖案化光阻層以及形成於金屬片之下表面上之第二經圖案化光阻層,其中上表面與下表面之間的距離對應於金屬片之厚度。所述方法更包括在未由第一經圖案化光阻層覆蓋之金屬片之上表面的區域上形成第一金屬層、以及在未由第二經圖案化光阻層覆蓋之金屬片之下表面的區域上形成第二金屬層,其中第一金屬層自金屬片之上表面向上延伸達金屬片之厚度的百分之三十五與百分之百之間的距離,且其中第二金屬層自金屬片之下表面向下延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。所述方法更包括在第一金屬層上形成第一飾面層以及在第二金屬層上形成第二飾面層,以及移除第一經圖案化光阻層以及第二經圖案化光阻層。
此外,第一金屬層可包括各自包括上表面以及側表面之多個突出金屬塊。所述多個突出金屬塊中之每一者的側表面可實質上垂直於金屬片之上表面。
此外,第一金屬層以及第二金屬層可藉由執行鍍覆(plating)製程而形成。
此外,第一飾面層以及第二飾面層可藉由執行表面修飾製程而形成。
此外,表面修飾製程可包括電鍍覆(electroplating)製程、無電鍍覆(electroless plating)製程以及浸漬(immersion)製程中之至少一者。
在另一態樣中,本發明是關於一種製造封裝結構之方法。在一實施例中,所述方法包括提供具有上表面以及下表面之金屬片、形成於上表面上的多個第一突出金屬塊、形成於所述多個第一突出金屬塊上的第一飾面層、形成於下表面上的多個第二突出金屬塊以及形成於所述多個第二突出金屬塊上的第二飾面層。所述方法更包括將晶片電性耦接至所述多個第一突出金屬塊中所包括之至少一第一突出塊,以及在金屬片上形成封膠體(molding compound)以包封晶片、所述多個第一突出金屬塊以及形成於所述多個第一突出金屬塊上的第一飾面層。所述方法更包括使用第二飾面層作為蝕刻罩幕(etching mask),進行蝕刻穿透金屬片之下表面上之區域直至封膠體暴露出來,以便界定多個引線。
此外,所述多個第一突出金屬塊可自金屬片之上表面向上延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。所述多個第二突出金屬塊可自金屬片之下表面向下延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。
此外,所述提供步驟可包括在金屬片之上表面上形成第一經圖案化光阻層以及在金屬片之下表面上形成第二經圖案化光阻層。所述提供步驟亦可包括在未由第一經圖案化光阻層覆蓋之金屬片之上表面的區域上形成所述多個第一突出金屬塊以及在未由第二經圖案化光阻層覆蓋之金屬片之下表面的區域上形成所述多個第二突出金屬塊。所述提供步驟亦可包括在所述多個第一突出金屬塊上形成第一飾面層以及在所述多個第二突出金屬塊上形成第二飾面層,且亦可包括移除第一經圖案化光阻層以及第二經圖案化光阻層。
此外,所述多個第一突出金屬塊各自可包括實質上垂直於金屬片之上表面的側表面。
此外,所述多個第一突出金屬塊以及所述多個第二突出金屬塊可藉由執行鍍覆製程而形成。
此外,第一飾面層以及第二飾面層可藉由執行表面修飾製程而形成。
此外,所述提供步驟可包括在形成第一經圖案化光阻層以及第二經圖案化光阻層後,在金屬片之上表面上形成第一中央突出塊以及在金屬片之下表面上形成第二中央突出塊。所述提供步驟可包括將晶片附著至第一中央突出塊之上表面。封膠體可囊封第一中央突出塊。
此外,第一中央突出塊可自金屬片之上表面向上延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。第二中央突出塊可自金屬片之下表面向下延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。
此外,第一中央突出塊之上表面與所述多個第一突出金屬塊中所包括之第一突出塊之上表面可實質上在同一平面中。
在另一態樣中,本發明是關於引線框架結構。在一實施例中,所述引線框架結構包括具有上表面以及下表面之金屬片以及形成於上表面上的第一中央突出塊。所述引線框架結構更包括形成於上表面上且圍繞第一中央突出塊的多個第一突出金屬塊以及形成於所述多個第一突出金屬塊上的第一飾面層。所述引線框架結構更包括形成於下表面上的多個第二突出金屬塊以及形成於所述多個第二突出金屬塊上的第二飾面層。
此外,所述多個第一突出金屬塊可自金屬片之上表面向上延伸達金屬片之厚度的百分之三十五與百分之百之間的距離,且所述多個第二突出金屬塊可自金屬片之下表面向下延伸達金屬片之厚度的百分之三十五與百分之百之間的距離。
此外,所述多個第一突出金屬塊之位置可對應於所述多個第二突出金屬塊之位置。
此外,所述多個第一突出金屬塊以及所述多個第二突出金屬塊可包括銅以及銅合金中之至少一者。
此外,所述多個第一突出金屬塊與所述多個第二突出金屬塊可具有不同材料組成。
此外,第一飾面層以及第二飾面層可包括鎳、金、鈀、錫以及銀中之至少一者。
此外,第一飾面層與第二飾面層可具有不同材料組成。
此外,引線框架結構亦可包括形成於金屬片之下表面上的第二中央突出塊,且第二中央突出塊之位置可對應於第一中央突出塊之位置。此外,所述多個第一突出金屬塊中之每一者之上表面可實質上共面且可界定第一平面。所述多個第一突出金屬塊中之每一者之側表面可實質上垂直於第一平面。
在另一態樣中,本發明是關於一種製造封裝結構之方法。在一實施例中,所述方法包括提供引線框架,此引線框架具有金屬片、形成於所述金屬片的上表面上的多個第一突出金屬塊、形成於所述多個第一突出金屬塊上的第一飾面層、形成於所述金屬片的下表面上的多個第二突出金屬塊以及形成於所述多個第二突出金屬塊上的第二飾面層。所述多個第一突出金屬塊各自包括實質上垂直於所述金屬片之所述上表面的側表面。所述方法更包括將晶片與至少一所述多個第一突出金屬塊電性耦接。所述方法更包括於所述金屬片上形成封裝膠體,以包封所述晶片、所述多個第一突出金屬塊以及所述第一飾面層。所述方法更包括使用所述第二飾面層作為蝕刻罩幕,進行蝕刻穿透所述金屬片之所述下表面上之區域直至所述封膠體暴露出來,以便界定多個引線。
現將詳細參考本發明之一些實施例,其實例說明於附圖中。相同參考數字將在諸圖及本說明書中盡可能用以指代相同或類似部件。
以下定義適用於關於本發明之一些實施例描述的態樣中的一些。此等定義可亦在本文中加以詳述。
如本文中所使用,單數形式「一」以及「該」可包括多個指示物,除非上下文另有明確表示。因此,舉例而言,對「一突出金屬塊」的引用可包括多個突出金屬塊,除非上下文另有明確表示。
如本文中所使用,術語「集合」指含一或多個組件的集體總稱。因此,舉例而言,層集合可包括單一層或多個層。集合之組件可被稱為集合之成員。集合之組件可為相同或不同的。在某些情況,集合之組件可共同具有一或多種共同特性。
如本文中所使用,術語「鄰近」指接近或鄰接。鄰近組件可彼此間隔開或可彼此實際或直接接觸。在一些例項中,鄰近組件可彼此連接或可彼此整體形成。
如本文中所使用,諸如「內部」、「頂部」、「底部」、「在......上」、「在......下」、「向上」、「向下」、「側」以及「橫向」的術語指諸如根據諸圖所示之組件集合之相對關係,但並不必需為此等組件在製造或使用期間的特定定向。
如本文中所使用,術語「連接」指操作性耦接或連結。所連接組件可直接彼此耦接或可諸如經由另一組件集合間接地彼此連接。
如本文中所使用,術語「實質上」以及「實質」指相當可觀的程度或範圍。當結合事件或情形使用時,所述術語可指事件或情形精確地發生的例項以及事件或情形非常近似地發生之例項(諸如考量本文所述之製造操作的典型容忍度水準)。
如本文中所使用,術語「導電」指輸送電流之能力。導電材料通常對應於不展現對電流之流動的抵抗或展現極少抵抗的材料。導電率之一量度是以西門子/公尺(「S‧m-1
」)為單位。通常,導電材料為具有大於約104
S‧m-1
(諸如,至少約105
S‧m-1
或至少約106
S‧m-1
)之導電率的材料。材料之導電率可有時隨溫度而變。除非另有規定,否則,材料之導電率是在室溫下界定。
本發明之態樣可用於製造各種封裝結構,諸如,堆疊型封裝、多晶片封裝或高頻裝置封裝。
圖1A至圖1H為展示根據本發明之實施例之形成引線框架結構以及製造進階四方扁平無引線(aQFN)封裝結構的方法的示意圖。圖1A至圖1D以及圖1F至圖1H是以橫截面圖展示,而圖1D'至圖1E是以俯視圖展示。
如圖1A所示,提供具有上表面110a以及下表面110b之金屬片110。金屬片110可包括(例如)銅、銅合金或其他適用金屬材料。上表面110a與下表面110b之間的距離對應於金屬片110之厚度。接著,仍參看圖1A,在金屬片110之上表面110a上形成第一經圖案化光阻層114a,且在金屬片110之下表面110b上形成第二經圖案化光阻層114b。可藉由分別在金屬片110之上表面110a以及下表面110b上層壓乾膜抗蝕劑層、進行曝光且接著顯影以在乾膜抗蝕劑層中形成圖案來形成第一以及第二光阻層114a/114b。雖然圖1A中之第一以及第二光阻層114a/114b之圖案被展示為相同的,但第一光阻層114a之圖案可取決於產品設計而不同於第二光阻層114b之圖案。
接著,參看圖1B,使用第一經圖案化光阻層114a以及第二經圖案化光阻層114b作為罩幕,執行鍍覆製程,以分別在沒有被第一光阻層114a覆蓋之金屬片110之上表面110a的區域上形成第一金屬層116a,且在沒有被第二光阻層114b覆蓋之金屬片110之下表面110b的區域上形成第二金屬層116b。第一金屬層116a自上表面110a向上延伸,且第二金屬層116b自下表面110b向下延伸。第一以及第二金屬層116a/116b可包括(例如)銅、銅合金或其他適用金屬材料。第一金屬層116a可具有相同於或不同於第二金屬層116b之材料組成的材料組成。舉例而言,第一以及第二金屬層116a/116b之厚度可為約5至25微米,且第一與第二金屬層116a/116b之厚度與金屬片110之厚度的比例範圍可為0.1至1、0.25至1、0.35至1、0.4至1、0.5至1、0.75至1以及0.9至1。換言之,第一金屬層116a可自上表面110a向上延伸且第二金屬層可自下表面110b向下延伸達(例如)金屬片110之厚度的10%至100%、25%至100%、35%至100%、40%至100%、50%至100%、75%至100%以及90%至100%的範圍。第一以及第二金屬層116a/116b之厚度亦可實質上等於金屬片110之厚度。
第一金屬層116a包括形成於第一經圖案化光阻層114a之開口S1內的多個第一突出金屬塊118a。第一金屬層116a更包括第一經圖案化光阻層114a之中央空腔Sa內的第一中央突出塊118c。第二金屬層116b包括形成於第二經圖案化光阻層114b之開口S2內的多個第二突出金屬塊118b。第二金屬層116b更包括第二經圖案化光阻層114b之中央空腔Sb內的第二中央突出塊118d。第一突出金屬塊118a以及第一中央突出塊118c可自上表面110a向上延伸達金屬片110之厚度的10%至100%、25%至100%、35%至100%、40%至100%、50%至100%、75%至100%以及90%至100%的範圍。在一實施例中,第一突出金屬塊118a以及第一中央突出塊118c可自上表面110a向上延伸出實質上相同的量。第二突出金屬塊118b以及第二中央突出塊118d可自下表面110b向下延伸達金屬片110之厚度的10%至100%、25%至100%、35%至100%、40%至100%、50%至100%、75%至100%以及90%至100%的範圍。在一實施例中,第二突出金屬塊118b以及第二中央突出塊118d可自下表面110b向下延伸出實質上相同的量。
第一/第二金屬塊118a/118b安置成圍繞第一/第二中央塊118c/118d。第一金屬塊118a之位置對應於第二金屬塊118b之位置,且第一/第二金屬塊118a/118b為待形成之內部/外部引線。第一/第二金屬塊118a/118b可配置成列、行或陣列。自俯視圖觀之,舉例而言,第一/第二金屬塊118a/118b之形狀可為正方形(如圖1D’所示)、圓形或多邊形。第一中央塊118c可充當晶粒墊,而第二中央塊118d可充當散熱片(heat sink)。第一中央塊118c以及第二中央塊118d可包括金屬、金屬合金或某一其他導電材料。
如圖1C所示,對第一金屬層116a以及第二金屬層116b執行表面修飾製程,以分別在第一金屬層116a上形成第一飾面層120a且在第二金屬層116b上形成第二飾面層120b。舉例而言,第一以及第二飾面層120a/120b可包括鎳、金、鈀、錫、以及銀中之至少一者。第一以及第二飾面層120a/120b可取決於產品要求而具有相同或不同的材料組成。舉例而言,表面修飾製程可包括(例如)電鍍覆製程、無電鍍覆製程及/或浸漬製程。舉例而言,第一及/或第二飾面層120a/120b可為藉由無電鎳無電鈀浸金(electroless nickel electroless palladium immersion gold,ENEPIG)技術而形成的鎳/鈀/金堆疊層。較佳地,第一飾面層120a並非形成於第一中央塊118c上。因為第一中央塊118c充當晶粒墊,所以較佳並不在上面形成第一飾面層,以避免晶粒與晶粒墊之間的分層。
在圖1D中,移除第一以及第二經圖案化光阻層114a/114b。在此階段,獲得引線框架結構100。引線框架結構100包括多個內部引線部分118a/120a、多個外部引線部分118b/120b、晶粒墊部分118c以及散熱片部分118d/120b。因為已在未使用蝕刻製程的情況下形成引線框架結構100,所以突出塊118a/118c中之每一者之側表面可為實質上平面的且實質上垂直於金屬片110之上表面110a。每一突出塊118a及/或118c之側表面亦可為實質上平面的且實質上分別垂直於每一突出塊118a及/或118c之上表面。所稱「實質上平面的」,是指適用表面可展現小於平均值之30%(諸如,小於25%或小於10%)的橫向範圍標準差。突出塊118a/118c之上表面以及突出塊118b/118d之下表面可各自分別實質上共面。圖1D’為圖1D之引線框架結構100的例示性俯視圖。內部引線部分118a/120a安置成圍繞晶粒墊部分118c。
因為在未使用蝕刻製程的情況下形成引線框架結構100,所以引線框架結構100上之飾面層120a/120b及/或形成於引線框架結構100上的突出塊118a/118b/118c/118d無蝕刻損壞且提供較好產品可靠性。此外,因為突出塊118a/118b/118c/118d以及其上所形成的飾面層120a/120b自金屬片110之上表面110a以及下表面110b兩者突出,所以突出塊118a/118b/118c/118d在電路板級溫度循環測試、循環彎曲測試、掉落測試等測試下具有較大接觸面積且提供較佳焊點可靠性。
參看圖1E,在圖1D後,將晶片130附著於晶粒墊部分118c上,且在晶片130與內部引線部分118a/120a之間提供多根導線140。因此,晶片130經由導線140電性連接至內部引線部分118a/120a。
接著,參看圖1F,形成封膠體150以包封住晶片130、導線140、內部引線部分118a/120a以及晶粒墊部分118c。封膠體150可包括(例如)環氧樹脂或其他適用聚合物材料。
接著,參看圖1G,使用第二飾面層120b作為蝕刻罩幕,對金屬片110之下表面110b執行蝕刻製程以移除在移除第二經圖案化光阻層114b後所暴露的金屬片110部分。此蝕刻製程並暴露出封膠體150。在蝕刻製程後,形成多個引線(或接觸端子)125且每一個別引線125與其他引線125實體隔離且電性隔離。每一引線125包括內部引線125a以及外部引線125b。且,因為蝕刻掉所暴露金屬片110,所以蝕刻製程進一步界定晶粒墊123。晶粒墊123以及散熱片127與引線125分開。較佳地,舉例而言,蝕刻製程可為濕式蝕刻製程。
如圖1G所示,外部引線125b自封膠體150向下突出,且包括未由蝕刻製程移除之金屬片110的部分。外部引線125b可因此自封膠體150向下突出達包括金屬片110之厚度以及突出金屬塊118b之厚度兩者的距離。此舉增加外部引線125b之接觸面積,且提供較好焊點可靠性。此外,散熱片127之厚度可包括金屬片110之厚度以及中央突出塊118d之厚度,這會增加散熱片127之暴露表面積且增加可由散熱片127耗散的熱量。
最終,參看圖1H,執行單分製程(singulation process)以獲得個別aQFN封裝結構10。
圖2展示根據本發明之實施例之封裝結構的一項實例的示意性橫截面圖。參看圖2,aQFN封裝結構20包括載體200、晶片230以及多根導線240。可使用圖1A至圖1H中所說明之方法來形成封裝結構20。
載體200(例如,金屬引線框架)包括晶粒墊223以及多個接觸端子(引線)225。引線225包括多個內部引線225a以及多個外部引線225b。內部引線225a以及外部引線225b是由封膠體250界定;亦即,由封膠體250囊封之引線225之部分被界定為內部引線225a,而外部引線225b為引線225之暴露部分。引線225安置在晶粒墊223周圍,且僅示意性描繪三行/列接觸端子225。然而,引線(接觸端子)之配置不應受例示性圖式限制,而是可根據產品要求進行修改。具體言之,如圖2之右側的部分放大圖所示,內部引線225a包括飾面層220a以及第一金屬塊218a,而外部引線225b包括飾面層220b、第二金屬塊218b以及金屬片部分(金屬片之部分)210。歸因於回蝕製程,金屬片部分210及/或第二金屬塊218b之側壁可為彎曲的。封膠體250囊封晶片230、導線240、晶粒墊223以及內部引線225a,而外部引線225b以及散熱片227被暴露。
如圖2所示,外部引線225b可因此自封膠體250向下突出達包括金屬片210之厚度以及突出金屬塊218b之厚度兩者的距離。此舉增加外部引線225b之接觸面積且提供較好焊點可靠性,這會促進此封裝結構20與待黏著之下一級電路板的電性連接。
或者,根據另一實施例,第一以及第二經圖案化光阻層之圖案被設計成不具有晶粒墊之球柵陣列型(ball grid array type),而非如上所述之具有晶粒墊之岸面柵陣列型(land grid array type)。圖3A展示引線框架結構300之例示性橫截面圖,引線框架結構300是根據類似於圖1A至圖1D所說明之處理步驟的處理步驟獲得。引線框架結構300包括金屬片310、多個內部引線部分318a/320a以及多個外部引線部分318b/320b。圖3B為圖3A之引線框架結構300的例示性俯視圖。內部引線部分118a/120a安置成圍繞中央空間P,中央空間P對應於晶片置放位置(虛線)。
另一方面,根據另一實施例,第一光阻層之圖案可設計成不同於第二光阻層之圖案。圖4展示引線框架結構400之例示性橫截面圖,引線框架結構400是根據類似於圖1A至圖1D所說明之處理步驟的處理步驟獲得。引線框架結構400包括金屬片410、晶粒墊部分418c、多個內部引線部分418a/420a、散熱片部分418d/420b以及多個外部引線部分418b/420b。因為圖案不同,所以對於位於較遠離晶粒墊部分之某些內部引線部分418a/420a而言,內部引線部分418a/420a之大小可設計成大於對應外部引線部分418b/420b之大小。較大內部引線部分418a/420a可幫助縮短打線接合長度(例如,在較接近晶粒墊部分之位置處打線接合),而對應外部引線部分418b/420b可在較遠離散熱片部分418d/420b之位置處接合至電路板。以此方式,內部引線部分之打線接合位置並不準確對應於對應外部引線部分之接合位置,此舉可提供較好設計靈活性。
對於根據上述實施例之封裝結構而言,僅需要一個背側蝕刻製程,且前側在蝕刻製程期間受封膠體保護。此外,封裝結構之外部引線(端子)突出且具有獨立特徵,獨立特徵能促進電連接性並改良產品可靠性。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為准。
10...aQFN封裝結構
100...引線框架結構
110...金屬片
110a...上表面
110b...下表面
114a...第一經圖案化光阻層
114b...第二經圖案化光阻層
116a...第一金屬層
116b...第二金屬層
118a...第一突出金屬塊/內部引線部分
118b...第二突出金屬塊/外部引線部分
118c...第一中央突出塊/晶粒墊部分
118d...第二中央突出塊/散熱片
120a...第一飾面層/內部引線部分
120b...第二飾面層/外部引線部分/散熱片部分
123...晶粒墊
125...引線
125a...內部引線
125b...外部引線
127...散熱片
130...晶片
140...導線
150...封膠體
200...載體
210...金屬片部分
218a...第一金屬塊
218b...第二金屬塊
220a...飾面層
220b...飾面層
223...晶粒墊
225...接觸端子/引線
225a...內部引線
225b...外部引線
227...散熱片
230...晶片
240...導線
250...封膠體
300...引線框架結構
310...金屬片
318a...內部引線部分
318b‧‧‧外部引線部分
320a‧‧‧內部引線部分
320b‧‧‧外部引線部分
400‧‧‧引線框架結構
410‧‧‧金屬片
418a‧‧‧內部引線部分
418b‧‧‧外部引線部分
418c‧‧‧晶粒墊部分
418d‧‧‧散熱片部分
420a‧‧‧內部引線部分
420b‧‧‧散熱片部分/外部引線部分
P‧‧‧中央空間
S1‧‧‧開口
S2‧‧‧開口
Sa‧‧‧中央空腔
Sb‧‧‧中央空腔
本文包含附圖以提供對本發明之一些實施例之進一步理解,且附圖併入本說明書中並構成本說明書之一部分。諸圖說明本發明之實施例,且與本說明書一起用以解釋本發明之一些實施例之原理。
圖1A至圖1H為展示根據本發明之實施例之形成引線框架結構以及製造進階四方扁平無引線(aQFN)封裝結構的方法的示意圖。
圖2展示根據本發明之實施例之封裝結構的一實例的示意性橫截面圖。
圖3A展示根據本發明之另一實施例之引線框架結構的例示性橫截面圖。
圖3B為圖3A之引線框架結構之例示性俯視圖。
圖4展示根據本發明之另一實施例之引線框架結構的例示性橫截面圖。
10...aQFN封裝結構
110...金屬片
120a...第一飾面層/內部引線部分
120b...第二飾面層/外部引線部分/散熱片部分
123...晶粒墊
125...引線
125a...內部引線
125b...外部引線
127...散熱片
130...晶片
140...導線
150...封膠體
Claims (21)
- 一種封裝結構,包含:晶片;多個引線,安置在所述晶片周圍且電性耦接至所述晶片,其中所述多個引線中之至少一者包括:中央金屬層,具有上表面以及下表面;第一突出金屬塊,自所述中央金屬層之所述上表面向上延伸且具有第一上表面;第二突出金屬塊,自所述中央金屬層之所述下表面向下延伸且具有第一下表面;第一飾面層,位於所述第一突出金屬塊之所述第一上表面上;以及第二飾面層,位於所述第二突出金屬塊之所述第一下表面上;封裝本體,形成於所述晶片以及所述多個引線上,以使得所述封裝本體實質上覆蓋所述多個引線中之每一者的所述第一突出金屬塊以及所述第一飾面層,其中所述封裝本體暴露所述中央金屬層。
- 如申請專利範圍第1項所述之封裝結構,其中:所述第一突出金屬塊自所述中央金屬層之所述上表面向上延伸達所述中央金屬層之厚度的百分之三十五與百分之百之間的距離;且所述第二突出金屬塊自所述中央金屬層之所述下表面向下延伸達所述中央金屬層之所述厚度的百分之三十五與 百分之百之間的距離。
- 如申請專利範圍第2項所述之封裝結構,其中所述第一突出金屬塊具有實質上垂直於所述第一突出金屬塊之所述第一上表面的側表面。
- 如申請專利範圍第2項所述之封裝結構,更包含:晶粒墊,具有第二上表面以及第二下表面,所述晶片安置在所述晶粒墊之所述第二上表面上;第一金屬層,具有第三上表面以及第三下表面,所述晶粒墊安置在所述第一金屬層之所述第三上表面上,其中所述第一金屬層與所述中央金屬層實質上厚度相同;第二金屬層,具有第四上表面以及第四下表面,所述第一金屬層安置在所述第二金屬層之所述第四上表面上,其中所述第二金屬層與所述第二突出金屬塊實質上厚度相同;以及金屬飾面層,安置在所述第二金屬層之所述第四下表面上。
- 如申請專利範圍第4項所述之封裝結構,其中所述晶粒墊之所述第二上表面與所述中央金屬層之所述上表面實質上在同一平面中。
- 如申請專利範圍第4項所述之封裝結構,其中所述晶粒墊自所述第一金屬層之所述第三上表面向上延伸達所述第一金屬層之厚度的百分之三十五與百分之百之間的距離。
- 一種形成引線框架結構之方法,包含: 提供金屬片、形成於所述金屬片之上表面上之第一經圖案化光阻層以及形成於所述金屬片之下表面上之第二經圖案化光阻層,其中所述上表面與所述下表面之間的距離對應於所述金屬片之厚度;在未由所述第一經圖案化光阻層覆蓋之所述金屬片之所述上表面的區域上形成第一金屬層以及在未由所述第二經圖案化光阻層覆蓋之所述金屬片之所述下表面的區域上形成第二金屬層,其中所述第一金屬層自所述金屬片之所述上表面向上延伸達所述金屬片之所述厚度的百分之三十五與百分之百之間的距離,且其中所述第二金屬層自所述金屬片之所述下表面向下延伸達所述金屬片之所述厚度的百分之三十五與百分之百之間的距離;在所述第一金屬層上形成第一飾面層以及在所述第二金屬層上形成第二飾面層,其中所述第一飾面層暴露所述第一金屬層的部分上表面;以及移除所述第一經圖案化光阻層以及所述第二經圖案化光阻層。
- 如申請專利範圍第7項所述之方法,其中:所述第一金屬層包括多個突出金屬塊,而所述多個突出金屬塊各自包括上表面以及側表面;且所述多個突出金屬塊中之每一者之所述側表面實質上垂直於所述金屬片之所述上表面。
- 如申請專利範圍第8項所述之方法,其中所述第一金屬層以及所述第二金屬層是藉由執行鍍覆製程而形成。
- 如申請專利範圍第8項所述之方法,其中所述第一飾面層以及所述第二飾面層是藉由執行表面修飾製程而形成。
- 如申請專利範圍第10項所述之方法,其中所述表面修飾製程包括有電鍍覆製程、無電鍍覆製程以及浸漬製程中之至少一者。
- 一種製造封裝結構之方法,包含:提供具有上表面以及下表面之金屬片、形成於所述上表面上的多個第一突出金屬塊、形成於所述多個第一突出金屬塊上的第一飾面層、形成於所述下表面上的多個第二突出金屬塊以及形成於所述多個第二突出金屬塊上的第二飾面層;將晶片電性耦接至所述多個第一突出金屬塊中所包括之至少一第一突出塊;在所述金屬片上形成封膠體,以包封所述晶片、所述多個第一突出金屬塊以及形成於所述多個第一突出金屬塊上的所述第一飾面層;以及使用所述第二飾面層作為蝕刻罩幕,進行蝕刻穿透所述金屬片之所述下表面上之區域直至所述封膠體暴露出來,以便界定多個引線,其中所述封裝體暴露所述金屬片。
- 如申請專利範圍第12項所述之方法,其中:所述多個第一突出金屬塊自所述金屬片之所述上表面向上延伸達所述金屬片之厚度的百分之三十五與百分之百之間的距離;且 所述多個第二突出金屬塊自所述金屬片之所述下表面向下延伸達所述金屬片之所述厚度的百分之三十五與百分之百之間的距離。
- 如申請專利範圍第12項所述之方法,其中所述提供步驟包含:在所述金屬片之所述上表面上形成第一經圖案化光阻層,以及在所述金屬片之所述下表面上形成第二經圖案化光阻層;在未由所述第一經圖案化光阻層覆蓋之所述金屬片之所述上表面的區域上形成所述多個第一突出金屬塊,以及在未由所述第二經圖案化光阻層覆蓋之所述金屬片之所述下表面的區域上形成所述多個第二突出金屬塊;在所述多個第一突出金屬塊上形成所述第一飾面層,以及在所述多個第二突出金屬塊上形成所述第二飾面層;以及移除所述第一經圖案化光阻層以及所述第二經圖案化光阻層。
- 如申請專利範圍第14項所述之方法,其中所述多個第一突出金屬塊各自包括實質上垂直於所述金屬片之所述上表面的側表面。
- 如申請專利範圍第14項所述之方法,其中所述多個第一突出金屬塊以及所述多個第二突出金屬塊是藉由執行鍍覆製程而形成。
- 如申請專利範圍第14項所述之方法,其中所述第 一飾面層以及所述第二飾面層是藉由執行表面修飾製程而形成。
- 如申請專利範圍第14項所述之方法,其中所述提供步驟更包含:在形成所述第一經圖案化光阻層以及所述第二經圖案化光阻層後,在所述金屬片之所述上表面上形成第一中央突出塊以及在所述金屬片之所述下表面上形成第二中央突出塊;以及將所述晶片附著至所述第一中央突出塊之上表面;其中所述封膠體包封所述第一中央突出塊。
- 如申請專利範圍第18項所述之方法,其中:所述第一中央突出塊自所述金屬片之所述上表面向上延伸達所述金屬片之所述厚度的百分之三十五與百分之百之間的距離;且所述第二中央突出塊自所述金屬片之所述下表面向下延伸達所述金屬片之所述厚度的百分之三十五與百分之百之間的距離。
- 如申請專利範圍第19項所述之方法,其中所述第一中央突出塊之所述上表面與所述多個第一突出金屬塊中所包括之所述第一突出塊之上表面實質上在同一平面中。
- 一種製造封裝結構之方法,包含:提供引線框架,該引線框架具有金屬片、形成於所述金屬片的上表面上的多個第一突出金屬塊、形成於所述多個第一突出金屬塊上的第一飾面層、形成於所述金屬片的 下表面上的多個第二突出金屬塊以及形成於所述多個第二突出金屬塊上的第二飾面層,其中所述多個第一突出金屬塊各自包括實質上垂直於所述金屬片之所述上表面的側表面;將晶片與至少一所述多個第一突出金屬塊電性耦接;在所述金屬片上形成封膠體,以包封所述晶片、所述多個第一突出金屬塊以及所述第一飾面層;以及使用所述第二飾面層作為蝕刻罩幕,進行蝕刻穿透所述金屬片之所述下表面上之區域直至所述封膠體暴露出來,以便界定多個引線,其中所述封裝體暴露所述金屬片。
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- 2010-11-08 TW TW099138364A patent/TWI419291B/zh active
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Also Published As
Publication number | Publication date |
---|---|
TW201125094A (en) | 2011-07-16 |
US20110163430A1 (en) | 2011-07-07 |
CN102117791A (zh) | 2011-07-06 |
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