TWI401793B - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
TWI401793B
TWI401793B TW98134989A TW98134989A TWI401793B TW I401793 B TWI401793 B TW I401793B TW 98134989 A TW98134989 A TW 98134989A TW 98134989 A TW98134989 A TW 98134989A TW I401793 B TWI401793 B TW I401793B
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Taiwan
Prior art keywords
opening
connection electrode
external connection
layer
semiconductor element
Prior art date
Application number
TW98134989A
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English (en)
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TW201027731A (en
Inventor
Hirotaka Kobayashi
Kentaro Akiyama
Naoki Matsushita
Takayuki Ezaki
Original Assignee
Sony Corp
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Publication of TW201027731A publication Critical patent/TW201027731A/zh
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Publication of TWI401793B publication Critical patent/TWI401793B/zh

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    • H—ELECTRICITY
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    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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Description

半導體裝置
本發明係關於半導體裝置。詳言之為關於適用於固體攝像裝置之良好的半導體裝置。
作為固體攝像裝置，具代表性的有電荷轉送型之CCD(Charge Coupled Device)圖像傳感器、與指定X-Y之地址而讀取之CMOS(Complementary Metal Oxide Semiconductor)圖像傳感器。該等固體攝像裝置係於各二維配置之像素設置包含光電二極體之受光部，將入射於該受光部之光轉換為電子之點較為類似。
一般而言，大多數固體攝像裝置係光從形成配線層之側入射的結構。已知該種固體攝像裝置係因入射光藉由配線層反射而導致感度降低，且因藉由配線層反射之光入射於鄰接像素而導致混色產生。
因此，先前已提案有使光從與配線層形成之側相反之側入射之所謂背面照射型的固體攝像裝置(參照專利文獻1)。
[專利文獻1]日本特開2005-209677號公報
上述專利文獻1所記載之固體攝像裝置，從光入射側觀察，於具有受光部之半導體元件層之內側(背側)係形成有包含外部連接電極之配線層。因此，為使外部連接電極露出，必須以貫通半導體元件層以上之深度將開口部以凹狀形成。該情形下，外部連接電極成為電極墊於開口部之底部露出之狀態。因此，於藉由開口部露出之外部連接電極例如藉由導線接合法連接導線之情形，毛細管之前端易接觸於開口部之緣。
本發明之主要目的在於提供一種在使用連接工具將導電體連接於作為電極墊而露出於開口部之底部之外部連接電極之情形時，無需擴大電極墊之面積便可避免連接工具之前端接觸到開口部之緣的結構。
本發明之半導體裝置具備：半導體元件層；積層配線部，其係包含複數之配線層與複數之層間絕緣膜而形成上述半導體元件層之其中一面側；外部連接電極，其係形成於上述複數之配線層中之一層；及開口部，其係在使上述外部連接電極之表面露出之狀態下由上述半導體元件層至上述積層配線部形成為凹狀；且，上述開口部係使其距離上述外部連接電極較遠之開口徑大於距離上述外部連接電極較近之開口徑而形成。
本發明之半導體裝置，於開口部之底部露出之電極墊之面積係由較小一方之開口徑規定。且，使用於導電體之連接之連接工具的前端係藉由增大距離外部連接電極較遠之開口徑而使其不易接觸於開口部之緣。
根據本發明，在使用連接工具將導電體連接於作為電極墊而露出於開口部之底部之外部連接電極之情形時，無需擴大電極墊之面積便可避免連接工具之前端接觸到開口部之緣。
以下，茲參照圖式詳細說明本發明之具體的實施形態。另，本發明之技術範圍並非限定於以下記述之實施形態，只要係在可導出根據發明之構成要件或其結構而獲得之特定之效果的範圍內，亦包含添加各種變化或改良之形態。
關於用以實施發明之最佳形態(以下為實施形態)將按以下之順序說明。另，作為一例，此處說明將本發明之半導體裝置之構成適用於固體攝像裝置之情形。
1.第1實施形態
2.第2實施形態
3.第3實施形態
<1.第1實施形態> [固體攝像裝置之構成]
圖1係顯示本發明之第1實施形態之固體攝像裝置之構成的要部剖面圖。固體攝像裝置1例如係作為CMOS圖像傳感器而使用者。固體攝像裝置1從平面觀察，其係具有像素區域2、周邊電路區域3、及外部連接區域4。於像素區域2係以像素單位分別以二維配置有複數之受光部5與複數之微透鏡6。周邊電路區域3上，雖未圖示，但係於垂直方向及水平方向配置有用以選擇像素之垂直驅動電路、水平驅動電路等。又，於像素區域2及周邊電路區域3係分別形成有電晶體Tr1、Tr2、及Tr3。另，圖1中僅顯示有電晶體Tr之閘極。
受光部5係於每一個單位像素各設置一個。受光部5係具有將入射於該受光部5之光轉換為電子之功能(光電轉換功能)。受光部5係例如藉由PN接合之光電二極體構成者。受光部5係形成於半導體元件層7。半導體元件層7係例如用矽等之半導體層而構成。微透鏡6係將由外部入射之光聚光於受光部5者。微透鏡6係與受光部6以1對1之關係而配置。
於半導體元件層7之第1面及第2面中成為光入射側之半導體元件層7之第1面上，形成具有光穿透性之保護膜8。再者，於保護膜8之上形成有彩色濾光片層9，而於該彩色濾光片層9之上形成有上述微透鏡6。彩色濾光層9，雖未圖示，但其係區分為紅色濾光片部、綠色濾光片部、及藍色濾光片部。紅色濾光片部係使紅色成分之光選擇性地穿透者，綠色濾光片部係使綠色成分之光選擇性地穿透者，藍色濾光片部係使藍色成分之光選擇性地穿透者。彩色濾光片層9依各受光部6而逐一分色。
另一方面，於與光入射側成相反側之半導體元件層7之第2面側(圖之下面側)形成有積層配線部11。該積層配線部11由複數之配線層與複數之層間絕緣膜而形成。更詳言之，積層配線部11係藉由第1層間絕緣膜12、第1配線層13、第2層間絕緣膜14、第2配線層15、第3層間絕緣膜16、第3配線層17、及第4層間絕緣膜18而形成。該等係從半導體元件層7側起依序積層。另，各層之配線層僅顯示其局部。又，配線層與層間絕緣膜之層數可根據所需而改變(增減)。
第1層間絕緣膜12係形成於半導體元件層7之第2面上。第1配線層13係形成於半導體元件層7之相反側之第1層間絕緣膜12之面上。第2層間絕緣膜14係在覆蓋第1配線層13之狀態下積層於第1層間絕緣膜12之上。第2配線層15係形成於第2層間絕緣膜14之面上。第3層間絕緣膜16係在覆蓋第2配線層15之狀態下積層於第2層間絕緣膜14之上。第3配線層17係形成於第3層間絕緣膜16之面上。第4層間絕緣膜18係在覆蓋第3配線層17之狀態下積層於第3層間絕緣膜16之上。
各層間絕緣膜12、14、16、18例如係可作為氧化矽膜、氟氧化矽膜、有機Low-K膜(低介電常數層間膜)等、及通常之LSI(Large Scale Integrated circuit：大規模積體電路)之層間絕緣膜而使用者。各配線層13、15、17皆係藉由金屬之配線層形成。此處，作為一例，係將第1配線層13及第2配線層15分別藉由銅之配線層形成，而將第3配線層17藉由鋁之配線層形成。又，第2配線層15係含有銅之引出配線15a，而第3配線層17係含有鋁之外部連接電極17a。引出配線15a介隔接觸部CH1而電性連接於外部連接電極17a。接觸部CH1係以貫通第3層間絕緣膜16之狀態而形成。且，引出配線15a係配置於周邊電路區域3，外部連接電極17a係配置於外部連接區域4。
又，於積層配線部11之內部形成有保護環19。該保護環19係藉由分別成平面視矩形之接觸部CH2、第1配線層13之局部13b、接觸部CH3、第2配線層15之局部15b、及接觸部CH4而形成。接觸部CH2係在貫通第1層間絕緣膜12之狀態下以平面視矩形而形成。接觸部CH3係在貫通第2層間絕緣膜14之狀態下形成為俯視矩形。接觸部CH4係在貫通第3層間絕緣膜16之狀態下形成為俯視矩形。上述接觸部CH1係配置於比接觸部CH4更外側。且，接觸部CH2、CH3、CH4從俯視觀察，係以相互重合之位置關係而形成。又，將該等接觸部以於厚度方向中繼之方式，形成為第1配線層13之局部13b與第2配線層15之局部15b從俯視觀察為相互重合之位置關係。
為將含有電晶體等之元件電路與第1配線層13電性連接，接觸部CH2係以與未圖示之另一接觸部一併貫通第1層間絕緣膜12之狀態而形成者。為將第1配線層13與第2配線層15電性連接，接觸部CH3係以與未圖示之另一接觸部一併貫通第2層間絕緣膜14之狀態而形成者。為將第2配線層15與第3配線層17電性連接，接觸部CH1、CH4係以與未圖示之另一接觸部一併貫通第3層間絕緣膜16之狀態而形成者。
於積層配線部11介隔接著層20而貼附有支持基板21。接著層20係將積層配線部11與支持基板21接著者。接著層20係例如包含熱硬化性之樹脂材料者，且介隔於第4層間絕緣膜18與支持基板21之間。支持基板21係使用保持機械強度之材料如矽基板、玻璃基板等而構成之剛性基板。支持基板21係確保包含上述微透鏡6、半導體元件層7、彩色濾光片層9、及積層配線部11等之固體攝像元件之強度之所謂補強用的構件。
於外部連接區域4係設有複數(圖中僅表示有1個)之開口部22。該開口部22係由半導體元件層7至積層配線部11以凹狀形成。該開口部22係以貫通半導體元件層7與覆蓋其表面之保護膜8，甚至積層配線部11之層間絕緣膜12、14、16之狀態而形成。且，開口部22之底部，外部連接電極17之表面係作為電極墊之墊面而露出。
開口部22係具有以第1開口徑d1形成之第1開口部22a、及以第2開口徑d2形成之第2開口部22b。第1開口徑d1與第2開口徑d2之大小關係係設定為d1＞d2。且，露出於開口部22之底部之電極墊的面積係由第2開口徑d2規定。開口部22之深度方向上，第1開口部22a係配置於比第2開口部22b更遠離外部連接電極17之處，而第2開口部22b係配置於比第1開口部22a更靠近外部連接電極17之處。即，第1開口部22a係配置於從光入射側觀察的近前側，而第2開口部22b係配置於從光入射側觀察的裏側。
第1開口部22a與第2開口部22b之交界部分，對應上述之開口徑d1、d2之差分而設有階差23。即，開口部22成為於深度方向之中途賦與階段之所謂附階段結構。開口部22之階差23係於該開口部22之深度方向被設於半導體元件層7側。換言之，半導體元件層7成為在開口部22經賦與階段之結構。
半導體元件層7之內部係以包圍開口部22之外側之狀態而形成有絕緣層24。該絕緣層24係於半導體元件層7之厚度方向以由一端至另一端貫通該半導體元件層7之狀態而形成。又，於支持基板21之面方向，有絕緣層24之局部24a配置於周邊電路區域3與外部連接區域4之交界部。另一方面，上述保護環19係以包圍開口部22(第2開口部22b)之外側之狀態而形成於積層配線部11之內部。
[固體攝像裝置之製造方法]
其後說明本發明之第1實施形態之固體攝像裝置之製造方法。首先，如圖2(A)所示，於將保持基板31、埋入氧化層32、半導體層33依序積層之結構的SOI(Silicon On Insulator)基板用例如乾蝕刻法形成槽34。該槽34係以貫通半導體層33之狀態而形成。且，該槽34以位於後述之開口部32之周邊方式形成連續之框狀。保持基板31係包含例如厚約700μm之矽基板。埋入氧化層32係包含例如厚約1μm~2μm之氧化矽層。半導體層33係包含例如厚約1μm~20μm左右之矽層構成。半導體層33成為對應於上述半導體元件層7之層。
其後，如圖2(B)所示，以將上述槽34埋入方式於半導體層33之上藉由如CVD法使絕緣層24積層。絕緣層24例如係包含氧化矽層、氮化矽層等。
其後，如圖2(C)所示，藉由將半導體層33上之多餘的絕緣材料用如乾蝕刻法等去除，而僅於半導體層33之內部殘留絕緣層24。
其後，如圖3(A)所示，於半導體層33之內部以像素單位形成受光部5，且於半導體層33之表面形成電晶體Tr1、Tr2、及Tr3。該階段之半導體層33係成為含有受光部5與絕緣層24之半導體元件層7。另，絕緣層24之形成可於形成受光部5及電晶體Tr1、Tr2、Tr3後進行。
其後，如圖3(B)所示，於半導體元件層7之第2面側形成積層配線部11。積層配線部11之形成係按如下之順序進行。首先，於半導體元件層7之第2面形成第1層間絕緣膜12後，於該第1層間絕緣膜12上形成第1配線層13。其次，以覆蓋第1配線層13之狀態於第1層間絕緣膜12上形成第2層間絕緣膜14後，於該第2層間絕緣膜14上形成第2配線層15。其後，以覆蓋第2配線層15之狀態於第2層間絕緣膜14上形成第3層間絕緣膜16後，再於該第3層間絕緣膜16上形成第3配線層17。其後，以覆蓋第3配線層17之狀態於第3層間絕緣膜16上形成第4層間絕緣膜18。且，該過程中亦形成保護環19。第1配線層13與第2配線層15分別係由銅形成，且最上層之第3配線層17係由鋁形成。銅配線之形成例如可適用金屬鑲嵌法。鋁配線之形成例如可適用真空蒸鍍法與微影技術。於第3配線層17以位於上述外部連接區域4方式形成外部連接電極17a。
其後，如圖4所示，於積層配線部11介隔接著層20貼合支持基板21。作為接著層20之材料，可使用例如有機SOG(Spin On Glass)、無機SOG、聚醯亞胺等之樹脂材料。使用於基板之貼合之樹脂材料係藉由加熱而硬化。
其後，如圖5所示，去除上述保持基板31與埋入氧化層32。作為具體之去除方法，可利用如CMP(Chemical Mechanical Polishing：化學機械研磨)法、乾蝕刻法、及濕蝕刻法等。
其後，如圖6所示，於半導體元件層7之第1面藉由如CVD法形成保護膜8。再者，於保護膜8之上形成彩色濾光片層9後，對應各受光部5於彩色濾光片層9之上形成微透鏡6。
其後，如圖7所示，在貫通保護層8之狀態下於半導體元件層7形成第1開口部22a。該第1開口部22a在上述外部連接區域4內且比絕緣層24更靠內側之區域，係以上述第1開口徑d1(參照圖1)形成。該第1開口部22a之深度尺寸係小於半導體元件層7與保護膜8結合之厚度以不貫通半導體元件層7。第1開口部22a例如係藉由乾蝕刻法形成。
其後，如圖8所示，由半導體元件層7至積層配線部11形成第2開口部22b。該第2開口部22b係以小於第1開口部22a之開口徑(第2開口徑d2)而形成。該第2開口部22b係在貫通半導體元件層7與層間絕緣膜12、14、16之狀態下形成，以使外部連接電極17之表面露出。該第2開口部22b與上述第1開口部22a相同，係藉由如乾蝕刻法形成。該情形下，在形成第1開口部22a時，與形成第2開口部22b時，係交換用於蝕刻之光罩而經2次乾蝕刻以進行。藉此形成於半導體元件層7側具有階差23之開口部22。
本發明之第1實施形態之固體攝像裝置中，經由微透鏡6入射之光不會被配線層或電晶體等遮擋或反射，而係直接以受光部5受光(光電轉換)。因此可同時實現攝像元件之感度提高及混色防止。又，設於外部連接區域4之開口部22由於係由第1開口部22a與比其開口徑小的第2開口部22b構成，因此於外部連接電極17進行導線接合時，可獲得以下之效果。
即，導線接合法如圖9所示，係於貫通毛細管36之金線等之金屬製之導線37的一端形成球體38，而將該球體38以毛細管36之前端按壓接合於外部連接電極17a之表面(電極墊面)。導線接合法中，毛細管36係相當於連接工具，導線37係相當於導電體。此時，構成開口部22之第1開口部22a與第2開口部22b中，若將接近於開口緣之第1開口部22a形成為較大，則毛細管36之前端將不易接觸於開口部22之緣。因此，可避免毛細管36與固體攝像裝置之位置干涉(導線接合時之接觸)。又，露出於開口部22之底部之電極墊的面積係由小於第1開口部22a之第2開口部22b的開口徑d2(參照圖1)而規定。因此，無需擴大電極墊之面積便可有效地避免毛細管36之前端接觸於開口部22之緣。
又，藉由將對應於開口徑d1、d2之差分的階差23設於開口部22，例如在產生毛細管36與固體攝像裝置之相對位置偏差的情形下，階差23之部分將實現如下功能。即，如圖10所示，在使開口部22為無階差之平直結構(假設開口徑=d2)之情形下，藉由上述之位置偏差，將有球體38接觸開口部22之緣而使得球體材料之局部38a由開口部22露出之虞。與此相對，如圖11所示，於開口部22設置階差23之情形，藉由上述同樣之位置偏差，即使球體38接觸第2開口部22b之緣，球體材料之局部38a亦會收納於階差23之部分。因此球體材料不易從開口部22露出。
又，本發明之第1實施形態之固體攝像裝置，係於該固體攝像裝置之厚度方向以於半導體元件層7側賦與階段之方式設有階差23。因此於積層配線部11側係僅形成開口徑相對較小的第2開口部22b。故，較之單純將開口部22之開口徑以平直結構增大之情形，可擴大確保配線層之形成區域。
又，本發明之第1實施形態之固體攝像裝置，係以包圍開口部22之外側方式於半導體元件層7之內部形成絕緣層24。因此，例如藉由上述之位置偏差，即使球體38接觸開口部22之側面，亦無絕緣層24受到損壞之虞。與此相對，在以覆蓋開口部22之側面方式形成絕緣層之情形，會因與球體38之接觸而使絕緣層易受到損壞。尤其係利用超音波進行導線接合時，絕緣層之損壞將增大。因此會導致產生電性洩漏之問題。又，由導線37傳送之電氣信號為高頻之情形，根據電容器效果，會有超越開口部22側面之絕緣層而洩漏信號之虞。
又，用絕緣層覆蓋開口部22之側面之情形，當然係於形成開口部22後再形成絕緣層。如此情形下，若於開口部22之形成前形成微透鏡6，則其後形成絕緣層時，微透鏡6之表面即以絕緣層覆蓋。因此需要從透鏡表面取除絕緣層。又，於開口部22之形成後形成微透鏡6之情形，用旋塗法塗布透鏡材料時，會因開口部22之影響而於透鏡材料層產生厚度不均。因此不能以均勻之特性形成微透鏡6。與此相對，如上述之製造方法，在藉由槽加工與絕緣材料之埋入而形成絕緣層24之情形下，即使於微透鏡6之形成後形成開口部22，亦可於開口部22之周圍殘留絕緣層24。因此不需要另外用絕緣層覆蓋開口部22之側面。
再者，本發明之第1實施形態之固體攝像裝置，如圖12所示，係以包圍開口部22(第2開口部22b)之外側方式於積層配線部11之內部形成保護環19。因此可獲得如下之效果。即，在未形成保護環19之情形下，如圖13(A)所示，當導線37之球體38接觸於開口部22之側面時，有於此處露出之層間絕緣膜之界面發生剝落，或以此為因而導致引出配線15a腐蝕之虞。與此相對，在形成保護環19之情形下，如圖13(B)所示，即使導線37之球體38接觸於開口部22之側面，亦可藉由保護環19防止層間絕緣膜之剝落。因此可防止隨層間絕緣膜之剝落而導致引出配線15a之腐蝕於未然。
<2.第2實施形態>
圖14係顯示本發明之第2實施形態之固體攝像裝置之構成的要部剖面圖。圖示之固體攝像裝置1與上述第1實施形態比較，尤其係外部連接電極17a之結構不同。即，上述第1實施形態中之外部連接電極17a係以平坦之結構形成，而第2實施形態中之外部連接電極17a係朝向開口部22之開口緣側(圖之上側)形成為凸狀。且，外部連接電極17a之凸面係以在開口部22之底部露出之狀態而配置。
如此之結構之外部連接電極17係藉由如下之製造方法獲得。即，於半導體元件層7之第2面側形成積層配線部11時，如圖15(A)所示，形成第3層間絕緣膜16後，於該第3層間絕緣膜16之局部形成凹部16a。該凹部16a係藉由對應其後步驟中形成外部連接電極17a之位置，而以部分蝕刻使其藉由下陷為凹狀形成第3層間絕緣膜16。該凹部16a係以小於外部連接電極17a之形成區域的區域形成。
其後，如圖15(B)所示，於第3層間絕緣膜16上形成第3配線層17。此時，作為第3配線層17之局部而形成之外部連接電極17a係沿上述凹部16a之凹下形狀而形成。之後係經由與上述第1實施形態相同之製造步驟來製造固體攝像裝置。
藉由上述製造方法所獲得之固體攝像裝置1，其外部連接電極17a係於半導體元件層7側以凸狀形成。因此，該外部連接電極17a在如上述形成開口部22之狀態下，朝向該開口部22之開口緣形成凸狀者。該結構之固體攝像裝置中，露出於開口部22之底部之外部連接電極17a的表面，與上述第1實施形態所採用之電極結構(外部連接電極17a為平坦之結構)比較，係配置於開口部22之開口緣之附近(較淺位置)。因此，與上述第1實施形態比較，毛細管36之前端不易接觸於開口部22之緣。
<3.第3實施形態>
圖16係顯示本發明之第3實施形態之固體攝像裝置之構成的要部剖面圖。圖示之固體攝像裝置1，與上述第1實施形態比較，尤其係開口部22之結構不同。即，上述第1實施形態係將第1開口部22a與第2開口部22b以具有相互共通之中心的矩形狀形成，然第3實施形態係關於至少一個開口部22，將第1開口部22a部分擴大而形成。因此，圖之左右方向中，右側之從第2開口部22b之緣至第1開口部22a之緣的距離為L1，而左側之從第2開口部22b之緣至第1開口部22a之緣的距離為長於上述L1之L2。如此結構之開口部22，例如如圖17所示，於固體攝像裝置1之外周部以特定之間隔排列複數之開口部22之情形，僅適用於配置於4個角部(最端部)之開口部22。該情形下，配置於各角部之開口部22與其以外之開口部22，其中第1開口部22a之大小為不同。即，配置於角部之開口部22與其以外之開口部22比較，其中第1開口部22a係形成較大。
若以具體之尺寸例記述，則，首先，關於全部開口部22，排列方向上鄰接之開口部22間係空有20μm之間隔，而第2開口部22b係以100μm角之正方形形成。與此相對，角部(最端部)之開口部22係以長邊400μm、短邊130μm之長方形形成第1開口部22a，其以外之開口部22皆係以130μm角之正方形形成第1開口部22a。關於全部之開口部22，第1開口部22a係以3.4μm之深度形成，第2開口部22b係以8.2μm之深度形成。又，關於角部之開口部22，於開口部22之排列方向上，一方(圖左側)係以200μm之長度確保階差23a，而另一方(圖右側)係以100μm之長度確保階差23b。一方之階差23a係對應測量接合於外部連接電極17a之導電體之接合強度的測量工具之大小，形成該測量工具之插入區域。另一方之階差23b在用該測量工具測量導電體之接合強度之情形，形成用以避免與該導電體接觸之避開區域。另，此處作為接合於外部連接電極17a之導電體，設想為導線接合使用之金線等之導線的球體(球體直徑約90μm、球體高約15μm)。但，本發明並非限定於此，亦可為將金屬製之凸塊等作為導電體而接合於外部連接電極17a者。
本發明之第3實施形態之固體攝像裝置1，於開口部22之底部露出之外部連接電極17a進行導線接合後而測量導線之接合強度之情形，係利用藉由上述之階差23a確保之工具插入區域。即，如圖18所示，係以藉由第1開口部22a之階差23a於凹下之部分插入測量工具39之前端方式配置，且由該狀態使測量工具39朝接近球體38之方向(箭頭之方向)移動。藉此，相較於未具有可插入測量工具39之階差23a之情形，可配置使測量工具39進出開口部22之裏側。因此，如上述使測量工具39移動時，於球體38之高度方向，可使測量工具39接觸接近該球體38之中心之位置。因此，可用測量工具39準確地測量球體38之接合強度(剪斷強度)。另，在未具有可插入測量工具39之階差23a之情形下，如圖19所示，使測量工具39於接近球體38之方向移動時，測量工具39將接觸於由球體38之中心大幅偏離之位置。因此，難以用測量工具39準確地測量球體38之接合強度(剪斷強度)。
又，上述各實施形態例示了於第1開口部22a與第2開口部22b之交界部分具有階差23的開口部22，但並非限定於此，例如，亦可為藉由將開口部22形成為磨缽狀，而避免與毛細管之接觸的結構。
又，本發明除適用於CMOS圖像傳感器或CCD圖像傳感器等之固體攝像裝置以外，亦可廣泛適用於一般半導體表面上形成實現元件之主要功能之部分(功能部)的半導體元件，及一般具備該等半導體元件之半導體裝置。例如，本發明亦可適用於微處理器或ASIC機構等之半導體積體電路裝置。
1．．．固體攝像裝置(半導體裝置)
7．．．半導體元件層
11．．．積層配線部
12、14、16、18．．．層間絕緣膜
13、15、17．．．配線層
17a．．．外部連接電極
22．．．開口部
22a．．．第1開口部
22b．．．第2開口部
圖1係顯示本發明之第1實施形態之固體攝像裝置之構成的要部剖面圖；
圖2(A)-(C)係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其1)；
圖3(A)、(B)係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其2)；
圖4係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其3)；
圖5係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其4)；
圖6係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其5)；
圖7係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其6)；
圖8係說明本發明之第1實施形態之固體攝像裝置之製造方法的圖(其7)；
圖9係顯示本發明之第1實施形態之固體攝像裝置之導線接合狀態的圖；
圖10係顯示比較例之固體攝像裝置產生導線接合之位置偏差之情形的狀態的圖；
圖11係顯示本發明之第1實施形態之固體攝像裝置產生導線接合之位置偏差之情形的狀態的圖；
圖12係本發明之第1實施形態之固體攝像裝置之局部平面圖；
圖13(A)、(B)係用以說明保護環之功能的圖；
圖14係顯示本發明之第2實施形態之固體攝像裝置之構成的要部剖面圖；
圖15(A)、(B)係說明本發明之第2實施形態之固體攝像裝置之製造方法的圖；
圖16係顯示本發明之第3實施形態之固體攝像裝置之構成的要部剖面圖；
圖17係顯示本發明之第3實施形態之固體攝像裝置之尺寸例的圖；
圖18係顯示本發明之第3實施形態之固體攝像裝置與測量工具之配置狀態的圖；及
圖19係顯示比較例之固體攝像裝置與測量工具之配置狀態的圖。
1．．．固體攝像裝置
2．．．像素區域
3．．．周邊電路區域
4．．．外部連接區域
5．．．受光部
6．．．微透鏡
7．．．半導體元件層
8．．．保護膜
9．．．彩色濾光片層
11．．．積層配線部
12、14、16、18．．．層間絕緣膜
13、15、17．．．配線層
13b．．．第1配線層13之局部
15a．．．引出配線
15b．．．第2配線層15之局部
17a．．．外部連接電極
19．．．保護環
20．．．接著層
21．．．支持基板
22．．．開口部
22a．．．第1開口部
22b．．．第2開口部
23．．．階差
24．．．絕緣層
24a．．．絕緣層之局部
CH1、CH2、CH3、CH4．．．接觸部
d1．．．第1開口徑
d2．．．第2開口徑
Tr1、Tr2、Tr3．．．電晶體

Claims (6)

  1. 一種半導體裝置，其具備：半導體元件層；積層配線部，其係藉由複數之配線層及複數之層間絕緣膜而形成於上述半導體元件層之一面側；外部連接電極，其係形成於上述複數之配線層中之一層；及開口部，其係在使上述外部連接電極之表面露出之狀態下由上述半導體元件層至上述積層配線部形成為凹狀；且上述開口部係使其距離上述外部連接電極較遠之開口徑大於距離上述外部連接電極較近之開口徑而形成；上述外部連接電極係朝向上述開口部之開口緣側形成為凸狀。
  2. 如請求項1之半導體裝置，其中上述開口部含有：第1開口部，其係以第1開口徑形成於距離上述外部連接電極較遠處；及第2開口部，其係以小於上述第1開口徑之第2開口徑形成於距離上述外部連接電極較近處；且，於上述第1開口部與上述第2開口部之交界部分設有階差。
  3. 如請求項2之半導體裝置，其中上述階差係設於上述半導體元件層側。
  4. 如請求項1或2之半導體裝置，其中在包圍上述開口部之外側之狀態下，於上述半導體元 件層之內部形成絕緣層。
  5. 如請求項1或2之半導體裝置，其中在包圍上述開口部之外側之狀態下，於上述積層配線部之內部形成保護環。
  6. 一種半導體裝置，其具備：半導體元件層；積層配線部，其係藉由複數之配線層及複數之層間絕緣膜而形成於上述半導體元件層之一面側；外部連接電極，其係形成於上述複數之配線層中之一層；及開口部，其係在使上述外部連接電極之表面露出之狀態下由上述半導體元件層至上述積層配線部形成為凹狀；且上述開口部係使其距離上述外部連接電極較遠之開口徑大於距離上述外部連接電極較近之開口徑而形成；上述開口部含有：第1開口部，其係以第1開口徑形成於距離上述外部連接電極較遠處；及第2開口部，其係以小於上述第1開口徑之第2開口徑形成於距離上述外部連接電極較近處；且，於上述第1開口部與上述第2開口部之交界部分設有階差；上述開口部係以複數形成；且上述複數之開口部中之至少一個係對應於測量接合於上述外部連接電極之導電體之接合強度的測量工具之大小，且將上述第1開口部形成為大於其它開口部。
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