TWI389226B - 當允許信號傳導時提供互連墊之結構的支撐之方法及裝置 - Google Patents

當允許信號傳導時提供互連墊之結構的支撐之方法及裝置 Download PDF

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Publication number
TWI389226B
TWI389226B TW094145649A TW94145649A TWI389226B TW I389226 B TWI389226 B TW I389226B TW 094145649 A TW094145649 A TW 094145649A TW 94145649 A TW94145649 A TW 94145649A TW I389226 B TWI389226 B TW I389226B
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TW
Taiwan
Prior art keywords
metal
layer
interconnect
metal layer
openings
Prior art date
Application number
TW094145649A
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English (en)
Chinese (zh)
Other versions
TW200634957A (en
Inventor
海斯 凱文Ｊ
多尼 蘇珊Ｈ
米勒 詹姆士Ｗ
雍承周
Original Assignee
飛思卡爾半導體公司
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Application filed by 飛思卡爾半導體公司 filed Critical 飛思卡爾半導體公司
Publication of TW200634957A publication Critical patent/TW200634957A/zh
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Wire Bonding (AREA)
TW094145649A 2005-01-11 2005-12-21 當允許信號傳導時提供互連墊之結構的支撐之方法及裝置 TWI389226B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/033,008 US7241636B2 (en) 2005-01-11 2005-01-11 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance

Publications (2)

Publication Number Publication Date
TW200634957A TW200634957A (en) 2006-10-01
TWI389226B true TWI389226B (zh) 2013-03-11

Family

ID=36653824

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094145649A TWI389226B (zh) 2005-01-11 2005-12-21 當允許信號傳導時提供互連墊之結構的支撐之方法及裝置

Country Status (6)

Country Link
US (2) US7241636B2 (https=)
JP (1) JP2008527710A (https=)
KR (1) KR101203220B1 (https=)
CN (2) CN101556945B (https=)
TW (1) TWI389226B (https=)
WO (1) WO2006076082A2 (https=)

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US7739636B2 (en) * 2007-10-23 2010-06-15 International Business Machines Corporation Design structure incorporating semiconductor device structures that shield a bond pad from electrical noise
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JP5772926B2 (ja) * 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
US9105485B2 (en) * 2013-03-08 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Bonding structures and methods of forming the same
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JP6836418B2 (ja) * 2017-02-27 2021-03-03 ルネサスエレクトロニクス株式会社 半導体装置
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CN110544683B (zh) * 2018-05-29 2021-03-19 澜起科技股份有限公司 用于检测金属间介质层缺陷的叠层结构及测试方法
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Also Published As

Publication number Publication date
CN100561693C (zh) 2009-11-18
KR101203220B1 (ko) 2012-11-20
CN101556945A (zh) 2009-10-14
US7241636B2 (en) 2007-07-10
KR20070099599A (ko) 2007-10-09
CN101167170A (zh) 2008-04-23
WO2006076082A2 (en) 2006-07-20
US7626276B2 (en) 2009-12-01
US20060154469A1 (en) 2006-07-13
CN101556945B (zh) 2012-05-23
US20070210442A1 (en) 2007-09-13
JP2008527710A (ja) 2008-07-24
TW200634957A (en) 2006-10-01
WO2006076082A3 (en) 2007-12-21

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