JP2008527710A - 信号導電効率を上げながら配線パッド用構造支持体を実現する方法及び装置 - Google Patents

信号導電効率を上げながら配線パッド用構造支持体を実現する方法及び装置 Download PDF

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Publication number
JP2008527710A
JP2008527710A JP2007550366A JP2007550366A JP2008527710A JP 2008527710 A JP2008527710 A JP 2008527710A JP 2007550366 A JP2007550366 A JP 2007550366A JP 2007550366 A JP2007550366 A JP 2007550366A JP 2008527710 A JP2008527710 A JP 2008527710A
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Prior art keywords
metal
wiring
layer
metal layer
openings
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Pending
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JP2007550366A
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English (en)
Japanese (ja)
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JP2008527710A5 (https=
Inventor
ジェイ． ヘス、ケビン
エイチ． ダウニー、スーザン
ダブリュ． ミラー、ジェームス
チョイ ヨン、チェン
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NXP USA Inc
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NXP USA Inc
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Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2008527710A publication Critical patent/JP2008527710A/ja
Publication of JP2008527710A5 publication Critical patent/JP2008527710A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4405—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/44—Conductive materials thereof
    • H10W20/4403—Conductive materials thereof based on metals, e.g. alloys, metal silicides
    • H10W20/4421—Conductive materials thereof based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Wire Bonding (AREA)
JP2007550366A 2005-01-11 2005-11-30 信号導電効率を上げながら配線パッド用構造支持体を実現する方法及び装置 Pending JP2008527710A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/033,008 US7241636B2 (en) 2005-01-11 2005-01-11 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
PCT/US2005/043207 WO2006076082A2 (en) 2005-01-11 2005-11-30 Method and apparatus for providing structural support for interconnect pad while allowing signal conductance

Publications (2)

Publication Number Publication Date
JP2008527710A true JP2008527710A (ja) 2008-07-24
JP2008527710A5 JP2008527710A5 (https=) 2009-01-08

Family

ID=36653824

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007550366A Pending JP2008527710A (ja) 2005-01-11 2005-11-30 信号導電効率を上げながら配線パッド用構造支持体を実現する方法及び装置

Country Status (6)

Country Link
US (2) US7241636B2 (https=)
JP (1) JP2008527710A (https=)
KR (1) KR101203220B1 (https=)
CN (2) CN101556945B (https=)
TW (1) TWI389226B (https=)
WO (1) WO2006076082A2 (https=)

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US7443020B2 (en) * 2005-02-28 2008-10-28 Texas Instruments Incorporated Minimizing number of masks to be changed when changing existing connectivity in an integrated circuit
JP4708148B2 (ja) 2005-10-07 2011-06-22 ルネサスエレクトロニクス株式会社 半導体装置
US7645675B2 (en) * 2006-01-13 2010-01-12 International Business Machines Corporation Integrated parallel plate capacitors
US7592710B2 (en) * 2006-03-03 2009-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Bond pad structure for wire bonding
JP2007299968A (ja) * 2006-05-01 2007-11-15 Matsushita Electric Ind Co Ltd 半導体装置
US7253531B1 (en) * 2006-05-12 2007-08-07 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor bonding pad structure
US7589945B2 (en) * 2006-08-31 2009-09-15 Freescale Semiconductor, Inc. Distributed electrostatic discharge protection circuit with varying clamp size
JP2008205165A (ja) * 2007-02-20 2008-09-04 Toshiba Corp 半導体集積回路装置
US7586132B2 (en) * 2007-06-06 2009-09-08 Micrel, Inc. Power FET with low on-resistance using merged metal layers
US20090020856A1 (en) * 2007-07-17 2009-01-22 International Business Machines Corporation Semiconductor device structures and methods for shielding a bond pad from electrical noise
US7777998B2 (en) 2007-09-10 2010-08-17 Freescale Semiconductor, Inc. Electrostatic discharge circuit and method therefor
JP5027605B2 (ja) * 2007-09-25 2012-09-19 パナソニック株式会社 半導体装置
US7739636B2 (en) * 2007-10-23 2010-06-15 International Business Machines Corporation Design structure incorporating semiconductor device structures that shield a bond pad from electrical noise
US8183698B2 (en) * 2007-10-31 2012-05-22 Agere Systems Inc. Bond pad support structure for semiconductor device
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JP5291917B2 (ja) 2007-11-09 2013-09-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
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US8258629B2 (en) * 2008-04-02 2012-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Curing low-k dielectrics for improving mechanical strength
US8274146B2 (en) * 2008-05-30 2012-09-25 Freescale Semiconductor, Inc. High frequency interconnect pad structure
US8581423B2 (en) 2008-11-17 2013-11-12 Taiwan Semiconductor Manufacturing Company, Ltd. Double solid metal pad with reduced area
US20100148218A1 (en) * 2008-12-10 2010-06-17 Panasonic Corporation Semiconductor integrated circuit device and method for designing the same
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US8030776B2 (en) * 2009-10-07 2011-10-04 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit with protective structure
US8261229B2 (en) * 2010-01-29 2012-09-04 Xilinx, Inc. Method and apparatus for interconnect layout in an integrated circuit
US8242613B2 (en) 2010-09-01 2012-08-14 Freescale Semiconductor, Inc. Bond pad for semiconductor die
TWI453425B (zh) 2012-09-07 2014-09-21 Mjc Probe Inc 晶片電性偵測裝置及其形成方法
US20130154099A1 (en) 2011-12-16 2013-06-20 Semiconductor Components Industries, Llc Pad over interconnect pad structure design
CN103579192A (zh) * 2012-07-26 2014-02-12 中芯国际集成电路制造(上海)有限公司 一种新型的通孔链测试结构及其测试方法
JP5772926B2 (ja) * 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
US9105485B2 (en) * 2013-03-08 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Bonding structures and methods of forming the same
US9659882B2 (en) * 2015-01-20 2017-05-23 Sandisk Technologies Llc System, method and apparatus to relieve stresses in a semiconductor die caused by uneven internal metallization layers
US9564404B2 (en) * 2015-01-20 2017-02-07 Sandisk Technologies Llc System, method and apparatus to relieve stresses in a semiconductor wafer caused by uneven internal metallization layers
US9859891B1 (en) * 2016-06-24 2018-01-02 Qualcomm Incorporated Standard cell architecture for reduced parasitic resistance and improved datapath speed
KR102508527B1 (ko) * 2016-07-01 2023-03-09 삼성전자주식회사 필름형 반도체 패키지
US10192832B2 (en) * 2016-08-16 2019-01-29 United Microelectronics Corp. Alignment mark structure with dummy pattern
US9929114B1 (en) 2016-11-02 2018-03-27 Vanguard International Semiconductor Corporation Bonding pad structure having island portions and method for manufacturing the same
JP6836418B2 (ja) * 2017-02-27 2021-03-03 ルネサスエレクトロニクス株式会社 半導体装置
US10910330B2 (en) * 2017-03-13 2021-02-02 Mediatek Inc. Pad structure and integrated circuit die using the same
US10566300B2 (en) * 2018-01-22 2020-02-18 Globalfoundries Inc. Bond pads with surrounding fill lines
CN110544683B (zh) * 2018-05-29 2021-03-19 澜起科技股份有限公司 用于检测金属间介质层缺陷的叠层结构及测试方法
US10861807B2 (en) * 2018-11-21 2020-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit features with obtuse angles and method forming same
DE102019107500A1 (de) 2018-11-21 2020-05-28 Taiwan Semiconductor Manufacturing Company, Ltd. Integrierte Schaltkreiselemente mit stumpfen Winkeln und Verfahren zu deren Herstellung
CN110491849B (zh) * 2019-07-18 2024-11-08 珠海零边界集成电路有限公司 芯片、输入输出结构和垫层
US20210104477A1 (en) * 2019-10-04 2021-04-08 Macronix International Co., Ltd. Pad structure
KR20220140129A (ko) 2021-04-09 2022-10-18 삼성전자주식회사 반도체 소자의 검출용 패드 구조물
CN113571479B (zh) * 2021-06-30 2024-08-27 华为数字能源技术有限公司 芯片封装组件的测试方法

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JP2004282000A (ja) * 2003-02-25 2004-10-07 Fujitsu Ltd 半導体装置

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JP2004014609A (ja) * 2002-06-04 2004-01-15 Sharp Corp 半導体装置及びその製造方法
JP2004282000A (ja) * 2003-02-25 2004-10-07 Fujitsu Ltd 半導体装置

Also Published As

Publication number Publication date
CN100561693C (zh) 2009-11-18
KR101203220B1 (ko) 2012-11-20
CN101556945A (zh) 2009-10-14
US7241636B2 (en) 2007-07-10
KR20070099599A (ko) 2007-10-09
CN101167170A (zh) 2008-04-23
WO2006076082A2 (en) 2006-07-20
US7626276B2 (en) 2009-12-01
US20060154469A1 (en) 2006-07-13
TWI389226B (zh) 2013-03-11
CN101556945B (zh) 2012-05-23
US20070210442A1 (en) 2007-09-13
TW200634957A (en) 2006-10-01
WO2006076082A3 (en) 2007-12-21

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