TWI356306B - A method for placing a device in a selected mode o - Google Patents
A method for placing a device in a selected mode o Download PDFInfo
- Publication number
- TWI356306B TWI356306B TW093134100A TW93134100A TWI356306B TW I356306 B TWI356306 B TW I356306B TW 093134100 A TW093134100 A TW 093134100A TW 93134100 A TW93134100 A TW 93134100A TW I356306 B TWI356306 B TW I356306B
- Authority
- TW
- Taiwan
- Prior art keywords
- signal
- logic state
- component
- mode
- input
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/004—Reconfigurable analogue/digital or digital/analogue converters
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3209—Monitoring remote activity, e.g. over telephone lines or network connections
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/002—Provisions or arrangements for saving power, e.g. by allowing a sleep mode, using lower supply voltage for downstream stages, using multiple clock domains or by selectively turning on stages when needed
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/462—Details of the control circuitry, e.g. of the successive approximation register
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/66—Digital/analogue converters
- H03M1/70—Automatic control for modifying converter range
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. Transmission Power Control [TPC] or power classes
- H04W52/02—Power saving arrangements
- H04W52/0209—Power saving arrangements in terminal devices
- H04W52/0261—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level
- H04W52/0287—Power saving arrangements in terminal devices managing power supply demand, e.g. depending on battery level changing the clock frequency of a controller in the equipment
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Analogue/Digital Conversion (AREA)
- Programmable Controllers (AREA)
- Executing Machine-Instructions (AREA)
- Control Of El Displays (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/723,464 US7181635B2 (en) | 2000-03-13 | 2003-11-26 | Method for placing a device in a selected mode of operation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW200517853A TW200517853A (en) | 2005-06-01 |
| TWI356306B true TWI356306B (en) | 2012-01-11 |
Family
ID=34652658
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW093134100A TWI356306B (en) | 2003-11-26 | 2004-11-09 | A method for placing a device in a selected mode o |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7181635B2 (enExample) |
| EP (1) | EP1687900B1 (enExample) |
| JP (1) | JP4766870B2 (enExample) |
| CN (1) | CN100533983C (enExample) |
| AT (1) | ATE507616T1 (enExample) |
| DE (1) | DE602004032462D1 (enExample) |
| TW (1) | TWI356306B (enExample) |
| WO (1) | WO2005055428A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI778601B (zh) * | 2021-04-29 | 2022-09-21 | 新唐科技股份有限公司 | 微控制器、操作系統及控制方法 |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7181635B2 (en) * | 2000-03-13 | 2007-02-20 | Analog Devices, Inc. | Method for placing a device in a selected mode of operation |
| US7605723B2 (en) * | 2004-12-14 | 2009-10-20 | Cirrus Logic, Inc. | Circuits and methods for implementing mode selection in multiple-mode integrated circuits |
| US7782805B1 (en) | 2005-02-08 | 2010-08-24 | Med Belhadj | High speed packet interface and method |
| US7652922B2 (en) | 2005-09-30 | 2010-01-26 | Mosaid Technologies Incorporated | Multiple independent serial link memory |
| JP5193045B2 (ja) | 2005-09-30 | 2013-05-08 | モサイド・テクノロジーズ・インコーポレーテッド | 出力制御部を備えたメモリ |
| US20070165457A1 (en) * | 2005-09-30 | 2007-07-19 | Jin-Ki Kim | Nonvolatile memory system |
| US8069328B2 (en) * | 2006-03-28 | 2011-11-29 | Mosaid Technologies Incorporated | Daisy chain cascade configuration recognition technique |
| US8364861B2 (en) * | 2006-03-28 | 2013-01-29 | Mosaid Technologies Incorporated | Asynchronous ID generation |
| US7551492B2 (en) | 2006-03-29 | 2009-06-23 | Mosaid Technologies, Inc. | Non-volatile semiconductor memory with page erase |
| US8812885B2 (en) * | 2006-12-28 | 2014-08-19 | Texas Instruments Incorporated | Detecting wake-up events for a chip based on an I/O power supply |
| US7983099B2 (en) | 2007-12-20 | 2011-07-19 | Mosaid Technologies Incorporated | Dual function compatible non-volatile memory device |
| US7834685B1 (en) | 2008-09-18 | 2010-11-16 | National Semiconductor Corporation | Chopped auto-zeroed ping-pong amplifier and related apparatus, system, and method |
| US8135972B2 (en) | 2009-03-10 | 2012-03-13 | Cortina Systems, Inc. | Data interface power consumption control |
| US8319673B2 (en) * | 2010-05-18 | 2012-11-27 | Linear Technology Corporation | A/D converter with compressed full-scale range |
| US8669896B2 (en) * | 2011-10-25 | 2014-03-11 | Mediatek Inc. | Successive-approximation-register analog-to-digital convertor and related controlling method |
| CN103917938B (zh) * | 2011-11-09 | 2016-10-19 | 丰田自动车株式会社 | 电子控制装置及微型计算机的控制方法 |
| JP6213538B2 (ja) * | 2015-09-24 | 2017-10-18 | 横河電機株式会社 | 信号処理回路 |
| EP3771889A1 (de) * | 2019-07-31 | 2021-02-03 | Siemens Aktiengesellschaft | Messvorrichtung |
| US11221977B2 (en) * | 2019-08-29 | 2022-01-11 | Microchip Technology Incorporated | Daisy chain mode entry sequence |
| CN115514366A (zh) * | 2022-11-15 | 2022-12-23 | 灿芯半导体(成都)有限公司 | 一种温度传感器中单转双驱动电路及其时序控制优化方法 |
| CN119582814B (zh) * | 2025-02-10 | 2025-05-06 | 苏州萨沙迈半导体有限公司 | 时钟控制装置、方法及控制器、系统级芯片 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6488645A (en) * | 1987-09-29 | 1989-04-03 | Nec Corp | Single chip microcomputer |
| JPH04295696A (ja) * | 1991-03-26 | 1992-10-20 | Omron Corp | メモリ装置およびデータ読出し方法 |
| US5367300A (en) * | 1992-01-30 | 1994-11-22 | National Semiconductor Corporation | Serial data communication interface architecture |
| JPH0628312A (ja) * | 1992-07-09 | 1994-02-04 | Fujitsu Ltd | シリアルデータ転送方式 |
| JPH07230413A (ja) * | 1994-02-18 | 1995-08-29 | Oki Electric Ind Co Ltd | レディ信号制御回路 |
| US5619204A (en) * | 1995-02-27 | 1997-04-08 | Analog Devices, Incorporated | Analog-to-digital converter with optional low-power mode |
| US5714955A (en) * | 1995-06-07 | 1998-02-03 | Linear Technology Corporation | Analog-to-digital converter |
| JP3260631B2 (ja) * | 1996-08-09 | 2002-02-25 | 日本電気株式会社 | 周期的にa/d変換を行うa/dコンバータ回路 |
| US5886658A (en) * | 1997-05-15 | 1999-03-23 | Crystal Semiconductor Corporation | Serial port interface system and method for an analog-to-digital converter |
| US6456219B1 (en) * | 2000-02-22 | 2002-09-24 | Texas Instruments Incorporated | Analog-to-digital converter including two-wire interface circuit |
| US6681332B1 (en) * | 2000-03-13 | 2004-01-20 | Analog Devices, Inc. | System and method to place a device in power down modes/states and restore back to first mode/state within user-controlled time window |
| US7181635B2 (en) | 2000-03-13 | 2007-02-20 | Analog Devices, Inc. | Method for placing a device in a selected mode of operation |
| JP2002367369A (ja) * | 2001-06-05 | 2002-12-20 | Nec Corp | 半導体記憶装置 |
| US6642879B2 (en) * | 2001-07-16 | 2003-11-04 | Cirrus Logic, Inc. | Method and system for powering down an analog-to-digital converter into a sleep mode |
| US6831583B1 (en) * | 2002-11-05 | 2004-12-14 | Analog Devices, Inc. | Integrated circuit comprising a microprocessor and an analogue to digital converter which is selectively operable under the control of the microprocessor and independently of the microprocessor, and a method for operating the integrated circuit |
| US6744395B1 (en) * | 2002-11-27 | 2004-06-01 | International Business Machines Corporation | Power-scalable asynchronous architecture for a wave-pipelined analog to digital converter |
-
2003
- 2003-11-26 US US10/723,464 patent/US7181635B2/en not_active Expired - Lifetime
-
2004
- 2004-11-09 TW TW093134100A patent/TWI356306B/zh not_active IP Right Cessation
- 2004-11-10 WO PCT/US2004/037402 patent/WO2005055428A1/en not_active Ceased
- 2004-11-10 AT AT04820015T patent/ATE507616T1/de not_active IP Right Cessation
- 2004-11-10 DE DE602004032462T patent/DE602004032462D1/de not_active Expired - Lifetime
- 2004-11-10 EP EP04820015A patent/EP1687900B1/en not_active Expired - Lifetime
- 2004-11-10 CN CNB2004800351619A patent/CN100533983C/zh not_active Expired - Fee Related
- 2004-11-26 JP JP2004342528A patent/JP4766870B2/ja not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI778601B (zh) * | 2021-04-29 | 2022-09-21 | 新唐科技股份有限公司 | 微控制器、操作系統及控制方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2005055428A1 (en) | 2005-06-16 |
| ATE507616T1 (de) | 2011-05-15 |
| JP4766870B2 (ja) | 2011-09-07 |
| DE602004032462D1 (de) | 2011-06-09 |
| TW200517853A (en) | 2005-06-01 |
| US20050035895A1 (en) | 2005-02-17 |
| JP2005166048A (ja) | 2005-06-23 |
| EP1687900A1 (en) | 2006-08-09 |
| US7181635B2 (en) | 2007-02-20 |
| CN1886897A (zh) | 2006-12-27 |
| WO2005055428A8 (en) | 2005-08-25 |
| CN100533983C (zh) | 2009-08-26 |
| EP1687900B1 (en) | 2011-04-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI356306B (en) | A method for placing a device in a selected mode o | |
| TW200541216A (en) | Delay line synchronizer apparatus and method | |
| TW498164B (en) | Integrated circuit testing device with dual purpose analog and digital channels | |
| TW201027296A (en) | Continuous synchronization for multiple ADCs | |
| TW200935234A (en) | System and method for setting access and modification for synchronous serial interface NAND | |
| TW200839571A (en) | Device and method for access time reduction by speculatively decoding non-memory read commands on a serial interface | |
| JPH09274559A (ja) | スイッチングマスタースレーブ回路 | |
| CN106164687B (zh) | 针对具有异步复位信号的扫描链的复位方案 | |
| TWI317208B (en) | Method and/or apparatus for generating a write gated clock signal | |
| US7623395B2 (en) | Buffer circuit and buffer control method | |
| TWI262650B (en) | Flip-flop | |
| TW200842547A (en) | Clock circuitry architecture to improve electro-magnetic compatibility and optimize peak of currents in micro-controller | |
| US6586968B1 (en) | Programmable bit ordering for serial port | |
| TW201137892A (en) | Memory device including a memory block having a fixed latency data output | |
| JPH09231764A (ja) | バーストカウンタ回路及びその動作方法 | |
| TW201720091A (zh) | 積體電路以及其串化器/解串化器實體層電路的操作方法 | |
| CN103136106B (zh) | 存储器装置的操作方法、读取数字存储器的方法及其应用 | |
| JP3701100B2 (ja) | クロック生成回路及びクロック生成方法 | |
| TW200929259A (en) | Memory architecture and operating method for viterbi decoder | |
| CN111143275A (zh) | 一种ip管理和功耗优化系统及方法 | |
| JP2560068B2 (ja) | タイマ回路 | |
| JP2002043527A (ja) | 半導体集積回路装置 | |
| JPH09198193A (ja) | ディジタル/アナログ変換器のインタフェース装置 | |
| TWI324299B (en) | Processor system and method for reducing power consumption of a processor | |
| TWI317486B (en) | Architecture for finite state machine decomposition |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |