TWI344175B - - Google Patents

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Publication number
TWI344175B
TWI344175B TW096128851A TW96128851A TWI344175B TW I344175 B TWI344175 B TW I344175B TW 096128851 A TW096128851 A TW 096128851A TW 96128851 A TW96128851 A TW 96128851A TW I344175 B TWI344175 B TW I344175B
Authority
TW
Taiwan
Prior art keywords
integrated circuit
pattern
semiconductor integrated
semiconductor
semiconductor device
Prior art date
Application number
TW096128851A
Other languages
English (en)
Chinese (zh)
Other versions
TW200818292A (en
Inventor
Yukihiro Tanemura
Original Assignee
Mitsumi Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsumi Electric Co Ltd filed Critical Mitsumi Electric Co Ltd
Publication of TW200818292A publication Critical patent/TW200818292A/zh
Application granted granted Critical
Publication of TWI344175B publication Critical patent/TWI344175B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/04Automatically aligning, aiming or focusing the laser beam, e.g. using the back-scattered light
    • B23K26/042Automatically aligning the laser beam
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/351Working by laser beam, e.g. welding, cutting or boring for trimming or tuning of electrical components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5256Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive
    • H01L23/5258Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising fuses, i.e. connections having their state changed from conductive to non-conductive the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54453Marks applied to semiconductor devices or parts for use prior to dicing
    • H01L2223/5446Located in scribe lines
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54473Marks applied to semiconductor devices or parts for use after dicing
    • H01L2223/5448Located on chip prior to dicing and remaining on chip after dicing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Mechanical Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Manufacturing & Machinery (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laser Beam Processing (AREA)
TW096128851A 2006-09-05 2007-08-06 Semiconductor device and method for manufacturing the same TW200818292A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006240324A JP5076407B2 (ja) 2006-09-05 2006-09-05 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
TW200818292A TW200818292A (en) 2008-04-16
TWI344175B true TWI344175B (enExample) 2011-06-21

Family

ID=39288840

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096128851A TW200818292A (en) 2006-09-05 2007-08-06 Semiconductor device and method for manufacturing the same

Country Status (4)

Country Link
US (1) US7781901B2 (enExample)
JP (1) JP5076407B2 (enExample)
KR (1) KR100904197B1 (enExample)
TW (1) TW200818292A (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006019911A1 (en) * 2004-07-26 2006-02-23 Sun Microsystems, Inc. Multi-chip module and single-chip module for chips and proximity connectors
JP5263918B2 (ja) * 2007-07-24 2013-08-14 日本電気株式会社 半導体装置及びその製造方法
JP5353035B2 (ja) * 2008-03-17 2013-11-27 富士電機株式会社 半導体装置およびその製造方法
JP5266857B2 (ja) * 2008-04-24 2013-08-21 ミツミ電機株式会社 チップのアライメント方法
JP2010074106A (ja) * 2008-09-22 2010-04-02 Nec Electronics Corp 半導体チップ、半導体ウェーハおよびそのダイシング方法
JP2013157385A (ja) * 2012-01-27 2013-08-15 Semiconductor Components Industries Llc 半導体装置及びその自動外観検査方法
KR102848774B1 (ko) * 2015-08-10 2025-08-22 델타 디자인, 인코포레이티드 레이저 및 카메라가 장착되고 각도를 가지는 인-포켓(in-pocket) 집적회로(ic) 장치 검출 방법 및 장치
KR102403730B1 (ko) 2018-01-22 2022-05-30 삼성전자주식회사 반도체 칩 및 이를 포함하는 반도체 패키지
CN113394193B (zh) * 2020-03-13 2022-03-22 长鑫存储技术有限公司 半导体结构及其形成方法、激光熔丝的熔断方法
KR102507592B1 (ko) * 2021-05-24 2023-03-09 한국과학기술원 Mems 소자의 제조 방법

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01243419A (ja) * 1988-03-25 1989-09-28 Hitachi Ltd 位置合わせ方法
JPH1012527A (ja) * 1996-06-26 1998-01-16 Hitachi Ltd 半導体チップおよび半導体製造用レチクル
KR100298193B1 (ko) * 1998-06-16 2001-11-15 박종섭 웨이퍼의수평정렬을위한레티클
KR20000026310A (ko) * 1998-10-20 2000-05-15 김영환 반도체장치
JP3566133B2 (ja) 1999-05-11 2004-09-15 セイコーインスツルメンツ株式会社 半導体装置の製造方法
US6441504B1 (en) * 2000-04-25 2002-08-27 Amkor Technology, Inc. Precision aligned and marked structure
US7053495B2 (en) * 2001-09-17 2006-05-30 Matsushita Electric Industrial Co., Ltd. Semiconductor integrated circuit device and method for fabricating the same
US6815838B2 (en) * 2002-02-20 2004-11-09 International Business Machines Corporation Laser alignment target and method
KR100463047B1 (ko) 2002-03-11 2004-12-23 삼성전자주식회사 반도체 장치의 퓨즈 박스 및 그 제조방법
JP2005109145A (ja) * 2003-09-30 2005-04-21 Toshiba Corp 半導体装置
JP4753170B2 (ja) 2004-03-05 2011-08-24 三洋電機株式会社 半導体装置及びその製造方法
JP4673569B2 (ja) * 2004-03-31 2011-04-20 株式会社リコー 半導体装置

Also Published As

Publication number Publication date
TW200818292A (en) 2008-04-16
KR100904197B1 (ko) 2009-06-23
KR20080022041A (ko) 2008-03-10
JP2008066381A (ja) 2008-03-21
US20080251950A1 (en) 2008-10-16
US7781901B2 (en) 2010-08-24
JP5076407B2 (ja) 2012-11-21

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees