TWI325155B - Metal reduction in wafer scribe area - Google Patents

Metal reduction in wafer scribe area Download PDF

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Publication number
TWI325155B
TWI325155B TW093100911A TW93100911A TWI325155B TW I325155 B TWI325155 B TW I325155B TW 093100911 A TW093100911 A TW 093100911A TW 93100911 A TW93100911 A TW 93100911A TW I325155 B TWI325155 B TW I325155B
Authority
TW
Taiwan
Prior art keywords
layer
metal
saw blade
exposed
wafer
Prior art date
Application number
TW093100911A
Other languages
English (en)
Chinese (zh)
Other versions
TW200416857A (en
Inventor
Scott K Pozder
Trent S Uehling
Lakshmin Ramanathan
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200416857A publication Critical patent/TW200416857A/zh
Application granted granted Critical
Publication of TWI325155B publication Critical patent/TWI325155B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043—Making grooves, e.g. cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
TW093100911A 2003-01-27 2004-01-14 Metal reduction in wafer scribe area TWI325155B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/351,798 US6951801B2 (en) 2003-01-27 2003-01-27 Metal reduction in wafer scribe area

Publications (2)

Publication Number Publication Date
TW200416857A TW200416857A (en) 2004-09-01
TWI325155B true TWI325155B (en) 2010-05-21

Family

ID=32735850

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093100911A TWI325155B (en) 2003-01-27 2004-01-14 Metal reduction in wafer scribe area

Country Status (6)

Country Link
US (1) US6951801B2 (enExample)
JP (1) JP2006516824A (enExample)
KR (1) KR101001530B1 (enExample)
CN (1) CN1777978B (enExample)
TW (1) TWI325155B (enExample)
WO (1) WO2004073014A2 (enExample)

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US7674689B2 (en) * 2007-09-20 2010-03-09 Infineon Technologies Ag Method of making an integrated circuit including singulating a semiconductor wafer
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JP5583320B2 (ja) * 2007-12-05 2014-09-03 ピーエスフォー ルクスコ エスエイアールエル 半導体ウエハ及びその製造方法
US8013425B2 (en) * 2008-05-13 2011-09-06 United Microelectronics Corp. Scribe line structure for wafer dicing and method of making the same
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US8022509B2 (en) * 2008-11-28 2011-09-20 United Microelectronics Corp. Crack stopping structure and method for fabricating the same
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US8237246B2 (en) * 2009-02-12 2012-08-07 International Business Machines Corporation Deep trench crackstops under contacts
US8748295B2 (en) 2009-06-15 2014-06-10 Infineon Technologies Ag Pads with different width in a scribe line region and method for manufacturing these pads
JP5175803B2 (ja) * 2009-07-01 2013-04-03 新光電気工業株式会社 半導体装置の製造方法
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US10553508B2 (en) 2014-01-13 2020-02-04 Nxp Usa, Inc. Semiconductor manufacturing using disposable test circuitry within scribe lanes
CN105025480B (zh) * 2014-04-29 2019-04-05 中国电信股份有限公司 用户卡数字签名验证的方法与系统
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Also Published As

Publication number Publication date
CN1777978A (zh) 2006-05-24
KR101001530B1 (ko) 2010-12-16
WO2004073014A2 (en) 2004-08-26
JP2006516824A (ja) 2006-07-06
CN1777978B (zh) 2010-07-21
US20040147097A1 (en) 2004-07-29
TW200416857A (en) 2004-09-01
US6951801B2 (en) 2005-10-04
WO2004073014A3 (en) 2005-04-21
KR20050095630A (ko) 2005-09-29

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees