TW530308B - Semiconductor memory - Google Patents

Semiconductor memory Download PDF

Info

Publication number
TW530308B
TW530308B TW090123171A TW90123171A TW530308B TW 530308 B TW530308 B TW 530308B TW 090123171 A TW090123171 A TW 090123171A TW 90123171 A TW90123171 A TW 90123171A TW 530308 B TW530308 B TW 530308B
Authority
TW
Taiwan
Prior art keywords
bit line
transistor
level
type mos
aforementioned
Prior art date
Application number
TW090123171A
Other languages
English (en)
Chinese (zh)
Inventor
Mitsuaki Hayashi
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Application granted granted Critical
Publication of TW530308B publication Critical patent/TW530308B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices

Landscapes

  • Read Only Memory (AREA)
TW090123171A 2000-09-26 2001-09-20 Semiconductor memory TW530308B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000292177A JP2002100196A (ja) 2000-09-26 2000-09-26 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW530308B true TW530308B (en) 2003-05-01

Family

ID=18775149

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090123171A TW530308B (en) 2000-09-26 2001-09-20 Semiconductor memory

Country Status (3)

Country Link
US (1) US6600672B2 (ja)
JP (1) JP2002100196A (ja)
TW (1) TW530308B (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3904970B2 (ja) * 2002-04-26 2007-04-11 松下電器産業株式会社 半導体記憶装置
WO2006035502A1 (ja) * 2004-09-29 2006-04-06 Spansion Llc 半導体装置及びデータ読み出し方法
ITMI20041957A1 (it) * 2004-10-15 2005-01-15 St Microelectronics Srl Dispositivo di memoria
DE602004009078T2 (de) * 2004-10-15 2008-06-19 Stmicroelectronics S.R.L., Agrate Brianza Speicherordnung
FR2881565B1 (fr) * 2005-02-03 2007-08-24 Atmel Corp Circuits de selection de ligne binaire pour memoires non volatiles
JP2006302329A (ja) * 2005-04-15 2006-11-02 Sanyo Electric Co Ltd 半導体記憶装置
TWI266318B (en) * 2005-08-30 2006-11-11 Via Tech Inc High performance memory and related method
US7742351B2 (en) * 2006-06-30 2010-06-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and electronic device
KR101529291B1 (ko) * 2008-02-27 2015-06-17 삼성전자주식회사 플래시 메모리 장치 및 그것을 포함한 플래시 메모리시스템
JP5287197B2 (ja) * 2008-12-09 2013-09-11 ソニー株式会社 半導体装置
JP5291593B2 (ja) * 2009-10-21 2013-09-18 ラピスセミコンダクタ株式会社 半導体記憶装置
JP5802202B2 (ja) 2010-06-09 2015-10-28 パナソニック株式会社 リファレンスセルのための主ビット線のシールド方法
JP5614150B2 (ja) * 2010-07-29 2014-10-29 ソニー株式会社 抵抗変化型メモリデバイス
CN110556148B (zh) * 2019-09-09 2021-06-04 长江存储科技有限责任公司 一种3d nand存储器的读取方法及装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4725986A (en) 1983-09-20 1988-02-16 International Business Machines Corporation FET read only memory cell with word line augmented precharging of the bit lines
JPS61289598A (ja) * 1985-06-17 1986-12-19 Toshiba Corp 読出専用半導体記憶装置
JP3208624B2 (ja) * 1993-11-25 2001-09-17 ソニー株式会社 半導体記憶装置
KR0152168B1 (ko) * 1994-04-15 1998-10-01 모리시다 요이치 반도체 기억장치
JPH08221996A (ja) 1995-02-17 1996-08-30 Nec Corp 半導体記憶装置
KR100240418B1 (ko) 1996-12-31 2000-03-02 윤종용 반도체 독출 전용 메모리 및 그의 독출 방법
US5870326A (en) * 1997-08-12 1999-02-09 Intel Corporation Information encoding by multiple line selection
US6147893A (en) * 1999-01-27 2000-11-14 Vlsi Technology, Inc. Programmable read only memory with high speed differential sensing at low operating voltage
FR2794277B1 (fr) * 1999-05-25 2001-08-10 St Microelectronics Sa Memoire morte a faible consommation
JP3709302B2 (ja) * 1999-05-31 2005-10-26 株式会社日立製作所 半導体記憶装置及びそれを用いたセンサ

Also Published As

Publication number Publication date
JP2002100196A (ja) 2002-04-05
US20020036914A1 (en) 2002-03-28
US6600672B2 (en) 2003-07-29

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GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees