TW440970B - Chemical vapor deposition of silicate high dielectric constant materials - Google Patents

Chemical vapor deposition of silicate high dielectric constant materials Download PDF

Info

Publication number
TW440970B
TW440970B TW088123360A TW88123360A TW440970B TW 440970 B TW440970 B TW 440970B TW 088123360 A TW088123360 A TW 088123360A TW 88123360 A TW88123360 A TW 88123360A TW 440970 B TW440970 B TW 440970B
Authority
TW
Taiwan
Prior art keywords
gas
patent application
scope
dielectric constant
source
Prior art date
Application number
TW088123360A
Other languages
English (en)
Inventor
Glen D Wilk
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of TW440970B publication Critical patent/TW440970B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/42—Silicides
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/56—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02148—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02159—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing zirconium, e.g. ZrSiOx
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02192—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158—Making the insulator
    • H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31691—Inorganic layers composed of oxides or glassy oxides or oxide based glass with perovskite structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51—Insulating materials associated therewith
    • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

青案交互參者 =下共同出讓之專利/專利申請案併入本文泉 號 由 j q is „ ' 土凊曰期 Ϊ1ΜΜ. **/**/1997 ΤΙ-24953 ΤΙ-27181 ΤΙ-27181 ΤΙ-22027 ΤΙ-24776 ΤΙ-27953
說 本發明與半導體元件的製造及處理有關，更明確地 與使用矽酸鹽製造較高介電常數材料的方法有關。 半導體元件製造的趨勢是元件的體積愈來愈小，相 5面積上製造的元件數量愈來愈多。這㈣結構盘電容 =而言是個問題’因為電容正比於位於電容器兩電極板 j之材料的介電常數，以及介電材料的有效面積。此外， 2結構的電容反比於該兩電極間的距離。目前，間介 :貝的材料是選用二氧切，為補償電容器面積縮小， 此層的厚度也變薄。不過’氧化物層變薄又發生其它問 原口包括.第一，當二氧化矽層的厚度薄到3奈米 以下時，從氧化物外， 為增加閘電極的導電性要將雜質植入乳皇^，而氧 440970 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（2 ) ，層必須能有效地阻擋雜質進人通道區。第二，声若太 :的們是在一個自限的道次中成形，否則‘有製 :旦:。第三’後續道次中蝕刻其它結構時對薄層 的如a，特別是對閘隔離物的影響，遠大於厚犀， 因為對’被⑽的百分比遠大於厚層。a 解決此問題的其它方法是改用介電常數較高的材 ^例如，咖、阳、叫、化2〇5等，都是下一代閉 ;|電質所考慮的材料。不過，這些材料每一種都有問題， 因為將這些材料變成有效閘介電材料所需的製程，與標 準電晶體結構的製程相牴觸。更明確地說，這些材料每 一種通常都需要在含氧環境令高溫退火，此種退火，會 使下方的基底以及其它任何暴露在外會被氧化的結構大 幅退化。 因此’需要使用一種新材料，它能报容县地伸，枰 準之閘結構製程技術處理，且它的介電常數要高於二氧 化矽（ε«β.9)。 發明概述 基本上，本發明與閘結構有關，它包括做為閘介電 質的氧化物層或矽酸鹽層’以及使用化學氣相沈積 (CVD)製造此結構的方法。更明確地說，本發明的間絕 緣體最好是由26丨〇;;或財8丨〇?<(0<)<；<4)，或甚至是由&〇2 或Hf〇2構成。此層的介電常數以大約10到40為佳（大約1 5 到30更佳）。在另一實施例中，本發明的介電層可做為 電容器的介電質。 -4- 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ------------}裝--- (請先閱讀背面之注意事項再填寫本頁) 訂-------.竣J.. 44097ο
五、發明說明（ 種在半導體基底上製造電子元件的方， 的步驟包括：在半導體基底上成形導電結' * =方法 結構與半導體基底間成形一層高介電常▲的材料導電 材料層是由所供應的氣體發源以及第二種：：
La Y l_Sc_2_Ce^其混合物。在另一眘^^ 供應氧氣源。本發明的方法也包括以下步驟：將也 件置入6GG到_°C的環境中。退火步驟的環境最好^ 二^^、^呵及其任何混合物所構成^ 體石夕源最好是切f烧、m、二氯發甲貌及其任 何混合物所構成，也可以包括載氣（最好包括：He、乂、 乂及Ne)。第一種氣體材料最好是由：zr(〇c4H9)4、 Hf(〇C4H9)4 . Zr(N03)4 ^ Hf(N03)4 > ZrCl4 ^ HfCl4 ^Zrl] > Hf I4、ZrBx·4、HfBi·4、柯⑽咖触叫、Hf2(〇pri)6(tmh卟 及其任何混合物所構成。電子元件是電容器或電晶體。 本發明的另一個實施例是一種在半導體基底上製造 n介電常數材料的方法，該方法的步驟包括：在反應室 =提供氣體矽源；在反應室中提供第二種氣體源，構成 第二種氣體源的材料選用自：Hf、Zr、La、Y、Sc、Ce 及其任何混合物。本發明之方法進一步的步騍包括：將 局介電常數材料置入6〇〇到90CTC的環境中。其退火環境 最好是由〇2、〇3、N2、H2、NH3及其任何混合物所構成。 氣體矽源最好是由矽甲烷、二矽甲烷、二氯矽甲烷及其 任何混合物構成，也可以包括載氣（最好包括：He、n2、 Ar 以及 Ne)。材料最好是由 Zr(OC4H9)4、Hf(OC4H9)4、 本紙張尺度適ft T _家標準（CNSU4規長⑵〇 x 297公楚） f請先閱讀背面之注意事項再填寫本頁} 裝--------訂---.---^--- 經濟部智慧財產局員工消費合作社印製 4 五、發明說明（4)
Zr(N〇3)4、Hf(N03)4、ZrCl4、HfCl4、Zrl4、抓4、ZrBr4、
HfBr4、Zr2(〇Pri)6(tmhd)2、Hf2(〇Pri)6(tmhd)2及其任何 混合物構成。第二種氣體源可以包括氧氣源。 圖式簡單說.明 圖1是說明本發明實施例之方法的流程圖。 圖2a-2c是部分製造之元件的橫剖面圖，使用圖1所 示之本發明的方法。 圖式詳細說明 雖然以下對本發明的描述是圍繞於圖1所示的方法 及圖2a-2d所示的元件結構，但本發明可用於金屬閘或 任何其匕類型的閘結構，且它可以使用可配置閘 (disposable gate，如併入本文參考之文件的說明）或使 用所示之標準方法製造。本發明的介電層也可做為可配 置閘結構處理流程中的閘介電質，如共同待審之美國專 利申s青案― -(讓予Τϊ ’ TI-24776P)中的說明，該文 併入本文參考。此外，本發明的方法及所形成的介電層， 也可做為電容器之兩電極間的介電質。 在執行本發明的方法前，先執行習知的處理。習知 的處理包括清潔晶圓202的表面，成形隔離區2〇4、以及 部分的晶圓摻雜。如圖2a-c所示，隔離結構204是淺溝 隔離結構（SΉ),不過，任何類型的隔離結構都可使用。 隔離結構例如包括：LOCES、STI、以及接面隔離結構。 在最標準的方法中’在成形隔離結構及在植入基底 -6 - 本紙張尺度適用中國國家標準（CNS)A4規格⑵0 x 29?公愛） (請先閱讀背面之注意事項再填寫本頁) /裝--------訂---.---T--- 經濟部智慧財產局員工消費合作社印製 440970 A7 ------ B7 五、發明說明（5) 雜質前，在晶圓上會生長一層薄氧化物。如果有薄氧化 物層’、在步驟1〇2前最好先將其去除。最好是以氧化物 腐蝕或去玻璃質（degiaze)步驟將薄氧化物層去除。此道 次最好包括將晶圓浸入氫氟酸溶液中，以便去除保護的 氧化物’同時不實質影響隔離結構204。 現請參閱圖1之步驟102及圖2a，在基底2〇2上覆蓋 成形一層206。在步驟1〇2，層2〇6不要成形於隔離結構 上（如圖2a所示），最好是以冪罩操作’它可以選擇性地 排除隔離結構204,或可以將它成形於隔離結構2〇4上（未 顯示），並將其留在該處。層2〇6最好是由過渡金屬（諸 如Hf、Zr、La、Y、Sc及/或Ce)、矽（如果層2〇8是矽酸 鹽）以及潛在的氧及/或氮構成。層2〇6最好是*Hfsi〇x、 ZrSiOx、LaSi〇x、YSi〇x、ScSi〇x、CeSi〇x、Hf、Hfs^、
Zr、Zr Sl2、La、LaSix、Y、YSix、Sc、ScSix、Ce或 CeSix， 構成，且其厚度以4到10奈米為佳（大約4到6奈米更佳）。 按本發明的方法，層206是以化學氣相沈積法成形。本 發明有數種實施例可以用來成形本發明的矽酸鹽層。 在以下的每一個實施例中，以符別从代表Hf或&或 其它與Hf及Zr具有相同特性的金屬（諸如上述的La、γ、 Sc或Ce)。每一個實施例所使用的前質與載氣混合（包括 氦、氮、氬、氖及其任何混合物），或不混合載氣。本 發明之實施例的前質最好包括金屬源I、矽源（最好是 矽甲烷、二矽甲烷及/或二氣矽甲烷），以及氧及/或氮源。 氧源可以是〇2、〇3或其它氧源，如電漿源。如果在前 資中k有知_供乳及/或氛源’可以執行退火步驟1 ，以 -7- (請先閱讀背面之注意事項再填寫本頁) 裝---- 訂—.— 經濟部智慧財產局員工消費合作社印製
440 9 7 Ο Α7 - Β7 ，丨丨 '' I -- 五、發明說明（6) 便將氧及/或氮結合到層206内。 在本發明的一實施例中，氣態的μ (no3)4混合物連 同氣態的矽甲烷或二矽曱烧或二氯矽甲烷（連同載氣— 最好大約是此氣體混合物的10%)一起送入反應室内。M (NO3)4的流率大約5到20sccm為佳（大約1 Osccm更佳）， 石夕甲烧（連同載氣）的流率大約1到2〇sccm為佳（大約1到 1〇SCcm更佳）。反應室的環境溫度大約60到120°C為佳（大 約70°C更佳）’基底溫度大約2〇〇到6〇0乞為佳（大約3〇〇 到500°C更佳）。本發明之前質的優點是無碳，且較不會 形成過量的水。 在本發明的另一實施例中，金屬t_but〇xide的混合 物’ Μ (OC4H9)4，以氣態型式（最好連同載氣）連同氣態 的石夕曱燒（最好連同載氣—最好大約10%的載氣及90% 的石夕曱烧）一起送入反應室内。M(〇C4H9)4的流率大約5 到15sccm為佳（大約i〇sccm更佳），石夕曱院（連同载氣）的 流率大約1到2〇sccm為佳（大約1到i〇sccm更佳）。也可以 使用一石夕甲烧或二氯石夕甲貌取代石夕甲烧。反應室的環境 溫度大約60到120。(：為佳（大約70°C更佳），基底溫度大 約400到700°C為佳（大約450到600°C更佳）。 在本發明的另一實施例中’氣體金屬源包括从€14、 MI#、MBr4。氣體矽源可以包括矽甲烷、二矽甲燒或二氯 石夕曱跋，還可包括載氣’諸如He、Ar、Ns、Ne。此外，也 可包括氧源（如〇2、〇3)，或是後續在氧或臭氧環境中執行 退火（如選擇性退火步驟104)。在此過程期間的基底溫度最 好大約200到600°C (大約300到500°C更佳）。由於氣及漠 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝 i I ---· I —.1 I I ΊΙ — . 經濟部智慧財產局員工消費合作社印製 4 4 0 9 7 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（7) 極具活性，且由於氯具腐蝕性，如果使用這些氣體，就 應該使用非不銹鋼的反應器（以石英反應器為佳）。 在本發明的另一實施例中，氣體金屬源包括岣 (OPdMtmhd)2，矽源最好包括矽曱烷、二矽甲烷或二氯 石夕甲院。在此過程期間的基底溫度大約〇到7〇〇。匸為佳（大 約450到60(TC更佳）。可以使用氧源或是在氧或臭氧環境 中退火（如步驟104)。 現請參閱圖1的步驟104及圖2b，接下來執行退火， 以便增進包含石夕與過渡金屬混合物之層的電氣特 性，或增進已存在之矽酸鹽層的品質。例如，如果層2〇6 疋由Hf、HfSi2、Zr、或ZrSiz構成，它們將分別變成Hfc^、 HfSi2〇x、ZrOx、或 ZrSi2Ox ’或如果該層已是 HfSiA， 在成形氣體（以使用90%氮：1 〇%氫為佳）中退火將可消 除矽酸鹽膜中的瑕疵。另者，在含氧環境中退火，將可 藉增加X值以增加矽酸鹽的含氧量。執行退火步驟1〇4的 環境可以是·在90%氮：10°/❶氫的環境中，以大約350 到500 C的溫度（大約450°C更佳）退火大約1〇到3〇分鐘（3〇 分鐘更佳）；在氧的環境中’以大約4〇〇到9〇〇°c的溫度（大 約800°C更佳）退火大約15到60秒（大約30秒較佳）；在臭 氧環境中大約25到400°C的溫度；或在氮或NH3的環境 中大約500到600 °C。也可以使用其它溫度及環境的組 合’但上述條件似乎可獲得最佳的結果。在退火步驟 104 ’敢好將層206加到此南溫，在含氣及/或含氮的大 氣中10到120秒（大約20到45秒較佳一大約30秒更佳）。 現請參閱圖1的步驟106及圖2c，在此步驟成形導電 _ 9 - 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂il.---1---嗅'.
五、發明説明（8) 的閘電極層210。層210最好是由複晶矽、複晶鍺化石夕、 摻雜的複晶矽、摻雜的複晶鍺化矽、鎢、鈦、氮化鶴、 氮化鈦、鉑、鋁或它們的混合物，或由上述一或多種所 構成的堆疊。層210最好是使用標準的半導體處理步驟 成形，其厚度也是一般電晶體所使用的厚度。 雖然本文是以特定的實施例描述本發明，但不能將 其解釋成對本發明之範圍的限制。熟悉此方面技術之人 士將可從說明書的方法中明暸很多本發明的實施例。本 發明的範圍僅受所附申請專利範圍的限制。 ----------1/ *> ----—訂------j---吟 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格<210 X 297公釐）

Claims (1)

  1. 440970 A8 Βδ C8 D8 申請專利範圍 經濟部智慧財產局員工消費合作社印製 1. 一種在半導體基底上製造電子元件的方法，該方法 的步驟包括： 在忒半導體基底上成形導電結構；以及 在該導電結構與該半導體基底間成形—層高介電常 數材料’該高介電常數材料層成形自所供應的氣體 矽源及第二氣體材料’構成第二氣體材料的材料選 用自Hf、Zr、La、Y、sc、Ce及其任何混合物。 2.如申凊專利範圍第1項的方法，其中成形該高介電常 數材料層時也供應氧氣源。 3 如申睛專利範圍第1項的方法，進一步的步驟包括： 將忒電子元件置入6〇〇至間的環境中。 4·如申請專利範圍第3項的方法，其中構成該環境的氣 體是選用自〇2、、n2、H2、NH3及其任何混合物 〇 5.如申凊專利範圍第丨項的方法，其中構成該氣體矽源 的氣體是選用自矽曱烷、二矽甲烷、二氯矽曱烷及 其任何混合物 6·如申請專利範圍第5項的方法 载氣。 7.如申請專利範園第6項的方法 體是選用自He、N2、Ar及;Ne S.如申請專利範圍第1項的方法 材料的氣體包括ΖΓ((Χ：4ϋ9：)4， 、Hf(N03)4、ZrCl4、HfCl4、Zrl4、Hfl4、ZrBr4、HfBr4 ZKOPrOjtmhd)2、Hf2(〇pri)6(tmhd)2及其任何混 其中該氣體矽源包括 其中構成該载氣的氣 其中構成該第二氣 Hf(OC4H9)4 > Zr(NQ3) 體
    1 裝------訂---^---^--..Λ {請先閱讀背面之注#^項再填寫本頁) 4 4〇 9
    中請專利 合物。 I =圍第1項的方法’其中該電子元件是電 谷盗或電晶體。 10·::在半導體基底上製造高介電常數材料的方法，該 方法的步驟包括： 在反應室中提供氣體矽源； ^反應室中提供第二氣體源，構成該第二氣體源的 材料選用自财^七小^⑽其任何混合物 0 L如申凊專利範圍第1〇項的方法，進一步的步驟包括： 將該高介電常數材料置入600至9〇〇。匚間的環境中。 12.如申請專利範圍第n項的方法’其中構成該環境的氣 體是選用自02、〇3、乂、112、]^113及其任何混合物。 13·如申凊專利範圍第10項的方法，其中構成該氣體矽源 的氣體是選用自矽曱烷、二矽曱烷、二氯矽甲烷及其 任何混合物。 (4.如申請專利範圍第13項的方法，其中該氣體矽源包括 载氣。 15.如申請專利範圍第14項的方法，其中構成該載氣的氣 體是選用自He、N2、Ar及Ne。 16_如申請專利範圍第丨〇項的方法，其中構成該材料的氣 體包括Zr(OC4H9)4、Hf(OC4H9)4、Zr(N03)4、Hf(N03)4 、ZrCl4、HfCl4、Zrl4、Hfl4、ZrBr4、HfBr4、 12 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝- ------訂---------線 經濟部智慧財產局員工消費合作杜印製 r 4 40 9 70 as B8 C8 D8 六、申請專利範圍 Zr2(OPri)6(tmhd)2、Hf2(OPri)6(tmhd)2 及其任何混合 物0 17.如申請專利範圍第1項的方法，其中該第二氣體源包 括氧氣。 一 (請先聞讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家操準（CNS ) A4規格（210X297公釐）
TW088123360A 1999-01-13 2000-03-30 Chemical vapor deposition of silicate high dielectric constant materials TW440970B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11585899P 1999-01-13 1999-01-13
US11961599P 1999-02-11 1999-02-11

Publications (1)

Publication Number Publication Date
TW440970B true TW440970B (en) 2001-06-16

Family

ID=26813649

Family Applications (1)

Application Number Title Priority Date Filing Date
TW088123360A TW440970B (en) 1999-01-13 2000-03-30 Chemical vapor deposition of silicate high dielectric constant materials

Country Status (5)

Country Link
US (2) US6544875B1 (zh)
EP (1) EP1028458A3 (zh)
JP (1) JP2000208508A (zh)
KR (1) KR20000052627A (zh)
TW (1) TW440970B (zh)

Families Citing this family (51)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000208508A (ja) * 1999-01-13 2000-07-28 Texas Instr Inc <Ti> 珪酸塩高誘電率材料の真空蒸着
US7554829B2 (en) 1999-07-30 2009-06-30 Micron Technology, Inc. Transmission lines for CMOS integrated circuits
US6399208B1 (en) * 1999-10-07 2002-06-04 Advanced Technology Materials Inc. Source reagent composition and method for chemical vapor deposition formation or ZR/HF silicate gate dielectric thin films
JP3786566B2 (ja) * 2000-06-27 2006-06-14 株式会社東芝 半導体装置及びその製造方法
KR100639147B1 (ko) * 2001-01-25 2006-10-31 동경 엘렉트론 주식회사 플라즈마 처리 방법
US6852167B2 (en) * 2001-03-01 2005-02-08 Micron Technology, Inc. Methods, systems, and apparatus for uniform chemical-vapor depositions
US6541280B2 (en) * 2001-03-20 2003-04-01 Motorola, Inc. High K dielectric film
EP1300887B1 (en) 2001-04-02 2007-05-23 Matsushita Electric Industrial Co., Ltd. Method of manufacturing a semiconductor device
US7037862B2 (en) * 2001-06-13 2006-05-02 Micron Technology, Inc. Dielectric layer forming method and devices formed therewith
US6642131B2 (en) 2001-06-21 2003-11-04 Matsushita Electric Industrial Co., Ltd. Method of forming a silicon-containing metal-oxide gate dielectric by depositing a high dielectric constant film on a silicon substrate and diffusing silicon from the substrate into the high dielectric constant film
CN100492662C (zh) * 2001-06-21 2009-05-27 松下电器产业株式会社 半导体装置及其制造方法
JP3773448B2 (ja) * 2001-06-21 2006-05-10 松下電器産業株式会社 半導体装置
JP2003017687A (ja) * 2001-06-29 2003-01-17 Hitachi Ltd 半導体装置
JP3995082B2 (ja) * 2001-07-18 2007-10-24 日鉱金属株式会社 ゲート酸化膜形成用ハフニウムシリサイドターゲット及びその製造方法
US8026161B2 (en) 2001-08-30 2011-09-27 Micron Technology, Inc. Highly reliable amorphous high-K gate oxide ZrO2
JP4034627B2 (ja) * 2001-09-28 2008-01-16 テキサス インスツルメンツ インコーポレイテツド 集積回路及びその製造方法
JP2003124460A (ja) * 2001-10-15 2003-04-25 Atsushi Ogura ゲート酸化膜、素子、ゲート酸化膜形成方法、ゲート酸化膜形成材料
US20030111678A1 (en) * 2001-12-14 2003-06-19 Luigi Colombo CVD deposition of M-SION gate dielectrics
US6900122B2 (en) * 2001-12-20 2005-05-31 Micron Technology, Inc. Low-temperature grown high-quality ultra-thin praseodymium gate dielectrics
US6767795B2 (en) * 2002-01-17 2004-07-27 Micron Technology, Inc. Highly reliable amorphous high-k gate dielectric ZrOXNY
US7160577B2 (en) 2002-05-02 2007-01-09 Micron Technology, Inc. Methods for atomic-layer deposition of aluminum oxides in integrated circuits
US6818500B2 (en) * 2002-05-03 2004-11-16 Micron Technology, Inc. Method of making a memory cell capacitor with Ta2O5 dielectric
US7927950B2 (en) * 2002-05-07 2011-04-19 Samsung Electronics Co., Ltd. Method of fabricating trap type nonvolatile memory device
KR100655441B1 (ko) * 2005-09-01 2006-12-08 삼성전자주식회사 트랩형 비휘발성 메모리 장치의 제조 방법
US7205218B2 (en) 2002-06-05 2007-04-17 Micron Technology, Inc. Method including forming gate dielectrics having multiple lanthanide oxide layers
US7221586B2 (en) 2002-07-08 2007-05-22 Micron Technology, Inc. Memory utilizing oxide nanolaminates
US6921702B2 (en) * 2002-07-30 2005-07-26 Micron Technology Inc. Atomic layer deposited nanolaminates of HfO2/ZrO2 films as gate dielectrics
US6884739B2 (en) 2002-08-15 2005-04-26 Micron Technology Inc. Lanthanide doped TiOx dielectric films by plasma oxidation
US7199023B2 (en) 2002-08-28 2007-04-03 Micron Technology, Inc. Atomic layer deposited HfSiON dielectric films wherein each precursor is independendently pulsed
US6958302B2 (en) * 2002-12-04 2005-10-25 Micron Technology, Inc. Atomic layer deposited Zr-Sn-Ti-O films using TiI4
US7101813B2 (en) * 2002-12-04 2006-09-05 Micron Technology Inc. Atomic layer deposited Zr-Sn-Ti-O films
US7192892B2 (en) * 2003-03-04 2007-03-20 Micron Technology, Inc. Atomic layer deposited dielectric layers
US7135369B2 (en) 2003-03-31 2006-11-14 Micron Technology, Inc. Atomic layer deposited ZrAlxOy dielectric layers including Zr4AlO9
JP3974547B2 (ja) * 2003-03-31 2007-09-12 株式会社東芝 半導体装置および半導体装置の製造方法
JP2004311782A (ja) * 2003-04-08 2004-11-04 Tokyo Electron Ltd 成膜方法及び成膜装置
US7183186B2 (en) * 2003-04-22 2007-02-27 Micro Technology, Inc. Atomic layer deposited ZrTiO4 films
US7049192B2 (en) * 2003-06-24 2006-05-23 Micron Technology, Inc. Lanthanide oxide / hafnium oxide dielectrics
US7220665B2 (en) * 2003-08-05 2007-05-22 Micron Technology, Inc. H2 plasma treatment
JP4216707B2 (ja) * 2003-12-25 2009-01-28 株式会社東芝 半導体装置の製造方法
US20050233477A1 (en) * 2004-03-05 2005-10-20 Tokyo Electron Limited Substrate processing apparatus, substrate processing method, and program for implementing the method
US7098150B2 (en) 2004-03-05 2006-08-29 Air Liquide America L.P. Method for novel deposition of high-k MSiON dielectric films
US7601649B2 (en) * 2004-08-02 2009-10-13 Micron Technology, Inc. Zirconium-doped tantalum oxide films
US7588988B2 (en) 2004-08-31 2009-09-15 Micron Technology, Inc. Method of forming apparatus having oxide films formed using atomic layer deposition
US7687409B2 (en) 2005-03-29 2010-03-30 Micron Technology, Inc. Atomic layer deposited titanium silicon oxide films
US7662729B2 (en) 2005-04-28 2010-02-16 Micron Technology, Inc. Atomic layer deposition of a ruthenium layer to a lanthanide oxide dielectric layer
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US7550346B2 (en) * 2005-08-03 2009-06-23 Dongbu Electronics Co., Ltd. Method for forming a gate dielectric of a semiconductor device
US8110469B2 (en) 2005-08-30 2012-02-07 Micron Technology, Inc. Graded dielectric layers
US7709402B2 (en) 2006-02-16 2010-05-04 Micron Technology, Inc. Conductive layers for hafnium silicon oxynitride films
US7563730B2 (en) 2006-08-31 2009-07-21 Micron Technology, Inc. Hafnium lanthanide oxynitride films
JP5462885B2 (ja) * 2009-12-18 2014-04-02 株式会社日立国際電気 半導体装置の製造方法および基板処理装置

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4147615A (en) 1977-04-12 1979-04-03 Leas Arnold M Hot sand-coal-cracking to hydrodistillate fuels
JPS5861763A (ja) 1981-10-09 1983-04-12 武笠　均 触感知器消化装置
US4432035A (en) 1982-06-11 1984-02-14 International Business Machines Corp. Method of making high dielectric constant insulators and capacitors using same
US4464701A (en) * 1983-08-29 1984-08-07 International Business Machines Corporation Process for making high dielectric constant nitride based materials and devices using the same
US5874766A (en) 1988-12-20 1999-02-23 Matsushita Electric Industrial Co., Ltd. Semiconductor device having an oxynitride film
US5068124A (en) * 1989-11-17 1991-11-26 International Business Machines Corporation Method for depositing high quality silicon dioxide by pecvd
US5820664A (en) * 1990-07-06 1998-10-13 Advanced Technology Materials, Inc. Precursor compositions for chemical vapor deposition, and ligand exchange resistant metal-organic precursor solutions comprising same
US5384729A (en) 1991-10-28 1995-01-24 Rohm Co., Ltd. Semiconductor storage device having ferroelectric film
JPH05239650A (ja) * 1992-02-27 1993-09-17 Kojundo Chem Lab Co Ltd シリコン酸化膜の製造法
US5677015A (en) 1994-03-17 1997-10-14 Sony Corporation High dielectric constant material containing tantalum, process for forming high dielectric constant film containing tantalum, and semiconductor device using the same
KR0155785B1 (ko) 1994-12-15 1998-10-15 김광호 핀형 커패시터 및 그 제조방법
US5686748A (en) 1995-02-27 1997-11-11 Micron Technology, Inc. Dielectric material and process to create same
KR0141160B1 (ko) 1995-03-22 1998-06-01 김광호 강유전체 메모리 장치 및 그 제조방법
JPH09153567A (ja) 1995-09-28 1997-06-10 Toshiba Corp 高熱伝導性窒化珪素回路基板および半導体装置
US6063677A (en) 1996-10-28 2000-05-16 Texas Instruments Incorporated Method of forming a MOSFET using a disposable gate and raised source and drain
US6127199A (en) 1996-11-12 2000-10-03 Seiko Epson Corporation Manufacturing method of active matrix substrate, active matrix substrate and liquid crystal display device
US6130503A (en) 1997-03-04 2000-10-10 Pioneer Electronic Corporation Electron emission device and display using the same
JPH10308166A (ja) 1997-03-04 1998-11-17 Pioneer Electron Corp 電子放出素子及びこれを用いた表示装置
JPH10312739A (ja) 1997-03-10 1998-11-24 Pioneer Electron Corp 電子放出素子及びこれを用いた表示装置
US5851921A (en) 1997-04-04 1998-12-22 Advanced Micro Devices, Inc. Semiconductor device and method for forming the device using a dual layer, self-aligned silicide to enhance contact performance
JPH10321123A (ja) 1997-05-15 1998-12-04 Pioneer Electron Corp 電子放出素子及びこれを用いた表示装置
JP3724915B2 (ja) 1997-05-15 2005-12-07 パイオニア株式会社 電子放出素子及びこれを用いた表示装置
US6221792B1 (en) 1997-06-24 2001-04-24 Lam Research Corporation Metal and metal silicide nitridization in a high density, low pressure plasma reactor
US6013553A (en) 1997-07-24 2000-01-11 Texas Instruments Incorporated Zirconium and/or hafnium oxynitride gate dielectric
KR19990014155A (ko) * 1997-07-24 1999-02-25 윌리엄 비. 켐플러 고 유전율 실리케이트 게이트 유전체
US6468856B2 (en) 1997-07-24 2002-10-22 Texas Instruments Incorporated High charge storage density integrated circuit capacitor
JPH1167065A (ja) 1997-08-08 1999-03-09 Pioneer Electron Corp 電子放出素子及びこれを用いた表示装置
US5907780A (en) * 1998-06-17 1999-05-25 Advanced Micro Devices, Inc. Incorporating silicon atoms into a metal oxide gate dielectric using gas cluster ion beam implantation
JP2000188400A (ja) * 1998-11-09 2000-07-04 Texas Instr Inc <Ti> 半導体デバイスを形成する方法
JP3368852B2 (ja) 1998-11-27 2003-01-20 株式会社村田製作所 積層パターンの形成方法
JP2000208508A (ja) * 1999-01-13 2000-07-28 Texas Instr Inc <Ti> 珪酸塩高誘電率材料の真空蒸着

Also Published As

Publication number Publication date
EP1028458A3 (en) 2000-12-20
US6821835B2 (en) 2004-11-23
EP1028458A2 (en) 2000-08-16
KR20000052627A (ko) 2000-08-25
US20030215995A1 (en) 2003-11-20
JP2000208508A (ja) 2000-07-28
US6544875B1 (en) 2003-04-08

Similar Documents

Publication Publication Date Title
TW440970B (en) Chemical vapor deposition of silicate high dielectric constant materials
TWI375276B (en) Silicon oxynitride gate dielectric formation using multiple annealing steps
TW436907B (en) Semiconductor device and method for manufacturing the same
US20060292872A1 (en) Atomic layer deposition of thin films on germanium
TWI322487B (en) Method for fabricating capacitor in semiconductor device
US20050161434A1 (en) Method for forming insulation film
CN101924026B (zh) 降低界面层厚度的方法
TW452922B (en) Methods of fabricating an integrated circuit device with composite oxide dielectric
TWI263345B (en) Capacitor with oxidation barrier layer and method for manufacturing the same
US20070077759A1 (en) Method for forming dielectric film and method for manufacturing semiconductor device by using the same
KR100562731B1 (ko) 고유전율 게이트 산화막상의 강유전체 박막의ｍｏｃｖｄ용 시드층 프로세스
JP2007194239A (ja) 半導体装置の製造方法
CN100380609C (zh) 半导体基片的uv增强的氧氮化
TW411615B (en) Semiconductor device and method of manufacturing the same
KR100455287B1 (ko) 반도체 장치의 커패시터, 그 제조방법 및 상기 커패시터를채용하고 있는 전자 소자
JP2004153256A (ja) シリコン基板の複合面に酸化膜を形成する方法
CN103515194B (zh) 制造半导体器件的方法
TW463251B (en) Manufacturing method of gate structure
TW419745B (en) Method of forming an insulation film in a semiconductor device
JP2009239246A (ja) 絶縁膜の形成方法及び絶縁膜
JP5039396B2 (ja) 半導体装置の製造方法
JP2006054382A (ja) 金属シリケート膜と金属シリケート膜の製造方法および半導体装置と半導体装置の製造方法
TW457592B (en) An anneal for enhancing the electrical characteristic of semiconductor devices
KR100671605B1 (ko) 반도체 소자의 캐패시터 제조 방법
JP4283140B2 (ja) 薄膜形成方法

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MK4A Expiration of patent term of an invention patent