TW440950B - Porous region removing method and semiconductor substrate manufacturing method - Google Patents

Porous region removing method and semiconductor substrate manufacturing method Download PDF

Info

Publication number
TW440950B
TW440950B TW087120966A TW87120966A TW440950B TW 440950 B TW440950 B TW 440950B TW 087120966 A TW087120966 A TW 087120966A TW 87120966 A TW87120966 A TW 87120966A TW 440950 B TW440950 B TW 440950B
Authority
TW
Taiwan
Prior art keywords
substrate
porous
patent application
etchant
scope
Prior art date
Application number
TW087120966A
Other languages
English (en)
Chinese (zh)
Inventor
Kiyofumi Sakaguchi
Kazutaka Yanagita
Original Assignee
Canon Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Kk filed Critical Canon Kk
Application granted granted Critical
Publication of TW440950B publication Critical patent/TW440950B/zh

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/60Wet etching
    • H10P50/64Wet etching of semiconductor materials
    • H10P50/642Chemical etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1924Preparing SOI wafers with separation/delamination along a porous layer
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Weting (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)
  • Drying Of Semiconductors (AREA)
TW087120966A 1998-01-09 1998-12-16 Porous region removing method and semiconductor substrate manufacturing method TW440950B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP00339798A JP3847935B2 (ja) 1998-01-09 1998-01-09 多孔質領域の除去方法及び半導体基体の製造方法

Publications (1)

Publication Number Publication Date
TW440950B true TW440950B (en) 2001-06-16

Family

ID=11556241

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087120966A TW440950B (en) 1998-01-09 1998-12-16 Porous region removing method and semiconductor substrate manufacturing method

Country Status (9)

Country Link
US (1) US6127281A (https=)
EP (1) EP0938132B1 (https=)
JP (1) JP3847935B2 (https=)
KR (1) KR100354918B1 (https=)
AT (1) ATE293284T1 (https=)
AU (1) AU745396B2 (https=)
DE (1) DE69829738T2 (https=)
SG (1) SG75147A1 (https=)
TW (1) TW440950B (https=)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7148119B1 (en) * 1994-03-10 2006-12-12 Canon Kabushiki Kaisha Process for production of semiconductor substrate
US6391067B2 (en) 1997-02-04 2002-05-21 Canon Kabushiki Kaisha Wafer processing apparatus and method, wafer convey robot, semiconductor substrate fabrication method, and semiconductor fabrication apparatus
JPH10223585A (ja) * 1997-02-04 1998-08-21 Canon Inc ウェハ処理装置及びその方法並びにsoiウェハの製造方法
US6767840B1 (en) * 1997-02-21 2004-07-27 Canon Kabushiki Kaisha Wafer processing apparatus, wafer processing method, and semiconductor substrate fabrication method
JP3218564B2 (ja) 1998-01-14 2001-10-15 キヤノン株式会社 多孔質領域の除去方法及び半導体基体の製造方法
AU5210300A (en) * 1999-04-27 2000-11-10 Gebruder Decker Gmbh & Co. Kg Device for treating silicon wafers
JP3810968B2 (ja) * 1999-12-03 2006-08-16 東京エレクトロン株式会社 液処理装置および液処理方法
JP2004228150A (ja) * 2003-01-20 2004-08-12 Canon Inc エッチング方法
US7040330B2 (en) * 2003-02-20 2006-05-09 Lam Research Corporation Method and apparatus for megasonic cleaning of patterned substrates
TWI227932B (en) * 2003-06-23 2005-02-11 Promos Technologies Inc Method for forming a bottle-shaped trench
US20050132332A1 (en) * 2003-12-12 2005-06-16 Abhay Sathe Multi-location coordinated test apparatus
US20050181572A1 (en) * 2004-02-13 2005-08-18 Verhoeven Tracy B. Method for acoustically isolating an acoustic resonator from a substrate
JP2005327856A (ja) * 2004-05-13 2005-11-24 Komatsu Electronic Metals Co Ltd 半導体ウェーハのエッチング装置
JP4955264B2 (ja) 2005-03-11 2012-06-20 エルピーダメモリ株式会社 多孔質単結晶層を備えた半導体チップおよびその製造方法
US8327861B2 (en) * 2006-12-19 2012-12-11 Lam Research Corporation Megasonic precision cleaning of semiconductor process equipment components and parts
DE102008003453A1 (de) * 2008-01-08 2009-07-09 Robert Bosch Gmbh Verfahren zur Herstellung poröser Mikrostrukturen, nach diesem Verfahren hergestellte poröse Mikrostrukturen sowie deren Verwendung
CN102125921B (zh) * 2010-01-20 2012-09-05 常州瑞择微电子科技有限公司 一种光掩模在清洗过程中的传输方法
JP7276036B2 (ja) * 2019-09-19 2023-05-18 大日本印刷株式会社 エッチング装置およびエッチング方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05217824A (ja) * 1992-01-31 1993-08-27 Canon Inc 半導体ウエハ及びその製造方法
JP3352340B2 (ja) * 1995-10-06 2002-12-03 キヤノン株式会社 半導体基体とその製造方法
US5593505A (en) * 1995-04-19 1997-01-14 Memc Electronic Materials, Inc. Method for cleaning semiconductor wafers with sonic energy and passing through a gas-liquid-interface
US6103598A (en) * 1995-07-13 2000-08-15 Canon Kabushiki Kaisha Process for producing semiconductor substrate
JPH09331049A (ja) * 1996-04-08 1997-12-22 Canon Inc 貼り合わせsoi基板の作製方法及びsoi基板

Also Published As

Publication number Publication date
US6127281A (en) 2000-10-03
JP3847935B2 (ja) 2006-11-22
EP0938132A2 (en) 1999-08-25
DE69829738D1 (de) 2005-05-19
DE69829738T2 (de) 2006-02-09
AU745396B2 (en) 2002-03-21
KR100354918B1 (ko) 2002-11-18
SG75147A1 (en) 2000-09-19
KR19990066873A (ko) 1999-08-16
AU9818898A (en) 1999-07-29
ATE293284T1 (de) 2005-04-15
EP0938132A3 (en) 1999-12-22
EP0938132B1 (en) 2005-04-13
JPH11204494A (ja) 1999-07-30

Similar Documents

Publication Publication Date Title
TW440950B (en) Porous region removing method and semiconductor substrate manufacturing method
US6380099B2 (en) Porous region removing method and semiconductor substrate manufacturing method
CA2228571C (en) Wafer processing apparatus, wafer processing method, and soi wafer fabrication method
CA2229975C (en) Wafer processing apparatus, wafer processing method, and semiconductor substrate fabrication method
KR100236689B1 (ko) Soi기판의 제조방법
KR100225699B1 (ko) Soi기판의 제조방법 및 제조장치
TW417202B (en) Method and apparatus for etching a semiconductor article and method of preparing a method a semiconductor article by using the same
US20030008473A1 (en) Anodizing method and apparatus and semiconductor substrate manufacturing method
JPH11195773A (ja) 基板処理方法及び装置及びsoi基板
CA2228552C (en) Wafer processing apparatus and method, wafer convey robot, semiconductor substrate fabrication method, and semiconductor fabrication apparatus
US6767840B1 (en) Wafer processing apparatus, wafer processing method, and semiconductor substrate fabrication method
TWI242796B (en) Substrate and manufacturing method therefor
JP3831878B2 (ja) ウェハ処理装置
JP2000150837A (ja) 半導体基体の作製方法
JP4272796B2 (ja) 基板の処理方法
JP3831877B2 (ja) 半導体基体の製造方法
JP2004247609A (ja) 基板の製造方法
JP2000133558A (ja) 半導体基体の作製方法およびそれにより作製された基体

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MM4A Annulment or lapse of patent due to non-payment of fees