TW437028B - Semiconductor body which is composed of silicon and can be soldered to a metal mount as well as method for such soldering - Google Patents

Semiconductor body which is composed of silicon and can be soldered to a metal mount as well as method for such soldering Download PDF

Info

Publication number
TW437028B
TW437028B TW086101824A TW86101824A TW437028B TW 437028 B TW437028 B TW 437028B TW 086101824 A TW086101824 A TW 086101824A TW 86101824 A TW86101824 A TW 86101824A TW 437028 B TW437028 B TW 437028B
Authority
TW
Taiwan
Prior art keywords
layer
patent application
welding
semiconductor
silicon
Prior art date
Application number
TW086101824A
Other languages
English (en)
Inventor
Holger Hubner
Manfred Schneegans
Original Assignee
Siemens Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Ag filed Critical Siemens Ag
Application granted granted Critical
Publication of TW437028B publication Critical patent/TW437028B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492Bases or plates or solder therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/03Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/111Devices sensitive to infrared, visible or ultraviolet radiation characterised by at least three potential barriers, e.g. photothyristors
    • H01L31/1113Devices sensitive to infrared, visible or ultraviolet radiation characterised by at least three potential barriers, e.g. photothyristors the device being a photothyristor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026Bonding areas specifically adapted for layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001Internal layers
    • H01L2224/05075Plural internal layers
    • H01L2224/0508Plural internal layers being stacked
    • H01L2224/05083Three-layer arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05599Material
    • H01L2224/056Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83191Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01004Beryllium [Be]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01014Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01015Phosphorus [P]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0102Calcium [Ca]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01022Titanium [Ti]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01024Chromium [Cr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01028Nickel [Ni]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0103Zinc [Zn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/157Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12681Ga-, In-, Tl- or Group VA metal-base component
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12687Pb- and Sn-base components: alternative to or next to each other
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12771Transition metal-base component
    • Y10T428/12778Alternative base metals from diverse categories
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/12All metal or with adjacent metals
    • Y10T428/12493Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12771Transition metal-base component
    • Y10T428/12806Refractory [Group IVB, VB, or VIB] metal-base component
    • Y10T428/12812Diverse refractory group metal-base components: alternative to or next to each other

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Electromagnetism (AREA)
  • Die Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

4370 2 8
t^tIJ明示 經濟部智慧財產局員工消費合作社印製 五、發明説明() 發明說明 本發明傜關於由砂所組成之半導體本體,並可經由一 序列之金靥層予以焊接至一金屬固定件上,在焊接前, 它含有自固定件的方向之矽開始,一個鋁廇和一個擴散 障壁層。 將此等半導體本體配合至半導體組件中,特別配合至 功率半導體組件中,此等組件商業上可大量供應。通常 ,金鹛層的順序含有經安裝在矽半導體本體上之一個鋁 層。該鋁層充分黏附至矽上而形成一個令人湛意之電阻 性接觸點,特別具有p-摻雜之矽。根據先前技蕕,該鋁 層具有一個擴散障壁靥安裝在其上,此障壁層通常係由 鈦或鉻所組成並充作黏附促進劑以及在鎳層(其傜經安 裝在擴散障壁層上)與鋁層之間的背面障壁。根據先前 技蕕,將一個貴金屬層直接施加至鎳層上或跟隨它的薄 钛層上並具有改進黏附之功能,此貴金屬靥通常僳由銀 ,金或耙所組成而充作對於鎳層之氣化保護。
在實際焊接操作中,通常將焊接薄Μ (其通常你由錫 和一種焊劑所組成)放置在以此種方式所金屬化之半導 體本體的背面與金屬固定件之間。然後在焊接操作期間 ,將經嵌置在固定件與半導體本體之銀層間之焊料層熔 化,銀曆溶解而下面之鎳層經由焊接材料予以部份溶解 而産生所焊接之接頭Q 然而•此通常所熟知之焊接方法具有嚴重缺點。在一 方面,鎳和矽半導體本體的不同熱膨脹像數造成機械應 本紙張尺度適用中國國家標準(CNS ) A4規格(加乂297公嫠) T . X4IT. -41/ I--------«.-------1T------t.- (請先閱讀背面之注意事項再填寫本頁) _ A7 B7 437U 2 8 五、發明説明() 力而導致駸重晶Η屈曲(屈曲> 1000 W m),持別是在薄 半導體本體(厚度忘250w m)的情況中。 (請先閲讀背面之注意事項再填寫本頁) 此現象使晶圓之”處理”更為困難,發生更多之卡式磁 帶匣定位錯誤且當處理晶圓時,有増加破裂之危險。 此問題目前之處理方式是經由試圖將鎳層厚度減至一 種最小之程度因此使焊接仍顯示充分之黏合強度。然而 ,儘管減少了鎳層厚度(〜1 wra),仍然在製造過程中 繼續發生70 0至2000w η的晶團屈曲導致上述之問題。 因此,本發明的目的在以一種方式將矽半導體本體金 颶化以便將晶圓屈曲顯著減少而對於安裝材料之黏合強 度不會在製程中造成損失。 此目的像藉下述事實予以實現,即:將一個焊接材料 層施加至引言中所述及之該型矽半導體本體的擴散障壁 層上。 最好提供錫或鉛或鎵層作為該焊接材料層。 然後將此半導體本體經由加熱至高於大概258¾之溫 度而施加至固定件上並直接焊接至固定件上,典塱上偽 焊接至金靥固定件上,換言之,不須添加另外之焊接劑 和肋熔劑。 經濟部智慧財產局員工消費合作社印製 事實上,此方式産生無應力之焊接靥,它導致具有少 於300« m之基材屈曲。此外,固定件上之所焊接之半導 體本體的黏合強度極髙,換言之,在大於30PMa的區域中 。而且,由於溫度所改變之負載之脆變不會發生,因為金靥 相只會變薄,總之,因此消除了晶Η的”處理"及其破裂 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公釐)
經濟部中央標準局負工消費合作社印I
4370 2 8 AV B7 五、發明説明(3 ) 的危險等等問題。 此外,使用根據本發明予以金靥化之半導體本體及使 用根據本發明之方法,可獲得顯著之成本降低,因為將 材料成本降低,尤其由於省略一個氧化保護層,可增加 生産率。而且,根據本發明之方法在環境上亦待別有助 益,因為清潔步驟未使用CFC焊劑,結果是不必使用助 熔劑。 本發明將參照附圖來作詳細說明。圖式簡單說明如下: 第i圖顯示在焊接前金屬的層順序6 根據本發明將一個鋁層3施加至半導體本體1上,此 鋁層充分黏附至砂上而形成一個令人滿意之電阻性接觸 點(特別具有P-摻雜之矽該鋁層3具有一個擴散障壁 層4安裝在其上,此障壁層係由具有厚度大概50η m之鉻 或鈦所組成。將此層直接噴濺至鋁層3上,或予以直接 蒸氣沈積。有一個黏附促進劑層,例如Cu(圖中未示)施 加至該擴散障壁層4上,或直接施加焊接材料。該焊料 層僳由錫、鎵或鋁所組成並具有1 0 Q 0至3 0 0 0 n m之厚度, 當使用錫時,典型厚度大概2700iinu然後將以此方式所 金屬化之砂半導體本體1壓在金靥固定件2上(通常, 它傜由銅所組成)t以及在大概300 °C時,在保護性氣體 大氣下,或在真空狀況下予以連接至其上,將一種治金 學上之連接産生在擴散障壁層4,焊接材料層5與該固定 件2之間,它在高逹大概450 °C之溫度下仍然是穩定的。 應用本發明之方法産生高品質的産品,因為所敘逑之 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁)
A7 437u 2 8 五、發明說明() _B7 層 順 序 導 致 特 別 良 好 之 機 械 和 電 穩 定 之 接 觸 點 〇 特 定 之 » 白 工 業 技 術 和 經 濟 上 及 生 態 學 上 等 兩 觀 點 而 t 與 先 Λ.Λ. 刖 技 藝 相 比 較 9 本 發 明 之 方 法 應 是 極 為 有 利 的 〇 在 工 業 技 術 術 語 方 面 t 根 據 本 發 明 之 方 法 掲 示 更 進 一 步 減 少 矽 半 導 體 基 材 的 厚 度 之 可 能 性 此 導 致 功 率 半 導 體 組 件 導 電 狀 態 性 質 之 改 良 » 在 經 濟 上 優 點 係 : 可 降 低 材 料 成 本 及 可 增 加 製 造 之 生 産 量 〇 最 後 t 根 據 本 發 明 之 方 法 的 生 態 學 上 之 優 點 在 於 下 述 事 實 不 須 助 熔 劑 即 可 進 行 焊 接 , 而 其 結 果 是 • 藉 此 可 避 免 使 用 含 有 CFC溶劑 來 進 行 淸 潔 之 步 想 〇 符 號 對 照 表 1 半 導 體 本 81 2 金 屬 固 定 件 3 鋁 層 4 擴 散 陣 壁 層 5 焊 接 材 料 層 (請先閱讀背面之注意事項再填寫本頁) -6 -本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)

Claims (1)

  1. ' 437U 2 B A8 BS C8 D8 <^4 / 〇 ( -丨Γ、 六、申請專利範圍 1. —種由矽所组成之半導饉本體(ι>·其可經由一序列 的金屬層而焊接至金屬固定件(2>上,在焊接前,此 金JB層含有,自固定件方向中之矽厢始·—值鋁庖(3) 和一傾擴散障壁層44)·其待欲為:焊接材料層(5)僳 施加至擴散障壁層上》 2. 如申請專利範圍第1項之半導S本醱·其中設有一傾 錫或鉛或鎵層以作為焊接材料層(5 3. 如申請專利範圔笫1或第2項之半導醱本體·其中擴 敗障壁雇之厚度大約是50niu .4,如申請專利範困第1或第2項之半導Η本體,其中該 焊接材料S的厚度小於3000 n a。 5. 如申請專利範圍第3項之半導《本睦,其中该焊接 . 材料層的厚度小於3000ηΒβ 、乂 6. —種焊接半導體本醴(1)至金靥固定件(2)之方法,其 僳用於申請專利範園第1至4項之半導體本膣,其特 撖為:該半導體本睡(1)係施加至固定件(2)占,以及. 葙由加热至高於大約250Χ:之溫度直接焊接至固定件f (2) _h 〇 本纸張/〇*_適用中國國家標串(<:呢>入4说格<2丨0父297公釐) let— Ti^— 1^1 1^1 nn I -I (請先閣讀背面之注意事項再填.f々頁) 訂
TW086101824A 1996-02-19 1997-02-17 Semiconductor body which is composed of silicon and can be soldered to a metal mount as well as method for such soldering TW437028B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19606101A DE19606101A1 (de) 1996-02-19 1996-02-19 Halbleiterkörper mit Lotmaterialschicht

Publications (1)

Publication Number Publication Date
TW437028B true TW437028B (en) 2001-05-28

Family

ID=7785797

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086101824A TW437028B (en) 1996-02-19 1997-02-17 Semiconductor body which is composed of silicon and can be soldered to a metal mount as well as method for such soldering

Country Status (10)

Country Link
US (1) US5901901A (zh)
EP (1) EP0790647B1 (zh)
JP (1) JP2983486B2 (zh)
KR (1) KR100454755B1 (zh)
CN (1) CN1126171C (zh)
AT (1) ATE265090T1 (zh)
DE (2) DE19606101A1 (zh)
MY (1) MY124335A (zh)
SG (1) SG69995A1 (zh)
TW (1) TW437028B (zh)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19639438A1 (de) 1996-09-25 1998-04-02 Siemens Ag Halbleiterkörper mit Lotmaterialschicht
US6118351A (en) * 1997-06-10 2000-09-12 Lucent Technologies Inc. Micromagnetic device for power processing applications and method of manufacture therefor
US6440750B1 (en) 1997-06-10 2002-08-27 Agere Systems Guardian Corporation Method of making integrated circuit having a micromagnetic device
DE19735760A1 (de) * 1997-08-18 1999-02-25 Zeiss Carl Fa Lötverfahren für optische Materialien an Metallfassungen und gefaßte Baugruppen
DE19740904B4 (de) * 1997-09-17 2004-10-28 Infineon Technologies Ag Verfahren zum Beseitigen von Sauerstoff-Restverunreinigungen aus tiegelgezogenen Siliziumwafern
US6255714B1 (en) 1999-06-22 2001-07-03 Agere Systems Guardian Corporation Integrated circuit having a micromagnetic device including a ferromagnetic core and method of manufacture therefor
KR100594565B1 (ko) * 1999-08-04 2006-06-28 삼성전자주식회사 액정표시장치
DE19951945A1 (de) * 1999-10-28 2001-05-03 Daimler Chrysler Ag Halbleiterbauelement mit Seitenwandmetallisierung
JP4544675B2 (ja) * 1999-12-21 2010-09-15 ローム株式会社 半導体装置の製造方法
EP1320889A1 (de) * 2000-09-29 2003-06-25 Infineon Technologies AG Verbindungseinrichtung
DE10124141B4 (de) * 2000-09-29 2009-11-26 Infineon Technologies Ag Verbindungseinrichtung für eine elektronische Schaltungsanordnung und Schaltungsanordnung
DE10103294C1 (de) * 2001-01-25 2002-10-31 Siemens Ag Träger mit einer Metallfläche und mindestens ein darauf angeordneter Chip, insbesondere Leistungshalbleiter
DE102004001956B4 (de) 2004-01-13 2007-02-01 Infineon Technologies Ag Umverdrahtungssubstratstreifen mit mehreren Halbleiterbauteilpositionen
US7347354B2 (en) * 2004-03-23 2008-03-25 Intel Corporation Metallic solder thermal interface material layer and application of the same
US7868472B2 (en) * 2004-04-08 2011-01-11 Avago Technologies General Ip (Singapore) Pte. Ltd. Thermal dissipation in integrated circuit systems
JP4882229B2 (ja) * 2004-09-08 2012-02-22 株式会社デンソー 半導体装置およびその製造方法
DE102005031836B4 (de) 2005-07-06 2007-11-22 Infineon Technologies Ag Halbleiterleistungsmodul mit SiC-Leistungsdioden und Verfahren zur Herstellung desselben
DE602005015103D1 (de) 2005-07-28 2009-08-06 Infineon Technologies Ag Verbindungsstruktur zur Befestigung eines Halbleiterchips auf einem Metallsubstrat, Halbleiterchip und elektronisches Bauelement mit der Verbindungsstruktur, und Verfahren zur Herstellung der Verbindungsstruktur
DE102005052563B4 (de) 2005-11-02 2016-01-14 Infineon Technologies Ag Halbleiterchip, Halbleiterbauteil und Verfahren zu deren Herstellung
US7508012B2 (en) 2006-01-18 2009-03-24 Infineon Technologies Ag Electronic component and method for its assembly
US8951478B2 (en) * 2006-03-30 2015-02-10 Applied Materials, Inc. Ampoule with a thermally conductive coating
DE102006031405B4 (de) * 2006-07-05 2019-10-17 Infineon Technologies Ag Halbleitermodul mit Schaltfunktionen und Verfahren zur Herstellung desselben
DE102006048448A1 (de) * 2006-10-11 2008-04-17 Endress + Hauser Wetzer Gmbh + Co. Kg Erzeugen einer Lotverbindung
US9214442B2 (en) 2007-03-19 2015-12-15 Infineon Technologies Ag Power semiconductor module, method for producing a power semiconductor module, and semiconductor chip
CN101950737A (zh) * 2009-11-23 2011-01-19 杭州士兰集成电路有限公司 P型硅衬底背面金属化的制作方法
US8513798B2 (en) 2010-09-09 2013-08-20 Infineon Technologies Ag Power semiconductor chip package
US8587116B2 (en) 2010-09-30 2013-11-19 Infineon Technologies Ag Semiconductor module comprising an insert
US8461645B2 (en) 2011-03-16 2013-06-11 Infineon Technologies Austria Ag Power semiconductor device
DE102016226103B3 (de) 2016-12-22 2018-05-09 Conti Temic Microelectronic Gmbh Verfahren zur Herstellung einer elektrischen Verbindung und elektrische Verbindung zwischen zwei Komponenten
US10910508B1 (en) * 2018-05-04 2021-02-02 National Technology & Engineering Solutions Of Sandia, Llc Method of fabricating photosensitive devices with reduced process-temperature budget

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2474039A (en) * 1945-03-03 1949-06-21 Metals & Controls Corp Method of forming composite metal having a nickel-plated beryllium-copper base and gold or silver bonded thereto by a copper-plated iron sheet
GB1149606A (en) * 1967-02-27 1969-04-23 Motorola Inc Mounting for a semiconductor wafer which is resistant to fatigue caused by thermal stresses
DE2522773A1 (de) * 1973-08-09 1976-12-02 Siemens Ag Weichgeloetete kontaktanordnung
US4451972A (en) * 1980-01-21 1984-06-05 National Semiconductor Corporation Method of making electronic chip with metalized back including a surface stratum of solder
DE3406542A1 (de) * 1984-02-23 1985-08-29 Telefunken electronic GmbH, 7100 Heilbronn Verfahren zum herstellen eines halbleiterbauelementes
JPS63238994A (ja) * 1987-03-25 1988-10-05 Tdk Corp 半田組成物
DE3740773A1 (de) * 1987-12-02 1989-06-15 Philips Patentverwaltung Verfahren zum herstellen elektrisch leitender verbindungen
DE3823347A1 (de) * 1988-07-09 1990-01-11 Semikron Elektronik Gmbh Leistungs-halbleiterelement
DE69021438T2 (de) * 1989-05-16 1996-01-25 Marconi Gec Ltd Verfahren zur Herstellung einer Flip-Chip-Lötstruktur für Anordnungen mit Gold-Metallisierung.
US5027189A (en) * 1990-01-10 1991-06-25 Hughes Aircraft Company Integrated circuit solder die-attach design and method
DE9212486U1 (de) * 1992-09-16 1993-03-04 Siemens AG, 8000 München Halbleiterkörper mit verlöteter Trägerplatte
DE69325065T2 (de) * 1992-10-02 1999-10-28 Matsushita Electric Ind Co Ltd Halbleitervorrichtung, Bildabtastvorrichtung und Verfahren zu ihrer Herstellung
DE4241439A1 (de) * 1992-12-10 1994-06-16 Daimler Benz Ag Verfahren zur Erzeugung einer formschlüssigen Verbindung zwischen metallischen Verbindern und metallischen Kontakten von Halbleiteroberflächen
US5816478A (en) * 1995-06-05 1998-10-06 Motorola, Inc. Fluxless flip-chip bond and a method for making
US5803343A (en) * 1995-10-30 1998-09-08 Delco Electronics Corp. Solder process for enhancing reliability of multilayer hybrid circuits

Also Published As

Publication number Publication date
EP0790647B1 (de) 2004-04-21
KR970063589A (ko) 1997-09-12
EP0790647A3 (de) 1999-06-02
CN1126171C (zh) 2003-10-29
JPH1012507A (ja) 1998-01-16
MY124335A (en) 2006-06-30
US5901901A (en) 1999-05-11
CN1168536A (zh) 1997-12-24
KR100454755B1 (ko) 2005-01-13
JP2983486B2 (ja) 1999-11-29
SG69995A1 (en) 2000-01-25
ATE265090T1 (de) 2004-05-15
DE19606101A1 (de) 1997-08-21
EP0790647A2 (de) 1997-08-20
DE59711523D1 (de) 2004-05-27

Similar Documents

Publication Publication Date Title
TW437028B (en) Semiconductor body which is composed of silicon and can be soldered to a metal mount as well as method for such soldering
TW411533B (en) Semiconductor device and its manufacturing method
TW397808B (en) Joined ceramic structures and a process for the production thereof
TW461067B (en) Nickel alloy films for reduced intermetallic formation in solder
JPH10125821A (ja) 高信頼性半導体用基板
TW528814B (en) Cu plated ceramic substrate and a method of manufacturing the same
JP3288922B2 (ja) 接合体およびその製造方法
JP2003212670A (ja) 異種材料の接合体及びその製造方法
CN106271211A (zh) 用于陶瓷/金属钎焊的钎料及钎焊方法
JP3971456B2 (ja) 装着SiCダイ及びSiC用ダイ装着方法
JP3308883B2 (ja) 基 板
JP5640569B2 (ja) パワーモジュール用基板の製造方法
JP6020496B2 (ja) 接合構造体およびその製造方法
KR19980024894A (ko) 납땜 재료층을 갖는 반도체 바디
JPH08102570A (ja) セラミックス回路基板
TW200830439A (en) Method of bonding solder ball and base plate and method of manufacturing pakaging structur of using the same
JP2802615B2 (ja) 半導体基体を支持板上にろう接する方法
JP2503775B2 (ja) 半導体装置用基板
JP2008016813A (ja) パワー素子搭載用基板およびパワー素子搭載用基板の製造方法並びにパワーモジュール
JP2503777B2 (ja) 半導体装置用基板
CN113385805B (zh) 一种纯Al作为中间材料层的65%碳化硅颗粒增强铝基复合材料的焊接方法
JP2503776B2 (ja) 半導体装置用基板
JPH04170089A (ja) セラミックス回路基板
JP3309297B2 (ja) 半導体パッケージとその製造方法
JP5699882B2 (ja) パワーモジュール用基板、パワーモジュール用基板の製造方法、ヒートシンク付パワーモジュール用基板及びパワーモジュール

Legal Events

Date Code Title Description
GD4A Issue of patent certificate for granted invention patent
MK4A Expiration of patent term of an invention patent