TW365062B - Manufacturing method for semiconductor apparatus and the semiconductor apparatus thereof - Google Patents
Manufacturing method for semiconductor apparatus and the semiconductor apparatus thereofInfo
- Publication number
- TW365062B TW365062B TW086111999A TW86111999A TW365062B TW 365062 B TW365062 B TW 365062B TW 086111999 A TW086111999 A TW 086111999A TW 86111999 A TW86111999 A TW 86111999A TW 365062 B TW365062 B TW 365062B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor apparatus
- forms
- silicon nitride
- layer
- manufacturing
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 5
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 238000000034 method Methods 0.000 abstract 4
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract 3
- 239000010410 layer Substances 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 239000011229 interlayer Substances 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9044094A JPH10242419A (ja) | 1997-02-27 | 1997-02-27 | 半導体装置の製造方法及び半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW365062B true TW365062B (en) | 1999-07-21 |
Family
ID=12682043
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW086111999A TW365062B (en) | 1997-02-27 | 1997-08-21 | Manufacturing method for semiconductor apparatus and the semiconductor apparatus thereof |
Country Status (6)
Country | Link |
---|---|
US (1) | US6559494B1 (zh) |
JP (1) | JPH10242419A (zh) |
KR (1) | KR100310565B1 (zh) |
CN (1) | CN1097311C (zh) |
DE (1) | DE19739755A1 (zh) |
TW (1) | TW365062B (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6798002B1 (en) * | 1999-10-13 | 2004-09-28 | Advanced Micro Devices, Inc. | Dual-purpose anti-reflective coating and spacer for flash memory and other dual gate technologies and method of forming |
US6274409B1 (en) * | 2000-01-18 | 2001-08-14 | Agere Systems Guardian Corp. | Method for making a semiconductor device |
KR100338781B1 (ko) * | 2000-09-20 | 2002-06-01 | 윤종용 | 반도체 메모리 소자 및 그의 제조방법 |
DE10228571A1 (de) * | 2002-06-26 | 2004-01-22 | Infineon Technologies Ag | Herstellungsverfahren für eine Halbleiterstruktur mit einer Mehrzahl von Gatestapeln auf einem Halbleitersubstrat und entsprechende Halbleiterstruktur |
KR100475084B1 (ko) * | 2002-08-02 | 2005-03-10 | 삼성전자주식회사 | Dram 반도체 소자 및 그 제조방법 |
DE10243380A1 (de) * | 2002-09-18 | 2004-04-01 | Infineon Technologies Ag | Verfahren zur Herstellung einer integrierten Halbleiterschaltung |
US6909152B2 (en) * | 2002-11-14 | 2005-06-21 | Infineon Technologies, Ag | High density DRAM with reduced peripheral device area and method of manufacture |
JP4841106B2 (ja) * | 2003-08-28 | 2011-12-21 | ルネサスエレクトロニクス株式会社 | Mis型半導体装置及びその製造方法 |
JP5292878B2 (ja) * | 2008-03-26 | 2013-09-18 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
DE102009039421B4 (de) | 2009-08-31 | 2017-09-07 | GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG | Doppelkontaktmetallisierung mit stromloser Plattierung in einem Halbleiterbauelement |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4818714A (en) * | 1987-12-02 | 1989-04-04 | Advanced Micro Devices, Inc. | Method of making a high performance MOS device having LDD regions with graded junctions |
JP2859288B2 (ja) * | 1989-03-20 | 1999-02-17 | 株式会社日立製作所 | 半導体集積回路装置及びその製造方法 |
JPH0824169B2 (ja) * | 1989-05-10 | 1996-03-06 | 富士通株式会社 | 半導体記憶装置の製造方法 |
JPH04215471A (ja) | 1990-12-14 | 1992-08-06 | Sony Corp | 半導体メモリ |
US5126280A (en) | 1991-02-08 | 1992-06-30 | Micron Technology, Inc. | Stacked multi-poly spacers with double cell plate capacitor |
JP2796656B2 (ja) * | 1992-04-24 | 1998-09-10 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
JP3197064B2 (ja) | 1992-07-17 | 2001-08-13 | 株式会社東芝 | 半導体記憶装置 |
JPH06163535A (ja) | 1992-11-26 | 1994-06-10 | Rohm Co Ltd | 半導体装置およびその製造方法 |
JPH06177147A (ja) | 1992-12-10 | 1994-06-24 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
JP3004177B2 (ja) * | 1993-09-16 | 2000-01-31 | 株式会社東芝 | 半導体集積回路装置 |
JPH07263554A (ja) | 1994-03-25 | 1995-10-13 | Nec Corp | 半導体装置及びその製造方法 |
US5441906A (en) * | 1994-04-04 | 1995-08-15 | Motorola, Inc. | Insulated gate field effect transistor having a partial channel and method for fabricating |
JPH0837145A (ja) | 1994-07-26 | 1996-02-06 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
JP2643870B2 (ja) * | 1994-11-29 | 1997-08-20 | 日本電気株式会社 | 半導体記憶装置の製造方法 |
JPH09107082A (ja) * | 1995-08-09 | 1997-04-22 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
US5700731A (en) * | 1995-12-07 | 1997-12-23 | Vanguard International Semiconductor Corporation | Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells |
JP2765544B2 (ja) * | 1995-12-26 | 1998-06-18 | 日本電気株式会社 | 半導体装置の製造方法 |
US5567640A (en) * | 1996-01-11 | 1996-10-22 | Vanguard International Semiconductor Corporation | Method for fabricating T-shaped capacitors in DRAM cells |
US5733808A (en) * | 1996-01-16 | 1998-03-31 | Vanguard International Semiconductor Corporation | Method for fabricating a cylindrical capacitor for a semiconductor device |
US5554557A (en) | 1996-02-02 | 1996-09-10 | Vanguard International Semiconductor Corp. | Method for fabricating a stacked capacitor with a self aligned node contact in a memory cell |
US5721154A (en) * | 1996-06-18 | 1998-02-24 | Vanguard International Semiconductor | Method for fabricating a four fin capacitor structure |
US5668036A (en) * | 1996-06-21 | 1997-09-16 | Vanguard International Semiconductor Corporation | Fabrication method of the post structure of the cell for high density DRAM |
US5792687A (en) * | 1996-08-01 | 1998-08-11 | Vanguard International Semiconductor Corporation | Method for fabricating high density integrated circuits using oxide and polysilicon spacers |
US5763311A (en) * | 1996-11-04 | 1998-06-09 | Advanced Micro Devices, Inc. | High performance asymmetrical MOSFET structure and method of making the same |
US5792681A (en) * | 1997-01-15 | 1998-08-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fabrication process for MOSFET devices and a reproducible capacitor structure |
-
1997
- 1997-02-27 JP JP9044094A patent/JPH10242419A/ja not_active Ceased
- 1997-08-11 US US08/909,309 patent/US6559494B1/en not_active Expired - Fee Related
- 1997-08-21 TW TW086111999A patent/TW365062B/zh active
- 1997-09-10 DE DE19739755A patent/DE19739755A1/de not_active Ceased
- 1997-09-25 KR KR1019970048682A patent/KR100310565B1/ko not_active IP Right Cessation
- 1997-09-25 CN CN97119580A patent/CN1097311C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
DE19739755A1 (de) | 1998-09-10 |
KR19980069965A (ko) | 1998-10-26 |
US6559494B1 (en) | 2003-05-06 |
CN1192045A (zh) | 1998-09-02 |
KR100310565B1 (ko) | 2002-05-09 |
CN1097311C (zh) | 2002-12-25 |
JPH10242419A (ja) | 1998-09-11 |
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