TW348274B - Method for forming a trench isolation structure in an integrated circuit - Google Patents

Method for forming a trench isolation structure in an integrated circuit

Info

Publication number
TW348274B
TW348274B TW085101342A TW85101342A TW348274B TW 348274 B TW348274 B TW 348274B TW 085101342 A TW085101342 A TW 085101342A TW 85101342 A TW85101342 A TW 85101342A TW 348274 B TW348274 B TW 348274B
Authority
TW
Taiwan
Prior art keywords
trench
layer
forming
dielectric layer
oxidation resistant
Prior art date
Application number
TW085101342A
Other languages
English (en)
Inventor
H Perera Asanga
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Motorola Inc filed Critical Motorola Inc
Application granted granted Critical
Publication of TW348274B publication Critical patent/TW348274B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
TW085101342A 1995-04-04 1996-02-03 Method for forming a trench isolation structure in an integrated circuit TW348274B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/416,243 US5786263A (en) 1995-04-04 1995-04-04 Method for forming a trench isolation structure in an integrated circuit

Publications (1)

Publication Number Publication Date
TW348274B true TW348274B (en) 1998-12-21

Family

ID=23649176

Family Applications (1)

Application Number Title Priority Date Filing Date
TW085101342A TW348274B (en) 1995-04-04 1996-02-03 Method for forming a trench isolation structure in an integrated circuit

Country Status (6)

Country Link
US (1) US5786263A (zh)
EP (1) EP0736897B1 (zh)
JP (2) JP4416843B2 (zh)
KR (1) KR100394517B1 (zh)
DE (1) DE69623679T2 (zh)
TW (1) TW348274B (zh)

Families Citing this family (90)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19528991C2 (de) * 1995-08-07 2002-05-16 Infineon Technologies Ag Herstellungsverfahren für eine nichtflüchtige Speicherzelle
US5933748A (en) * 1996-01-22 1999-08-03 United Microelectronics Corp. Shallow trench isolation process
US6064104A (en) * 1996-01-31 2000-05-16 Advanced Micro Devices, Inc. Trench isolation structures with oxidized silicon regions and method for making the same
JP2891205B2 (ja) * 1996-10-21 1999-05-17 日本電気株式会社 半導体集積回路の製造方法
TWI278933B (en) 1997-03-05 2007-04-11 Hitachi Ltd Method of making semiconductor IC device
JP3904676B2 (ja) * 1997-04-11 2007-04-11 株式会社ルネサステクノロジ トレンチ型素子分離構造の製造方法およびトレンチ型素子分離構造
TW388095B (en) * 1997-05-20 2000-04-21 United Microelectronics Corp Method for improving planarization of dielectric layer in interconnect metal process
JPH118295A (ja) 1997-06-16 1999-01-12 Nec Corp 半導体装置及びその製造方法
DE19732871C2 (de) * 1997-07-30 1999-05-27 Siemens Ag Festwert-Speicherzellenanordnung, Ätzmaske für deren Programmierung und Verfahren zu deren Herstellung
US5976947A (en) * 1997-08-18 1999-11-02 Micron Technology, Inc. Method for forming dielectric within a recess
FR2797603B1 (fr) * 1997-09-01 2004-01-16 United Microelectronics Corp Machine et procede de polissage chimio-mecanique et manchon de retenue utilise dans cette machine
US7157385B2 (en) * 2003-09-05 2007-01-02 Micron Technology, Inc. Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry
US6118167A (en) * 1997-11-13 2000-09-12 National Semiconductor Corporation Polysilicon coated nitride-lined shallow trench
US5952707A (en) * 1997-12-05 1999-09-14 Stmicroelectronics, Inc. Shallow trench isolation with thin nitride as gate dielectric
US6063691A (en) * 1997-12-29 2000-05-16 Lg Semicon Co., Ltd. Shallow trench isolation (STI) fabrication method for semiconductor device
US6274455B1 (en) * 1997-12-29 2001-08-14 Hyundai Electronics Industries Co., Ltd. Method for isolating semiconductor device
US6228741B1 (en) * 1998-01-13 2001-05-08 Texas Instruments Incorporated Method for trench isolation of semiconductor devices
US6448150B1 (en) * 1998-01-20 2002-09-10 Nanya Technology Corporation Method for forming shallow trench isolation in the integrated circuit
US6153478A (en) * 1998-01-28 2000-11-28 United Microelectronics Corp. STI process for eliminating kink effect
WO1999044223A2 (en) * 1998-02-27 1999-09-02 Lsi Logic Corporation Process of shallow trench isolating active devices to avoid sub-threshold kinks arising from corner effects without additional processing
KR100275908B1 (ko) * 1998-03-02 2000-12-15 윤종용 집적 회로에 트렌치 아이솔레이션을 형성하는방법
US6071817A (en) * 1998-03-23 2000-06-06 Lsi Logic Corporation Isolation method utilizing a high pressure oxidation
SG94718A1 (en) * 1998-05-23 2003-03-18 Samsung Electronics Co Ltd Cartridge for an information recording medium
KR100283469B1 (ko) * 1998-06-08 2001-04-02 윤종용 반도체소자제조방법
US6040211A (en) * 1998-06-09 2000-03-21 Siemens Aktiengesellschaft Semiconductors having defect denuded zones
JP2000200827A (ja) * 1999-01-06 2000-07-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6180492B1 (en) * 1999-01-25 2001-01-30 United Microelectronics Corp. Method of forming a liner for shallow trench isolation
US6140206A (en) * 1999-06-14 2000-10-31 Chartered Semiconductor Manufacturing Ltd. Method to form shallow trench isolation structures
US6524931B1 (en) * 1999-07-20 2003-02-25 Motorola, Inc. Method for forming a trench isolation structure in an integrated circuit
US6200881B1 (en) * 1999-07-23 2001-03-13 Worldwide Semiconductor Manufacturing Corp. Method of forming a shallow trench isolation
US6300219B1 (en) * 1999-08-30 2001-10-09 Micron Technology, Inc. Method of forming trench isolation regions
US6251753B1 (en) * 1999-11-23 2001-06-26 Ching-Fa Yeh Method of sidewall capping for degradation-free damascene trenches of low dielectric constant dielectric by selective liquid-phase deposition
US6737359B1 (en) * 1999-12-13 2004-05-18 Taiwan Semiconductor Manufacturing Company Method of forming a shallow trench isolation using a sion anti-reflective coating which eliminates water spot defects
KR100400301B1 (ko) * 1999-12-30 2003-10-01 주식회사 하이닉스반도체 반도체소자의 소자분리막 형성방법
DE10110974C2 (de) * 2001-03-07 2003-07-24 Infineon Technologies Ag Verfahren zum Verbreitern eines aktiven Halbleitergebiets auf einem Halbleitersubstrat
US20020197823A1 (en) * 2001-05-18 2002-12-26 Yoo Jae-Yoon Isolation method for semiconductor device
JP2004153173A (ja) * 2002-10-31 2004-05-27 Sharp Corp 半導体装置の製造方法
US7422961B2 (en) * 2003-03-14 2008-09-09 Advanced Micro Devices, Inc. Method of forming isolation regions for integrated circuits
US6844082B2 (en) * 2003-04-28 2005-01-18 Taiwan Semiconductor Manufacturing Co., Ltd. Gas distribution plate with anodized alumnium coating
US7125815B2 (en) * 2003-07-07 2006-10-24 Micron Technology, Inc. Methods of forming a phosphorous doped silicon dioxide comprising layer
US7754550B2 (en) * 2003-07-10 2010-07-13 International Rectifier Corporation Process for forming thick oxides on Si or SiC for semiconductor devices
US7053010B2 (en) * 2004-03-22 2006-05-30 Micron Technology, Inc. Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells
US7235459B2 (en) * 2004-08-31 2007-06-26 Micron Technology, Inc. Methods of forming trench isolation in the fabrication of integrated circuitry, methods of fabricating memory circuitry, integrated circuitry and memory integrated circuitry
FR2876220B1 (fr) 2004-10-06 2007-09-28 Commissariat Energie Atomique Procede d'elaboration de structures empilees mixtes, a zones isolantes diverses et/ou zones de conduction electrique verticale localisees.
US7217634B2 (en) * 2005-02-17 2007-05-15 Micron Technology, Inc. Methods of forming integrated circuitry
US7510966B2 (en) * 2005-03-07 2009-03-31 Micron Technology, Inc. Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines
US8012847B2 (en) * 2005-04-01 2011-09-06 Micron Technology, Inc. Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating integrated circuitry
CN100461342C (zh) * 2005-04-18 2009-02-11 力晶半导体股份有限公司 沟槽式栅介电层的形成方法
DE102005039667A1 (de) * 2005-08-22 2007-03-01 Infineon Technologies Ag Verfahren zum Herstellen einer Struktur mit geringem Aspektverhältnis
FR2897982B1 (fr) 2006-02-27 2008-07-11 Tracit Technologies Sa Procede de fabrication des structures de type partiellement soi, comportant des zones reliant une couche superficielle et un substrat
US20070277734A1 (en) * 2006-05-30 2007-12-06 Applied Materials, Inc. Process chamber for dielectric gapfill
US7790634B2 (en) * 2006-05-30 2010-09-07 Applied Materials, Inc Method for depositing and curing low-k films for gapfill and conformal film applications
US7902080B2 (en) * 2006-05-30 2011-03-08 Applied Materials, Inc. Deposition-plasma cure cycle process to enhance film quality of silicon dioxide
US7825038B2 (en) * 2006-05-30 2010-11-02 Applied Materials, Inc. Chemical vapor deposition of high quality flow-like silicon dioxide using a silicon containing precursor and atomic oxygen
US8232176B2 (en) * 2006-06-22 2012-07-31 Applied Materials, Inc. Dielectric deposition and etch back processes for bottom up gapfill
US7833893B2 (en) * 2007-07-10 2010-11-16 International Business Machines Corporation Method for forming conductive structures
US7745352B2 (en) * 2007-08-27 2010-06-29 Applied Materials, Inc. Curing methods for silicon dioxide thin films deposited from alkoxysilane precursor with harp II process
US7803722B2 (en) * 2007-10-22 2010-09-28 Applied Materials, Inc Methods for forming a dielectric layer within trenches
US7943531B2 (en) 2007-10-22 2011-05-17 Applied Materials, Inc. Methods for forming a silicon oxide layer over a substrate
US7867923B2 (en) * 2007-10-22 2011-01-11 Applied Materials, Inc. High quality silicon oxide films by remote plasma CVD from disilane precursors
US8357435B2 (en) 2008-05-09 2013-01-22 Applied Materials, Inc. Flowable dielectric equipment and processes
US8980382B2 (en) 2009-12-02 2015-03-17 Applied Materials, Inc. Oxygen-doping for non-carbon radical-component CVD films
US8741788B2 (en) 2009-08-06 2014-06-03 Applied Materials, Inc. Formation of silicon oxide using non-carbon flowable CVD processes
US7935643B2 (en) * 2009-08-06 2011-05-03 Applied Materials, Inc. Stress management for tensile films
US7989365B2 (en) * 2009-08-18 2011-08-02 Applied Materials, Inc. Remote plasma source seasoning
US8105956B2 (en) 2009-10-20 2012-01-31 Micron Technology, Inc. Methods of forming silicon oxides and methods of forming interlevel dielectrics
US8449942B2 (en) 2009-11-12 2013-05-28 Applied Materials, Inc. Methods of curing non-carbon flowable CVD films
CN102687252A (zh) 2009-12-30 2012-09-19 应用材料公司 以可变的氮/氢比所制造的自由基来生长介电薄膜的方法
US8329262B2 (en) 2010-01-05 2012-12-11 Applied Materials, Inc. Dielectric film formation using inert gas excitation
JP2013517616A (ja) 2010-01-06 2013-05-16 アプライド マテリアルズ インコーポレイテッド 酸化物ライナを使用する流動可能な誘電体
US8304351B2 (en) 2010-01-07 2012-11-06 Applied Materials, Inc. In-situ ozone cure for radical-component CVD
WO2011109148A2 (en) 2010-03-05 2011-09-09 Applied Materials, Inc. Conformal layers by radical-component cvd
US8236708B2 (en) 2010-03-09 2012-08-07 Applied Materials, Inc. Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor
US7994019B1 (en) 2010-04-01 2011-08-09 Applied Materials, Inc. Silicon-ozone CVD with reduced pattern loading using incubation period deposition
US8476142B2 (en) 2010-04-12 2013-07-02 Applied Materials, Inc. Preferential dielectric gapfill
US8524004B2 (en) 2010-06-16 2013-09-03 Applied Materials, Inc. Loadlock batch ozone cure
US8318584B2 (en) 2010-07-30 2012-11-27 Applied Materials, Inc. Oxide-rich liner layer for flowable CVD gapfill
US9285168B2 (en) 2010-10-05 2016-03-15 Applied Materials, Inc. Module for ozone cure and post-cure moisture treatment
US8664127B2 (en) 2010-10-15 2014-03-04 Applied Materials, Inc. Two silicon-containing precursors for gapfill enhancing dielectric liner
US10283321B2 (en) 2011-01-18 2019-05-07 Applied Materials, Inc. Semiconductor processing system and methods using capacitively coupled plasma
US8450191B2 (en) 2011-01-24 2013-05-28 Applied Materials, Inc. Polysilicon films by HDP-CVD
US8716154B2 (en) 2011-03-04 2014-05-06 Applied Materials, Inc. Reduced pattern loading using silicon oxide multi-layers
US8445078B2 (en) 2011-04-20 2013-05-21 Applied Materials, Inc. Low temperature silicon oxide conversion
US8466073B2 (en) 2011-06-03 2013-06-18 Applied Materials, Inc. Capping layer for reduced outgassing
US9404178B2 (en) 2011-07-15 2016-08-02 Applied Materials, Inc. Surface treatment and deposition for reduced outgassing
US8617989B2 (en) 2011-09-26 2013-12-31 Applied Materials, Inc. Liner property improvement
US8551891B2 (en) 2011-10-04 2013-10-08 Applied Materials, Inc. Remote plasma burn-in
US8889566B2 (en) 2012-09-11 2014-11-18 Applied Materials, Inc. Low cost flowable dielectric films
US9018108B2 (en) 2013-01-25 2015-04-28 Applied Materials, Inc. Low shrinkage dielectric films
US9412581B2 (en) 2014-07-16 2016-08-09 Applied Materials, Inc. Low-K dielectric gapfill by flowable deposition

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58171832A (ja) * 1982-03-31 1983-10-08 Toshiba Corp 半導体装置の製造方法
US4714520A (en) * 1985-07-25 1987-12-22 Advanced Micro Devices, Inc. Method for filling a trench in an integrated circuit structure without producing voids
US4666556A (en) * 1986-05-12 1987-05-19 International Business Machines Corporation Trench sidewall isolation by polysilicon oxidation
JPS63314844A (ja) * 1987-06-18 1988-12-22 Toshiba Corp 半導体装置の製造方法
US4927780A (en) * 1989-10-02 1990-05-22 Motorola, Inc. Encapsulation method for localized oxidation of silicon
US5175123A (en) * 1990-11-13 1992-12-29 Motorola, Inc. High-pressure polysilicon encapsulated localized oxidation of silicon
US5112772A (en) * 1991-09-27 1992-05-12 Motorola, Inc. Method of fabricating a trench structure
US5246537A (en) * 1992-04-30 1993-09-21 Motorola, Inc. Method of forming recessed oxide isolation
US5316965A (en) * 1993-07-29 1994-05-31 Digital Equipment Corporation Method of decreasing the field oxide etch rate in isolation technology
US5294562A (en) * 1993-09-27 1994-03-15 United Microelectronics Corporation Trench isolation with global planarization using flood exposure
US5387540A (en) * 1993-09-30 1995-02-07 Motorola Inc. Method of forming trench isolation structure in an integrated circuit

Also Published As

Publication number Publication date
EP0736897A3 (en) 1998-03-11
JPH08279552A (ja) 1996-10-22
KR100394517B1 (ko) 2003-10-17
DE69623679T2 (de) 2003-05-22
JP4168073B2 (ja) 2008-10-22
EP0736897A2 (en) 1996-10-09
US5786263A (en) 1998-07-28
KR960036914A (ko) 1996-11-19
JP2007096353A (ja) 2007-04-12
JP4416843B2 (ja) 2010-02-17
DE69623679D1 (de) 2002-10-24
EP0736897B1 (en) 2002-09-18

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