ATE363731T1 - Auf geringe leckage ausgerichtete architektur für sub 0,18 mikrometer salizidiertes cmos bauelement - Google Patents
Auf geringe leckage ausgerichtete architektur für sub 0,18 mikrometer salizidiertes cmos bauelementInfo
- Publication number
- ATE363731T1 ATE363731T1 AT00480066T AT00480066T ATE363731T1 AT E363731 T1 ATE363731 T1 AT E363731T1 AT 00480066 T AT00480066 T AT 00480066T AT 00480066 T AT00480066 T AT 00480066T AT E363731 T1 ATE363731 T1 AT E363731T1
- Authority
- AT
- Austria
- Prior art keywords
- nitride
- trench
- pad oxide
- semiconductor substrate
- layer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10W10/0145—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations of trenches having shapes other than rectangular or V-shape
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
Landscapes
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Logic Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/356,003 US6165871A (en) | 1999-07-16 | 1999-07-16 | Method of making low-leakage architecture for sub-0.18 μm salicided CMOS device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE363731T1 true ATE363731T1 (de) | 2007-06-15 |
Family
ID=23399678
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT00480066T ATE363731T1 (de) | 1999-07-16 | 2000-07-13 | Auf geringe leckage ausgerichtete architektur für sub 0,18 mikrometer salizidiertes cmos bauelement |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6165871A (de) |
| EP (1) | EP1069613B1 (de) |
| AT (1) | ATE363731T1 (de) |
| DE (1) | DE60034999T2 (de) |
| SG (1) | SG81356A1 (de) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100338766B1 (ko) | 1999-05-20 | 2002-05-30 | 윤종용 | 티(t)형 소자분리막 형성방법을 이용한 엘리베이티드 샐리사이드 소오스/드레인 영역 형성방법 및 이를 이용한 반도체 소자 |
| US6277697B1 (en) * | 1999-11-12 | 2001-08-21 | United Microelectronics Corp. | Method to reduce inverse-narrow-width effect |
| KR20010059185A (ko) * | 1999-12-30 | 2001-07-06 | 박종섭 | 반도체소자의 소자분리막 형성방법 |
| US6323104B1 (en) | 2000-03-01 | 2001-11-27 | Micron Technology, Inc. | Method of forming an integrated circuitry isolation trench, method of forming integrated circuitry, and integrated circuitry |
| US6265285B1 (en) * | 2000-10-25 | 2001-07-24 | Vanguard International Semiconductor Corporation | Method of forming a self-aligned trench isolation |
| JP2003060024A (ja) * | 2001-08-13 | 2003-02-28 | Mitsubishi Electric Corp | 半導体装置の製造方法および半導体装置 |
| US6541351B1 (en) * | 2001-11-20 | 2003-04-01 | International Business Machines Corporation | Method for limiting divot formation in post shallow trench isolation processes |
| KR100458767B1 (ko) * | 2002-07-04 | 2004-12-03 | 주식회사 하이닉스반도체 | 반도체 소자의 소자 분리막 형성 방법 |
| US6727150B2 (en) | 2002-07-26 | 2004-04-27 | Micron Technology, Inc. | Methods of forming trench isolation within a semiconductor substrate including, Tshaped trench with spacers |
| US6586314B1 (en) * | 2002-10-08 | 2003-07-01 | Chartered Semiconductor Manufacturing Ltd. | Method of forming shallow trench isolation regions with improved corner rounding |
| KR100888150B1 (ko) * | 2002-12-24 | 2009-03-16 | 동부일렉트로닉스 주식회사 | 반도체 소자의 트렌치 형성 방법 |
| KR100958619B1 (ko) * | 2002-12-31 | 2010-05-20 | 동부일렉트로닉스 주식회사 | 엔드 타입 플래시 메모리셀 제조방법 |
| KR101012438B1 (ko) | 2003-08-25 | 2011-02-08 | 매그나칩 반도체 유한회사 | 반도체 소자의 제조방법 |
| US7238564B2 (en) * | 2005-03-10 | 2007-07-03 | Taiwan Semiconductor Manufacturing Company | Method of forming a shallow trench isolation structure |
| JP2006278754A (ja) | 2005-03-29 | 2006-10-12 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| KR100707593B1 (ko) * | 2005-12-27 | 2007-04-13 | 동부일렉트로닉스 주식회사 | 반도체 소자의 이중 소자분리 구조 및 그 형성 방법 |
| US20070149996A1 (en) * | 2005-12-28 | 2007-06-28 | Medtronic Vascular, Inc. | Low profile filter |
| KR100932314B1 (ko) * | 2007-08-24 | 2009-12-16 | 주식회사 하이닉스반도체 | 반도체 소자의 제조 방법 |
| US8765491B2 (en) | 2010-10-28 | 2014-07-01 | International Business Machines Corporation | Shallow trench isolation recess repair using spacer formation process |
| US9111994B2 (en) * | 2010-11-01 | 2015-08-18 | Magnachip Semiconductor, Ltd. | Semiconductor device and method of fabricating the same |
| US8623713B2 (en) | 2011-09-15 | 2014-01-07 | International Business Machines Corporation | Trench isolation structure |
| US8735991B2 (en) * | 2011-12-01 | 2014-05-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | High gate density devices and methods |
| CN103165507A (zh) * | 2011-12-09 | 2013-06-19 | 上海华虹Nec电子有限公司 | 防止浅沟槽隔离边缘漏电的方法 |
| US20140147985A1 (en) * | 2012-11-29 | 2014-05-29 | Freescale Semiconductor, Inc. | Methods for the fabrication of semiconductor devices including sub-isolation buried layers |
| US9653507B2 (en) | 2014-06-25 | 2017-05-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Deep trench isolation shrinkage method for enhanced device performance |
| KR101867755B1 (ko) * | 2017-01-26 | 2018-06-15 | 매그나칩 반도체 유한회사 | 반도체 소자 및 그 제조 방법 |
| US11935780B2 (en) * | 2021-11-11 | 2024-03-19 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
| WO2023130203A1 (en) | 2022-01-04 | 2023-07-13 | Yangtze Memory Technologies Co., Ltd. | Semiconductor devices, memory devices, and methods for forming the same |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3324832B2 (ja) * | 1993-07-28 | 2002-09-17 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
| KR0151051B1 (ko) * | 1995-05-30 | 1998-12-01 | 김광호 | 반도체장치의 절연막 형성방법 |
| KR100197648B1 (ko) * | 1995-08-26 | 1999-06-15 | 김영환 | 반도체소자의 소자분리 절연막 형성방법 |
| KR0168194B1 (ko) * | 1995-12-14 | 1999-02-01 | 김광호 | 반도체 소자의 소자분리막 형성방법 |
| KR100192178B1 (ko) * | 1996-01-11 | 1999-06-15 | 김영환 | 반도체 소자의 아이솔레이션 방법 |
| US5834360A (en) * | 1996-07-31 | 1998-11-10 | Stmicroelectronics, Inc. | Method of forming an improved planar isolation structure in an integrated circuit |
| KR100195243B1 (ko) * | 1996-09-05 | 1999-06-15 | 윤종용 | 얕은 트랜치 분리를 이용한 반도체 장치의 제조방법 |
| US5895253A (en) * | 1997-08-22 | 1999-04-20 | Micron Technology, Inc. | Trench isolation for CMOS devices |
| US5801083A (en) * | 1997-10-20 | 1998-09-01 | Chartered Semiconductor Manufacturing, Ltd. | Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners |
| US6020030A (en) * | 1998-05-07 | 2000-02-01 | Aluminum Company Of America | Coating an aluminum alloy substrate |
-
1999
- 1999-07-16 US US09/356,003 patent/US6165871A/en not_active Expired - Fee Related
-
2000
- 2000-06-16 SG SG200003419A patent/SG81356A1/en unknown
- 2000-07-13 DE DE60034999T patent/DE60034999T2/de not_active Expired - Fee Related
- 2000-07-13 AT AT00480066T patent/ATE363731T1/de not_active IP Right Cessation
- 2000-07-13 EP EP00480066A patent/EP1069613B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US6165871A (en) | 2000-12-26 |
| EP1069613B1 (de) | 2007-05-30 |
| EP1069613A3 (de) | 2004-08-18 |
| DE60034999T2 (de) | 2008-01-31 |
| DE60034999D1 (de) | 2007-07-12 |
| EP1069613A2 (de) | 2001-01-17 |
| SG81356A1 (en) | 2001-06-19 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |