TW202134488A - 半導體基板的製造方法及半導體基板 - Google Patents

半導體基板的製造方法及半導體基板 Download PDF

Info

Publication number
TW202134488A
TW202134488A TW109134865A TW109134865A TW202134488A TW 202134488 A TW202134488 A TW 202134488A TW 109134865 A TW109134865 A TW 109134865A TW 109134865 A TW109134865 A TW 109134865A TW 202134488 A TW202134488 A TW 202134488A
Authority
TW
Taiwan
Prior art keywords
single crystal
semiconductor
layer
silicon nitride
nitride film
Prior art date
Application number
TW109134865A
Other languages
English (en)
Inventor
二井谷美保
若林大士
山田健人
吉田和彥
Original Assignee
日商信越半導體股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商信越半導體股份有限公司 filed Critical 日商信越半導體股份有限公司
Publication of TW202134488A publication Critical patent/TW202134488A/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02—Pretreatment of the material to be coated
    • C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/24—Deposition of silicon only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/40—Coatings including alternating layers following a pattern, a periodic or defined repetition
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/40—Coatings including alternating layers following a pattern, a periodic or defined repetition
    • C23C28/42—Coatings including alternating layers following a pattern, a periodic or defined repetition characterized by the composition of the alternating layers
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/18—Epitaxial-layer growth characterised by the substrate
    • C30B25/186—Epitaxial-layer growth characterised by the substrate being specially pre-treated by, e.g. chemical or physical means
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/08—Germanium
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/38—Nitrides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/52—Alloys
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02428—Structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
    • H01L21/02507—Alternating layers, e.g. superlattice
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02513—Microstructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI

Abstract

本發明係關於一種半導體基板的製造方法，藉由於單晶矽基板之表面依序形成絕緣膜及半導體單晶層，而製造於該絕緣膜上具有該半導體單晶層之半導體基板，至少包含下列步驟：在含氮氣之氣體環境下將單晶矽基板進行熱處理，而於該單晶矽基板之表面形成與該單晶矽基板保持磊晶關係之氮化矽膜作為絕緣膜；於該氮化矽膜上磊晶成長半導體單晶層。藉此，提供即使令設於單晶矽基板與半導體單晶層之間的絕緣膜為氮化矽膜時，亦可以簡便之方法生產性高且低成本地獲得半導體基板之半導體基板的製造方法及半導體基板。

Description

半導體基板的製造方法及半導體基板
本發明係有關於SOI(Silicon On Insulator：絕緣層上矽)基板等於絕緣膜上具有半導體單晶層之半導體基板的製造方法及半導體基板。
半導體元件用半導體基板之一種有於絕緣膜亦即氧化矽膜上形成有矽層(以下有稱為SOI層之情形)之SOI(Silicon On Insulator：絕緣層上矽)基板。此SOI基板由於作為元件製作區域之基板表層部的SOI層藉埋入氧化膜層(BOX層)而與基板內部電性分離，故具有寄生電容小，抗放射性能力高等特徵。因此，高速、低耗費電力運作、防止軟錯誤等效果受到期待，而有望視為高性能半導體元件用基板。
製造此SOI基板之代表性方法可舉晶圓貼合法、SIMOX法為例。晶圓貼合法係例如於二片單晶矽基板(矽晶圓)其中一者之表面形成熱氧化膜後，藉由此形成之熱氧化膜使二片晶圓密合，施行結合熱處理，藉此，提高結合力，之後，以鏡面拋光等將其中一晶圓(形成SOI層之晶圓(以下稱為結合晶圓)薄膜化，藉此，製造SOI基板。此薄膜化之方法有將結合晶圓研磨、磨光至所期厚度之方法、或先將氫離子或稀有氣體離子之至少一種注入至結合晶圓之內部，形成離子注入層，貼合後，在離子注入層將結合晶圓剝離之稱為離子注入剝離法的方法等。SIMOX法係將氧離子注入至單晶矽基板之內部，之後進行高溫熱處理(氧化膜形成熱處理)，使注入之氧與矽反應，形成BOX層，藉此，製造SOI基板。
專利文獻1、2記載有藉由於單晶矽基板之表面形成與單晶矽基板保持磊晶關係之氧化膜，且於該氧化膜上沉積磊晶層，而製作SOI晶圓之技術。又，專利文獻3記載有在以離子注入剝離法所行之SOI晶圓的製造方法，可使用氮化矽膜作為埋入絕緣膜之技術。 [先前技術] [專利文獻]
[專利文獻1]日本專利公報第5168990號 [專利文獻2]日本專利公報第5205840號 [專利文獻3]國際公開第2004/010505號
[發明欲解決之問題]
SOI晶圓之製造方法如上述有貼合法，由於貼合二片晶圓，故有耗費材料成本，製造步驟數多之問題。又，在SIMOX法，亦有離子注入及高溫熱處理等製造步驟之數多的問題。考慮形成之SOI層與BOX層之品質、膜厚之自由度及均一性，在前述SOI基板之製造方法中，離子注入剝離法最受期待。舉例而言，為獲得厚度10nm之SOI層，形成比此厚之SOI層後，由於需進行犠牲氧化處理，調整膜厚，故步驟複雜，而無法避免高成本。
記載於專利文獻3之作為絕緣膜的氮化矽膜由於介電係數比氧化矽膜大，故膜厚薄，而具有作為SOI晶圓之埋入絕緣膜的功能之優點。然而，在專利文獻1、2，關於形成氮化矽膜作為埋入絕緣膜之技術，並未揭示也未暗示。當形成氮化矽膜作為埋入絕緣膜時，尚未知悉可以簡便之方法生產性高地獲得SOI基板之方法。
本發明係為解決上述問題而作成，其目的係提供一種半導體基板的製造方法及半導體基板，該半導體基板的製造方法及半導體基板係即使在於單晶矽基板之表面具有絕緣膜、該絕緣膜上之半導體單晶層的諸如SOI基板之半導體基板，將設於單晶矽基板與半導體單晶層之間的絕緣膜作為氮化矽膜時，亦可以簡便之方法，生產性高且低成本地獲得半導體基板。 [解決問題之手段]
本發明係為達成上述目的而作成，其提供一種半導體基板的製造方法，該半導體基板的製造方法係藉由於單晶矽基板之表面依序形成絕緣膜及半導體單晶層，而製造於該絕緣膜上具有該半導體單晶層之半導體基板的方法，至少包含下列步驟：在含氮氣之氣體環境下將該單晶矽基板進行熱處理，而於該單晶矽基板之表面形成與該單晶矽基板保持磊晶關係之氮化矽膜作為該絕緣膜；於該氮化矽膜上磊晶成長該半導體單晶層。
根據此種半導體基板的製造方法，可以簡便之方法，生產性高且低成本地提供半導體基板。
此時，半導體基板的製造方法可令在該含氮氣之氣體環境下進行熱處理之溫度為800℃以上。
藉此，可更穩定確實地在不使生產性降低下形成氮化矽膜。
此時，半導體基板的製造方法可使用磊晶成長裝置作為熱處理裝置，形成該氮化矽膜後，將該磊晶成長裝置內之環境氣體轉換成半導體單晶層成長用氣體，進行該磊晶成長。
藉此，可以極簡便之方法，更有效率、高生產性、低成本地獲得高品質之半導體基板。
此時，半導體基板的製造方法可令該半導體單晶層為Si層、SiGe層、Ge層、化合物半導體層中任一者。
藉此，可獲得具有更優質之半導體單晶層的半導體基板。
此時，半導體基板的製造方法可令該半導體單晶層為Si層，令該Si層之磊晶成長用氣體為三氯矽烷。
藉此，可以更高之生產性、低成本獲得SOI半導體基板。
此時，半導體基板的製造方法可令該氮化矽膜之膜厚為2nm以下。
藉此，可更穩定確實地獲得保持與基底之單晶矽基板的磊晶關係之氮化矽膜。
此時，半導體基板的製造方法可將該氮化矽膜與該半導體單晶層交互形成複數層。
藉此，可調整至總合所需要之單晶矽基板與最表面之半導體單晶層間的絕緣耐壓。同樣地，藉交互積層複數層，亦可形成直立型多層記憶體之積層構造或三維積層型積體電路等。
此時，半導體基板的製造方法可使用預先摻雜有氮或氧之單晶矽基板作為該單晶矽基板。
藉此，可根據氮化矽膜之形成、之後的半導體結晶層之形成熱歷程及之後的追加熱歷程，追加形成氮化矽層自身、氮氧化矽層或氧化矽層，而使氮化矽層之初期形成厚度厚。
此時，半導體基板的製造方法可使用面方位為(111)之單晶矽基板作為該單晶矽基板。
面方位為(111)之單晶矽基板的表面構造由於與氮化矽膜(Si3 N4 )之原子構造類似，故可適合用於形成與單晶矽基板保持磊晶關係之氮化矽膜，而可更穩定確實地獲得保持與基底之單晶矽基板的磊晶關係之氮化矽膜。
本發明又提供一種半導體基板，其於單晶矽基板之表面具有絕緣膜、及該絕緣膜上之半導體單晶層，該絕緣膜係與該單晶矽基板保持磊晶關係之氮化矽膜，該半導體單晶層係磊晶成長層。
根據此種半導體基板，形成為可簡便且低成本地獲得之具有高品質半導體單晶層的半導體基板。
此時，半導體基板可為該半導體單晶層係Si層、SiGe層、Ge層、化合物半導體層中任一者。
藉此，可具有更優質的半導體單晶層。
此時，半導體基板可為該氮化矽膜之膜厚係2nm以下。
藉此，可更穩定確實地形成為保持與基底之單晶矽基板的磊晶關係之氮化矽膜。
此時，半導體基板可交互具有該氮化矽膜與該半導體單晶層複數層。
藉此，可調整至總合所需要之單晶矽基板與最表面之半導體單晶層間的絕緣耐壓，且亦可形成直立型多層記憶體之積層構造或三維積層型積體電路等。
此時，半導體基板可為該單晶矽基板之面方位係(111)。
藉此，可更穩定確實地形成為保持與基底之單晶矽基板的磊晶關係之氮化矽膜。 [發明之效果]
如以上，根據本發明之半導體基板的製造方法，可簡便且低成本地提供具有作為絕緣膜之氮化矽膜與高品質之半導體單晶層的半導體基板。
以下，詳細地說明本發明，本發明並不限於此等。
如上述，要求即使令設於單晶矽基板與半導體單晶層之間的絕緣膜為氮化矽膜時，亦可以簡便之方法生產性高地獲得半導體基板之半導體基板的製造方法及半導體基板。
本案發明人們對上述問題致力反覆檢討之結果，發現當在含氮氣之氣體環境下將單晶矽基板進行熱處理(熱氮化)時，形成於單晶矽基板之表面的氮化矽膜會與基底之單晶矽基板保持磊晶關係。再者，想到若為該種氮化矽膜，可將半導體單晶層磊晶成長於該膜之表面，而使本發明完成。
即，發現到藉一種半導體基板的製造方法，可簡便且低成本地提供具有作為絕緣膜之氮化矽膜與高品質之半導體單晶層的半導體基板，而完成本發明，該半導體基板的製造方法係藉由於單晶矽基板之表面依序形成絕緣膜及半導體單晶層，而製造於該絕緣膜上具有該半導體單晶層之半導體基板，至少包含下列步驟：在含氮氣之氣體環境下將該單晶矽基板進行熱處理，而於該單晶矽基板之表面形成與該單晶矽基板保持磊晶關係之氮化矽膜作為該絕緣膜；於該氮化矽膜上磊晶成長該半導體單晶層。
本案發明人們並發現到藉一種半導體基板，可形成為可以低成本且簡便之方法獲得的具有作為絕緣膜之氮化矽膜與高品質之半導體單晶層的半導體基板，而完成本發明，該半導體基板係於單晶矽基板之表面具有絕緣膜、及該絕緣膜上之半導體單晶層，該絕緣膜係與該單晶矽基板保持磊晶關係之氮化矽膜，該半導體單晶層係磊晶成長層。
以下，參照圖式來說明。
在本發明中，「保特磊晶關係之氮化矽膜」係指具有可磊晶成長諸如單晶矽(Si)層之半導體單晶層的程度之結晶性的氮化矽膜。
(半導體基板) 首先，就本發明之半導體基板作說明。於圖1(c)顯示本發明之半導體基板10。本發明之半導體基板10至少於單晶矽基板1之表面具有作為絕緣膜之保持磊晶關係的氮化矽膜2、及該氮化矽膜2上之半導體單晶層3。
單晶矽基板1只要為單晶矽，並未特別限定，表面之定向、基板之電阻率、導電型(p或n)、摻雜物之種類、直徑(面積)、厚度等可按用途，適宜選擇、設定。不論FZ基板或CZ基板皆可，結晶中之氧濃度等物性也未特別限定。
單晶矽基板1以面方位係(111)者為佳。面方位為(111)之單晶矽基板的表面構造由於與氮化矽膜(Si3 N4 )之原子構造類似，故可適合用於形成與單晶矽基板保持磊晶關係之氮化矽膜。
又，在本發明之半導體基板，將例如2nm以下之薄氮化矽膜設於大範圍(例如整個晶圓)時，單晶矽基板上之氮化矽膜需具高均一性。此時，單晶矽基板以使用預先對單晶矽基板施行了退火處理之晶圓或預先於單晶矽基板設磊晶矽層之晶圓為佳。藉退火處理或磊晶成長，改善了晶圓之表面平坦度，而可形成為具更高之均一性的氮化矽膜2。
又，藉使單晶矽基板1於面方位具偏角而導入原子階梯，可提高氮化矽膜之階梯成長速度，而改善氮化矽膜之均一性。同樣地，於單晶矽基板整體或其表面具有高濃度摻雜物、或高濃度氧、抑或該等之矽析出物時，因該等之反應或變形等之影響，而提高氮化矽膜之階梯成長速度，而可形成為具高均一性之氮化矽膜2。
製造方法的細節之後敘述，氮化矽膜2藉以在含氮氣之氣體環境下的熱處理所行之矽的氮化而形成，係與單晶矽基板1「保持磊晶關係之氮化矽膜」。
如上述之氮化矽膜2由於膜厚越薄，越穩定保持與基底之單晶矽基板1的磊晶關係，故以膜厚為2nm以下為佳。
又，氮化矽膜由於對高溫氣體之耐蝕刻特性比氧化矽膜高，故可使用三氯矽烷作為將Si層磊晶成長當作後述半導體單晶層3之際的Si源。在上述專利文獻1、2，使用甲矽烷氣體作為磊晶成長單晶矽(Si)層之際的原料氣體，當如本發明之半導體基板10般，令絕緣膜為氮化矽膜，於其上磊晶成長Si層之半導體單晶層3時，由於可使用比甲矽烷低價，成長速度也高的三氯矽烷，故可獲得量產生時之成本優勢。
半導體單晶層3係磊晶成長層。此半導體單晶層3在SOI晶圓具有作為所謂之SOI層的功能。半導體單晶層3以與基底之單晶矽基板1同一材料的Si層為佳，但不限Si層，只要為接近單晶矽之晶格常數的半導體單晶層3，便可磊晶成長。具體而言，可舉SiGe層、Ge層、化合物半導體層(GaN層、AlN層等)為例。若為此等，可獲得更優質之半導體單晶層。此外，半導體單晶層3之膜厚未特別限定，可按適用之元件的設計，適宜設定。
又，亦可交互具有氮化矽膜2與半導體單晶層3複數層。一層2nm以下之氮化矽膜2所具有的絕緣耐壓可根據交互積層氮化矽膜2與半導體單晶層3複數層之構造，調整至總合所需要之單晶矽基板與最表面之半導體單晶層間的絕緣耐壓。同樣地，藉交互積層複數層，亦可形成直立型多層記憶體之積層構造或三維積層型積體電路等。
(半導體基板的製造方法) 接著，一面參照圖1，一面說明本發明之半導體基板的製造方法。
首先，如圖1(a)所示，準備用以於表面依序形成氮化矽膜2及半導體單晶層3之單晶矽基板1。
此時，亦可使用預先摻雜有氮或氧之單晶矽基板1。當使用此種單晶矽基板1時，根據氮化矽膜2之形成、之後的半導體單晶層3之形成熱歷程及之後的追加熱歷程，追加形成氮化矽層自身、氮氧化矽層或氧化矽層，而可使氮化矽膜2之初期形成厚度厚。
又，如上述，單晶矽基板以使用面方位為(111)之單晶矽基板為佳。
再者，為將例如2nm以下這樣的薄氮化矽膜形成於大範圍(例如整個晶圓)，需提高形成於單晶矽基板上之氮化矽膜的均一性。藉對單晶矽基板預先施行退火處理，或先於單晶矽基板磊晶成長矽層，可改善晶圓之表面平坦度，而可改善形成於基板上之氮化矽膜的均一性。又，當使用使單晶矽基板之面方位具偏角而導入原子階梯之晶圓或者於單晶矽基板整體或其表面具有高濃度摻雜物、高濃度氧或該等之矽析出物的晶圓時，可提高氮化矽膜之階梯成長速度，而改善氮化矽膜之均一性。
接著，如以下進行，於單晶矽基板1之表面上形成氮化矽膜2。首先，將準備之單晶矽基板1投入至熱處理爐。然後，如圖1(b)所示，於單晶矽基板1之表面形成與單晶矽基板1「保持磊晶關係之氮化矽膜2」。「保持磊晶關係之氮化矽膜2」可藉在含氮氣之氣體環境進行熱處理而形成。具體而言，例如藉在氮氣與氫氣之混合氣體環境進行熱處理，可獲得保持磊晶關係之氮化矽膜2。此時，當氮氣之混合比率低時，熱處理溫度以高溫(例如1100℃以上)為佳，藉使氮氣之混合比率高，亦可為800℃左右之溫度。由於800℃以上之溫度可更穩定確實地在不使生產性下降下形成氮化矽膜，故較佳。熱處理溫度之上限並未特別限定，理論上只要不到單晶矽基板1之熔點即可，當亦考慮生產性或對基板之熱損傷等時，可為1300℃左右以下。
又，由於形成之氮化矽膜2的膜厚越薄，可越穩定確實地形成為保持與基底之單晶矽基板1的磊晶關係之氮化矽膜，故氮化矽膜2之膜厚以2nm以下為佳。氮化矽膜2之膜厚的下限只要保持與基底之單晶矽基板1的磊晶關係，並未特別限定，可為0.3nm以上。
形成氮化矽膜2後，如圖1(c)所示，使用磊晶成長裝置，於氮化矽膜2上磊晶成長半導體單晶層3。成長之半導體單晶層3如上述，可舉Si層、SiGe層、Ge層、化合物半導體層(GaN層、AlN層等)為例。
又，亦可交互反覆進行氮化矽膜2與半導體單晶層3之形成，而交互形成氮化矽膜2與半導體單晶層3複數層。一層2nm以下之氮化矽膜2所具有之絕緣耐壓根據交互積層氮化矽膜2與半導體單晶層3複數層之構造，調整至總合所需要之單晶矽基板1與最表面之半導體單晶層間的絕緣耐壓。同樣地藉交互積層複數層，亦可形成直立型多層記憶體之積層構造或三維積層型積體電路等。
半導體單晶層3之磊晶成長條件、使用之原料氣體可按成長之半導體單晶層3的種類，適宜設定、選擇。本發明之半導體基板10具有氮化矽膜2作為絕緣膜，由於氮化矽膜對高溫氣體之耐蝕刻特性比氧化矽膜高，故磊晶成長如Si層或SiGe層般含Si的半導體單晶層3之際，可使用三氯矽烷作為原料氣體。再者，由於三氯矽烷比甲矽烷低價，成長速度亦快，故在可獲得量產時之成本優勢這點有利。又，三氯矽烷係比甲矽烷易處理之材料，安全性高，亦可減低耗費在製造設備之成本。
如以上進行，可獲得於單晶矽基板1之表面具有作為絕緣膜之與單晶矽基板1保持磊晶關係的氮化矽膜2、及絕緣膜上之磊晶成長層亦即半導體單晶層3之半導體基板10。若為此種半導體基板的製造方法，由於不致如貼合法般需要二片之晶圓，故可減低材料成本。又，亦可使製造步驟少，而可以簡便之方法實現高生產性，而可減低全體之成本。
上述半導體基板10的製造方法之用以使單晶矽基板1之表面氮化而形成氮化矽膜2的熱處理裝置只要為可在含氮氣之氣體環境下進行熱處理，而使單晶矽基板1之表面氮化的熱處理裝置，並未特別限定。舉例而言，可使用利用燈加熱等之RTP(Rapid Thermal Processing：快速熱處理)裝置、批式電阻加熱爐、或於基板進行磊晶成長之磊晶成長裝置等。當中以使用磊晶成長裝置為佳。
若使用磊晶成長裝置，在磊晶成長裝置內進行用以氮化之熱處理，於單晶矽基板1之表面上形成氮化矽膜2後，藉將爐內之環境氣體轉換成半導體單晶層3之磊晶成長用氣體，可進行半導體單晶層3之磊晶成長。藉此，由於可在同一爐內連續進行氮化矽膜2之成長與半導體單晶層3之磊晶成長，故可以極簡便之方法有效率、高生產性地製造半導體基板10。又，由於可在相同之裝置進行氮化矽膜2之形成與半導體單晶層3之磊晶成長，而不致引起伴隨裝置間之移動的污染，故可獲得污染等級低之高品質半導體基板10。 [實施例]
以下，舉實施例，就本發明詳細地說明，此並非限定本發明。
(實施例1) 製作於矽晶圓(單晶矽基板)之表面具有與矽晶圓保持磊晶關係之氮化矽膜(絕緣膜)、及該氮化矽膜上之矽(Si)磊晶成長層(半導體單晶層/SOI層)的SOI晶圓(半導體基板)，進行了構造之評價。製造條件如下。
(SOI晶圓之結構) 矽(Si)晶圓 ：直徑200mm、面方位(100)、 p型、10Ωcm 絕緣膜       ：氮化矽 SOI層        ：矽(Si)磊晶成長層
(SOI晶圓之製造條件) 熱處理裝置      ：單片式磊晶成長裝置 氮化矽膜         ：N2 24slm  +  H2 34slm 熱處理溫度1190℃ 熱處理時間300秒 Si(SOI層)         ：三氯矽烷  10slm +  H2 34slm 成長溫度1070℃ 成長時間600秒 成長速度2.4μm/min
使用穿透式電子顯微鏡(TEM)，觀察了所得之SOI晶圓的截面。於圖2顯示在實施例1所製造之SOI晶圓(半導體基板)的截面TEM觀察照片。圖3係放大圖2之氮化矽膜附近的晶格影像。如圖2所示，可知於矽(Si)晶圓與SOI層(矽(Si)磊晶成長層)之間形成1.4~1.5nm左右的氮化矽膜。又，如圖3所示，可知於矽(Si)晶圓之表面上形成有與矽(Si)晶圓保持磊晶關係之氮化矽膜(於氮化矽膜之部分觀察的晶格影像)、及於該氮化矽膜上磊晶成長之矽(Si)磊晶成長層。此外，關於氮化矽膜之部分，以TEM-EDX進行膜中之元素分析的結果，確認了檢測出Si與N。
(實施例2) (SOI晶圓之結構) 矽(Si)晶圓 ：直徑150mm、面方位(111)、 p型、50Ωcm 絕緣膜       ：氮化矽 SOI層        ：矽(Si)磊晶成長層
(SOI晶圓之製造條件) 熱處理裝置      ：單片式磊晶成長裝置 氮化矽膜         ：N2 24slm  +  H2 34slm 熱處理溫度1190℃ 熱處理時間300秒 Si(SOI)層         ：三氯矽烷  10slm +  H2 34slm 成長溫度1130℃ 成長時間15秒 成長速度3.8μm/min
使用穿透型電子顯微鏡(TEM)，觀察了所得之SOI晶圓的截面。於圖4顯示在實施例2製造之SOI晶圓(半導體基板)的截面TEM觀察照片。圖5係放大圖4之氮化矽膜附近的晶格影像。如圖4所示，可知於矽(Si)晶圓與SOI層(矽(Si)磊晶成長層)之間形成0.9~1.1nm左右的氮化矽膜。又，如圖5所示，可知於矽(Si)晶圓之表面上形成有與矽(Si)晶圓保持磊晶關係之氮化矽膜(於氮化矽膜之部分觀察的晶格影像)、及於該氮化矽膜上磊晶成長之矽(Si)磊晶成長層。此外，關於氮化矽膜之部分，以TEM-EDX進行膜中之元素分析的結果，確認了檢測出Si與N。
如上，根據本發明之實施例，可以簡便且生產性高之方法獲得於單晶矽基板之表面上形成有與單晶矽基板保持磊晶關係之氮化矽膜、及矽(Si)磊晶成長層之高品質SOI晶圓。
此外，本發明並非限於上述實施形態，上述實施形態為例示，具有與記載於本發明之申請專利範圍的技術思想實質上相同之結構，發揮同樣之作用效果者不論何者，皆包含在本發明之技術範圍。
1:單晶矽基板 2:氮化矽膜 3:半導體單晶層 10:半導體基板
圖1(a)~(c)係將本發明之半導體基板的概念圖與製造流程一同顯示。 圖2顯示實施例1之SOI晶圓(半導體基板)的截面TEM觀察照片。 圖3顯示圖2之部分放大圖(晶格影像)。 圖4顯示實施例2之SOI晶圓(半導體基板)的截面TEM觀察照片。 圖5顯示圖4之部分放大圖(晶格影像)。
1:單晶矽基板
2:氮化矽膜
3:半導體單晶層
10:半導體基板

Claims (16)

  1. 一種半導體基板的製造方法，藉由於單晶矽基板之表面依序形成絕緣膜及半導體單晶層，而製造於該絕緣膜上具有該半導體單晶層之半導體基板，至少包含下列步驟： 在含氮氣之氣體環境下將該單晶矽基板進行熱處理，而於該單晶矽基板之表面形成與該單晶矽基板保持磊晶關係之氮化矽膜作為該絕緣膜； 於該氮化矽膜上磊晶成長該半導體單晶層。
  2. 如請求項1之半導體基板的製造方法，其中， 令在該含氮氣之氣體環境下進行熱處理之溫度為800℃以上。
  3. 如請求項1之半導體基板的製造方法，其中， 使用磊晶成長裝置作為熱處理裝置，形成該氮化矽膜後，將該磊晶成長裝置內之環境氣體轉換成半導體單晶層成長用氣體，進行該磊晶成長。
  4. 如請求項2之半導體基板的製造方法，其中， 使用磊晶成長裝置作為該熱處理裝置，形成該氮化矽膜後，將該磊晶成長裝置內之環境氣體轉換成半導體單晶層成長用氣體，進行該磊晶成長。
  5. 如請求項1至請求項4中任一項之半導體基板的製造方法，其中， 令該半導體單晶層為Si層、SiGe層、Ge層、化合物半導體層中任一者。
  6. 如請求項5之半導體基板的製造方法，其中， 令該半導體單晶層為Si層，令該Si層之磊晶成長用氣體為三氯矽烷。
  7. 如請求項1至請求項4中任一項之半導體基板的製造方法，其中， 令該氮化矽膜之膜厚為2nm以下。
  8. 如請求項1至請求項4中任一項之半導體基板的製造方法，其中， 將該氮化矽膜與該半導體單晶層交互形成複數層。
  9. 如請求項1至請求項4中任一項之半導體基板的製造方法，其中， 使用預先摻雜有氮或氧之單晶矽基板作為該單晶矽基板。
  10. 如請求項1至請求項4中任一項之半導體基板的製造方法，其中， 使用面方位為(111)之單晶矽基板作為該單晶矽基板。
  11. 一種半導體基板，其於單晶矽基板之表面具有絕緣膜、及該絕緣膜上之半導體單晶層， 該絕緣膜係與該單晶矽基板保持磊晶關係之氮化矽膜， 該半導體單晶層係磊晶成長層。
  12. 如請求項11之半導體基板，其中， 該半導體單晶層係Si層、SiGe層、Ge層、化合物半導體層中任一者。
  13. 如請求項11之半導體基板，其中， 該氮化矽膜之膜厚係2nm以下。
  14. 如請求項12之半導體基板，其中， 該氮化矽膜之膜厚係2nm以下。
  15. 如請求項11至請求項14中任一項之半導體基板，其交互具有該氮化矽膜與該半導體單晶層複數層。
  16. 如請求項11至請求項14中任一項之半導體基板，其中， 該單晶矽基板之面方位係(111)。
TW109134865A 2019-10-24 2020-10-08 半導體基板的製造方法及半導體基板 TW202134488A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2019-193547 2019-10-24
JP2019193547 2019-10-24

Publications (1)

Publication Number Publication Date
TW202134488A true TW202134488A (zh) 2021-09-16

Family

ID=75619294

Family Applications (1)

Application Number Title Priority Date Filing Date
TW109134865A TW202134488A (zh) 2019-10-24 2020-10-08 半導體基板的製造方法及半導體基板

Country Status (7)

Country Link
US (1) US20230154748A1 (zh)
EP (1) EP4050132A4 (zh)
JP (1) JP7224325B2 (zh)
KR (1) KR20220090506A (zh)
CN (1) CN114586132A (zh)
TW (1) TW202134488A (zh)
WO (1) WO2021079745A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023039743A (ja) * 2021-09-09 2023-03-22 信越半導体株式会社 窒化物半導体基板の製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1302034A (zh) 1969-06-13 1973-01-04
JPS6272118A (ja) * 1985-09-25 1987-04-02 Fujitsu Ltd 半導体装置の製造方法
JP4301592B2 (ja) * 1998-01-16 2009-07-22 三菱マテリアル株式会社 窒化物半導体層付き基板の製造方法
JP2000315790A (ja) * 1999-04-30 2000-11-14 Mitsubishi Electric Corp 半導体装置およびその製造方法
WO2004010505A1 (ja) 2002-07-18 2004-01-29 Shin-Etsu Handotai Co.,Ltd. Ｓｏｉウェーハおよびその製造方法
US7012016B2 (en) * 2003-11-18 2006-03-14 Shangjr Gwo Method for growing group-III nitride semiconductor heterostructure on silicon substrate
US7339205B2 (en) * 2004-06-28 2008-03-04 Nitronex Corporation Gallium nitride materials and methods associated with the same
JP5168990B2 (ja) 2007-04-11 2013-03-27 信越半導体株式会社 半導体基板の製造方法
JP2011222842A (ja) 2010-04-13 2011-11-04 Shin Etsu Handotai Co Ltd エピタキシャルウェーハの製造方法、エピタキシャルウェーハ及び撮像用デバイスの製造方法
ITRM20120305A1 (it) * 2012-06-28 2013-12-29 Consiglio Nazionale Ricerche Procedimento per realizzare strati monoatomici di silicio cristallino su substrato di nitruro di silicio in forma cristallina beta
JP2014072428A (ja) 2012-09-28 2014-04-21 Fujitsu Ltd 半導体結晶基板の製造方法、半導体装置の製造方法、半導体結晶基板及び半導体装置
JP2015228432A (ja) * 2014-06-02 2015-12-17 信越半導体株式会社 Ｓｏｉウェーハの製造方法及び貼り合わせｓｏｉウェーハ
CN110085550A (zh) * 2018-01-26 2019-08-02 沈阳硅基科技有限公司 一种半导体产品用绝缘层结构及其制备方法

Also Published As

Publication number Publication date
JP2021072441A (ja) 2021-05-06
JP7224325B2 (ja) 2023-02-17
KR20220090506A (ko) 2022-06-29
EP4050132A4 (en) 2023-11-22
WO2021079745A1 (ja) 2021-04-29
CN114586132A (zh) 2022-06-03
EP4050132A1 (en) 2022-08-31
US20230154748A1 (en) 2023-05-18

Similar Documents

Publication Publication Date Title
TWI781132B (zh) 用於功率裝置之氮化鎵磊晶結構
KR100734239B1 (ko) 저머늄 온 절연체(ＧｅＯＩ)웨이퍼의 제조 방법
KR100925310B1 (ko) 고 완화율 및 저 적층 결함 밀도를 갖는 박막 ｓｇｏｉ웨이퍼를 형성하는 방법
US7985660B2 (en) Method for manufacturing soi wafer
TW202203473A (zh) 用於功率及rf應用的工程基板結構
US11011373B2 (en) Engineered substrate structures for power and RF applications
JP5065676B2 (ja) 基板上に歪層を製造する方法及び層構造
JP2006524426A (ja) 基板上に歪層を製造する方法と層構造
US8906786B2 (en) Method for producing single crystal SiC substrate and single crystal SiC substrate produced by the same
KR101340002B1 (ko) Ｓｏｉ웨이퍼의 제조방법
KR100611108B1 (ko) 박막 형성 방법
TW202134488A (zh) 半導體基板的製造方法及半導體基板
TWI457476B (zh) Method for manufacturing nitrogen compound semiconductor substrate and method for manufacturing nitrogen compound semiconductor substrate, single crystal SiC substrate and single crystal SiC substrate
WO2010073448A1 (ja) 貼り合わせウェーハの製造方法
JP2012243957A (ja) 貼り合わせｓｏｉウェーハの製造方法
KR101184380B1 (ko) 에피택셜 웨이퍼 제조 방법, 이를 적용한 에피택셜 웨이퍼,및 반도체 소자
JP2008166516A (ja) 半導体基板の製造方法
JP5031190B2 (ja) 歪みＳｉ層を有する半導体ウェーハの製造方法
JPH09306844A (ja) 半導体装置の製造方法および半導体装置
WO2022054429A1 (ja) Ｓｏｉウェーハの製造方法及びｓｏｉウェーハ
KR20230137921A (ko) 질화물 반도체기판 및 그의 제조방법
TW202040750A (zh) 形成rf絕緣體上覆矽元件之方法
JP2012151403A (ja) 半導体基板及びその製造方法
JP2009302097A (ja) 単結晶ＳｉＣ基板の製造方法および単結晶ＳｉＣ基板
JP2011138956A (ja) シリコン半導体基板の製造方法