TW201945573A - 成核層沉積方法 - Google Patents

成核層沉積方法 Download PDF

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TW201945573A
TW201945573A TW108112517A TW108112517A TW201945573A TW 201945573 A TW201945573 A TW 201945573A TW 108112517 A TW108112517 A TW 108112517A TW 108112517 A TW108112517 A TW 108112517A TW 201945573 A TW201945573 A TW 201945573A
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克里斯多夫 毛德
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德商愛思強歐洲公司
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Abstract

本發明係有關於一種將由第III及V主族之元素構成的成核層(3)直接沉積至由第IV主族之元素構成的基板(1)之表面(2)的方法，其中，在高於500℃的製程溫度下連同含有第III主族之元素的第一氣態起始材料一起將含有第V主族之元素的第二氣態起始材料送入包含基板(1)的製程室(8)。實質之處在於：至少在開始沉積時，連同第一及第二氣態起始材料一起將含有第IV主族之元素的第三氣態起始材料饋入製程室(8)，第三氣態起始材料在所沉積之III-V族晶體中具備N型摻雜效果，其中，在<1×1018cm-1的摻雜劑濃度時達到衰減下降。

Description

成核層沉積方法
本發明係有關於一種將由第III及V主族之元素構成的成核層直接沉積至由第IV主族之元素構成的基板之表面的方法，其中，在高於500℃的製程溫度下連同含有該第III主族之元素的第一氣態起始材料一起將含有該第V主族之元素的第二氣態起始材料送入包含該基板的製程室。至少在開始沉積該成核層時額外地將含有第V主族之元素的一氣態起始材料饋入該製程室，該起始材料在該層中引起摻雜。
本發明亦有關於一種以該方法製成之層序列，特別是HFET電晶體。
JP 2013030725 A中描述過一種同類型方法。除第III及V主族之元素外，亦將高濃度矽作為摻雜劑嵌入成核層，以便抑制機械彎曲。
HFET(高電子遷移率電晶體)或異質結構場效應電晶體係由某種層序列構成，其中首先往矽基板沉積由AlN構成之成核層。往成核層沉積由GaN構成之緩衝層。往緩衝層沉積AlGaN層作為活性層，使得在活性層與緩衝層之間形成二維電子氣。
US 9,917,156 B1描述過HEMT的替代製造方法。首先往矽基板沉積由矽構成之成核層。基於製程室中之附著在製程室壁 上的鎵、鋁或類似物質所引起的污染，矽成核層具有P型特性。透過為成核層摻雜金屬而對P型摻雜進行補償。往矽成核層沉積III-V族緩衝層。
在將III-V族成核層沉積至基板時，在成核層與基板之間形成具有較高導電性的界面。形成此種導電界面的主要原因在於沉積成核層(AlN層)時相對較高的溫度。但此種導電性的原因迄今為止未被完全查明。經由兩個鄰接層之界面的原子擴散同樣可能增強導電性。另一因素在於較強的內部電場，其可能導致電荷載子富集在界面上。此種成核層與基板間之界面內的導電性較高的現象會在轉換頻率較高時透過分散或衰減而嚴重影響元件特性。
文獻「Growth and studies of Si-doped AlN-layers,Journal of crystal growth 310(2008)4939-4941」描述了將矽摻雜AlN層沉積在由藍寶石構成的基板上，其中，將矽烷用作摻雜劑。
US 2002/0117104 A1及US 2003/0092263 A1描述過III及V族半導體層的沉積方法。
本發明之目的在於：提供用來特別是在基於GaN之HFET元件結構上減輕寄生分散效應的措施。
本發明用以達成上述目的之解決方案為在申請專利範圍中給出之方法及所主張之層結構。
附屬項不僅為獨立項之有利改良方案，亦為該目的之獨創解決方案。
本發明首先且實質上透過變更成核層生長時的沉積參數，來減輕分散或衰減。本發明首先且實質上提出：至少在開始 沉積該成核層時，連同該第一及第二氣態起始材料一起將第三氣態起始材料饋入該製程室，其中，該第三氣態起始材料起一定摻雜作用。將該第一及第二氣態起始材料饋入製程室，使得在基板表面上沉積一化學計量正確的多組分晶體，特別是III-V族晶體。在本發明的一種較佳技術方案中，該基板為具有(111)或(110)取向的矽基板。該第III主族之元素可為鋁，亦可為鎵或銦；該第V主族之元素可為氮，亦可為砷或磷。該第一氣態起始材料可為含有鋁、鎵或銦的有機金屬化合物，如TMAl。該第二氣態起始材料可為V族氫化合物，特別是氮氫化合物，如NH3。用來沉積較佳以1：1比例嵌入有鋁及氮的成核層的製程溫度為800至1200℃。在30至300mbar的總壓下實施該沉積製程。在一種較佳技術方案中，該第二氣態起始材料與該第一氣態起始材料，即較佳該氮化合物與該鋁化合物的莫耳比約為10至5000。透過該第一氣態起始材料(第III主族)之分壓而設定的成核層生長率較佳為0.01至2μm/h。本發明除該二形成晶體基質的氣態起始材料外，亦將第三氣態起始材料饋入製程室，該第三氣態起始材料引起N型摻雜，特別是較弱的N型摻雜，其中，該層中的摻雜劑濃度低於1×1019cm-3。此種具備摻雜劑功能的第三起始材料既可在沉積成核層的整個過程中饋入，又可僅部分地在開始沉積成核層時饋入。適宜之起始材料為矽或鍺的氫化合物。該第三氣態起始材料例如可符合結構式SinH2n+2或GenH2n+2。原則上可採用任何含有矽或鍺的氣態起始材料。較佳設定該第三氣態起始材料的分壓或者製程室中該第三氣態起始材料的氣流，使得摻雜劑水平處於為1×1017至1×1018cm-3的範圍內。在較佳之方法中，往矽基板表面施覆AlN成核層，使得連同TMAl及NH3一起將矽氫化合物或鍺氫化 合物，如矽烷或鍺酸鹽饋入製程室。
在本發明的一種改良方案中，往該成核層沉積緩衝層，該緩衝層由第III族氮化物之材料系統構成，特別是由AlN、GaN、InN、AlGaN、InGaN或AlInGaN構成。其他層同樣可被摻雜。亦可將矽用作摻雜劑。可進一步往該至少一個緩衝層沉積一或多個活性層，該等活性層需要用來產生異質結構場效應電晶體，其具有例如在一活性層與緩衝層之間或者在兩個活性層之間的二維電子氣。GaN/AlN、GaN/AlGaN、GaN/AlInN、InGaN/AlN、InGaN/GaN及/或InGaN/AlInN異質結構特別適用於此。
針對以上述方式沉積成核層的結構所作實驗引起了大幅衰減。在摻雜劑水平為最大1018cm-3時，在Si基板上約200nm厚AlN層上施覆的共面波導所測得之高頻衰減(正向傳輸S21)具有小得多的衰減值。
本發明亦有關於一種以該方法製成之層序列，該層序列由沉積至矽基板的III-V族成核層構成，該成核層被第V主族之元素摻雜。該成核層承載至少一個由III-V族材料構成的緩衝層。在緩衝層與活性層之間產生二維電子氣。
1‧‧‧基板
2‧‧‧表面
3‧‧‧成核層
4‧‧‧緩衝層
5‧‧‧界面
6‧‧‧活性層
7‧‧‧反應器
8‧‧‧製程室
9‧‧‧基座
10‧‧‧加熱裝置
11‧‧‧氣體入口構件
下面結合圖式對本發明之一實施例進行說明。其中：圖1為高電子遷移率電晶體之層結構的示意圖，圖2為用於沉積圖1所示層序列之CVD反應器的示意圖，及圖3為在AlN層中具有不同摻雜劑之AlN/Si結構上的共面波導的S21衰減參數。
圖1為HEMT結構的示意圖，其中，往矽基板1之表面2沉積了成核層3。在沉積成核層3前，以適宜方式對矽基板1之表面2進行準備。為此，將矽基板1置入CVD反應器7的製程室8中。在通常為50至800mbar的總壓下，在氫氣氛中將該矽基板加熱至900至1200℃。在此準備步驟期間，將該基板之天然的SiO2層熱移除。隨後在較低或較高之溫度以及有所變化的壓力條件下，例如以TMAl或NH3或其他氣態起始材料對基板進行可選之進一步預處理。
透過同時導入TMAl及NH3來對AlN成核層3進行真正意義上的磊晶施覆。可在多階段製程中沉積成核層3，其中，可改變溫度、壓力及氣流。沉積成核層3的溫度範圍通常為800至1200℃，其中，製程室8內的總壓為30至300mbar。
經由氣體入口構件11將該等氣態起始材料連同載氣，例如氫氣一起饋入製程室8。在製程室8中，在被加熱裝置10加熱之基板座9上設有一或多個塗佈有成核層3的基板1。經由氣體入口構件11，以V族起始材料與III族起始材料的莫耳比為10至5000的方式，將氣態前驅體，特別是TMAl及NH3饋入製程室8。設定該等氣態起始材料的流率，使得AlN成核層3的生長率為0.01至2μm/h。
發明實質之處在於：在成核層3之沉積期間，至少在開始沉積成核層3時，將引起較弱N型導電性的另一氣態起始材料饋入製程室8。此種第三氣態起始材料較佳係指結構式為SinH2n+2或GenH2n+2的矽烷或鍺。
III-V族成核層3的該額外N型摻雜會引起前述分散效應的大幅減輕以及衰減的減輕，參閱圖3中的實例 a)非摻雜的AlN，b)1×1018cm-1摻雜的AlN，或者c)2×1017cm-1摻雜的AlN，d)5×1017cm-1摻雜的AlN。
圖3示出摻雜劑濃度為2×1017cm-1及5×1017cm-1時衰減的大幅減輕，而在1×1018cm-1的更高摻雜時，衰減重新增強並大體達到非摻雜AlN的值。
結果表明，在較高摻雜劑濃度時看不出期望效果。
隨後，以習知方式首先往成核層3沉積GaN緩衝層4，再沉積活性AlGaN層6，使得在緩衝層4與活性層6之間的界面5上形成二維電子氣。額外地以習知方式製成柵極接點、源極接點及漏極接點。
前述實施方案係用於說明本申請整體所包含之發明，該等發明至少透過以下特徵組合分別獨立構成相對於先前技術之改良方案，其中，此等特徵組合中的兩項、數項或其全部亦可相互組合，即： 一種方法，其特徵在於：至少在開始沉積該成核層3時，連同該第一及第二氣態起始材料一起將含有第IV主族之元素的第三氣態起始材料饋入該製程室8。
一種方法，其特徵在於：在該製程室8中，該第三氣態起始材料的分壓小於該第一及第二氣態起始材料的分壓至少十倍，以及/或者輸入該製程室8之該第三氣態起始材料的分壓或質量流量係選擇使其引起最大1×1018cm-3的摻雜。
一種方法，其特徵在於：該製程溫度為800℃至1200 ℃，較佳為950℃至1050℃。
一種方法，其特徵在於：該成核層3係在30至300mbar的總壓下沉積。
一種方法，其特徵在於：該第二氣態起始材料與該第一氣態起始材料的莫耳比為10至5000。
一種方法，其特徵在於：添加該第三氣態起始材料引起該成核層之範圍為1×1017至5×1018cm-3的N型摻雜。
一種方法，其特徵在於：該基板(1)由矽或鍺構成，以及/或者該第三氣態起始材料為SinH2n+2或GenH2n+2或含有矽或鍺的另一氣態起始材料。
一種方法，其特徵在於：該第III主族之元素為Al，以及/或者該第一氣態起始材料為TMAl。
一種方法，其特徵在於：該第V主族之元素為氮，以及/或者該第二氣態起始材料為NH3。
一種方法，其特徵在於：往該成核層3沉積特別是由AlN構成之緩衝層4，並且往該緩衝層4沉積活性層6，使得在該活性層6與緩衝層4之間的界面5上形成二維電子氣，以及/或者該第三氣態起始材料的饋入降低高頻衰減的衰減值。
一種層序列，其特徵在於：在由第IV主族之元素構成的基板1之表面2上沉積有由第IV及V主族之元素構成的成核層3，該成核層至少在其緊鄰該表面2的區域內摻雜有第IV主族之元素。
一種層序列，其特徵在於：在該成核層3上沉積有至少一個緩衝層4，在該緩衝層上又沉積有活性層6，使得在該緩衝層4與該活性層6之間的界面5上形成二維電子氣。
所有已揭露特徵(作為單項特徵或特徵組合)皆為發明本質所在。故本申請之揭露內容亦包含相關/所附優先權檔案(在先申請副本)所揭露之全部內容，該等檔案所述特徵亦一併納入本申請之申請專利範圍。附屬項以其特徵對本發明針對先前技術之改良方案的特徵予以說明(亦無相關請求項之特徵)，其目的主要在於在該等請求項基礎上進行分案申請。每個請求項中所給出的發明可進一步具有前述說明中給出的、特別是以符號標示且/或在符號說明中給出的特徵中之一或數項。本發明亦有關於如下設計形式：前述說明中所述及之個別特徵不實現，特別是對於具體用途而言為非必需的或者可被技術上具有相同功效的其他構件所替代之特徵。

Claims (12)

  1. 一種將由第III及V主族之元素構成的成核層(3)直接沉積至由第IV主族之元素構成的基板(1)之表面(2)的方法，其中，在高於500℃的製程溫度下連同含有該第III主族之元素的第一氣態起始材料一起將含有該第V主族之元素的第二氣態起始材料送入包含該基板(1)的製程室(8)，其中，至少在開始沉積該成核層(3)時，連同該第一及第二氣態起始材料一起將含有第IV主族之元素的第三氣態起始材料饋入該製程室(8)，其特徵在於：輸入該製程室(8)之該第三氣態起始材料的分壓或質量流量係選擇使其引起最大1×10 18cm -3的摻雜。
  2. 如請求項1之方法，其中，該製程溫度為800℃至1200℃或者為950℃至1050℃。
  3. 如請求項1之方法，其中，該成核層(3)係在30至300mbar的總壓下沉積。
  4. 如請求項1之方法，其中，該第二氣態起始材料與該第一氣態起始材料的莫耳比為10至5000。
  5. 如請求項1之方法，其中，添加該第三氣態起始材料引起該成核層之範圍為1×10 17至1×10 18cm -3的N型摻雜。
  6. 如請求項1之方法，其中，該基板(1)由矽或鍺構成，以及/或者該第三氣態起始材料為Si nH 2n+2或Ge nH 2n+2或含有矽或鍺的另一氣態起始材料。
  7. 如請求項1之方法，其中，該第III主族之元素為Al，以及/或者該第一氣態起始材料為TMAl。
  8. 如請求項1之方法，其中，該第V主族之元素為氮，以及/或者 該第二氣態起始材料為NH 3。
  9. 如請求項1之方法，其中，往該成核層(3)沉積緩衝層(4)，並且往該緩衝層(4)沉積活性層(6)，使得在該活性層(6)與緩衝層(4)之間的界面(5)上形成二維電子氣，以及/或者該第三氣態起始材料的饋入降低高頻衰減的衰減值。
  10. 一種以請求項1之方法製成之層序列，其特徵在於：在由第IV主族之元素構成的基板(1)之表面(2)上沉積有由第IV及V主族之元素構成的成核層(3)，該成核層至少在其緊鄰該表面(2)的區域內摻雜有第IV主族之元素。
  11. 如請求項10之層序列，其中，在該成核層(3)上沉積有至少一個緩衝層(4)，在該緩衝層上又沉積有活性層(6)，使得在該緩衝層(4)與該活性層(6)間的界面(5)上形成二維電子氣。
  12. 如請求項9之方法，其中，該緩衝層由AlN構成。
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