TW201820473A - 半導體裝置 - Google Patents
半導體裝置 Download PDFInfo
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Abstract
一種半導體裝置,能夠減少引線之連接不良,能夠提高可靠性。半導體裝置(1)包括半導體基板(2)、第一金屬層(4)、絕緣膜層(6)、有機物層(7)以及第二金屬層(8)。第一金屬層(4)、絕緣膜層(6)、有機物層(7)以及第二金屬層(8)在半導體基板(2)之表面(2A)上依次層疊。第一金屬層(4)和第二金屬層(8)通過形成於絕緣膜層(6)和有機物層(7)之通孔(6A、7A)而電連接。在第二金屬層(8)之、與通孔(6A、7A)對應之位置處形成有電極墊(8A)。在半導體基板(2)之表面(2A)和第一金屬層(4)之間之介面處形成有貼片部(10),該貼片部(10)位於通孔(6A、7A)之正下方且形成為剖面呈梯形之形狀。
Description
本發明涉及一種在半導體基板上形成有有機物絕緣層之半導體裝置。
一般地,已知一種在半導體基板之表面形成有絕緣層之半導體裝置(例如,參考專利文獻1)。專利文獻1所記載之半導體裝置包括半導體基板和形成於半導體基板之表面之層間絕緣膜。此時,層間絕緣膜被下層配線和上層配線夾著,並且通過形成於層間絕緣膜之貫通孔而使下層配線和上層配線電連接。
[現有技術文獻]
[專利文獻]
專利文獻1:日本專利特開平7-153756號公報
但是,在堵塞貫通孔之位置處形成有由上層配線構成之電極墊之情況下,有時由於貫通孔會在電極墊之一部分產生凹陷。在對這樣的電極墊進行引線接合時,有時會由於凹陷而產生連接不良,存在在引線和 電極墊之間產生機械性連接強度之降低以及電阻之增加這些問題。
另一方面,專利文獻1中公開了在貫通孔之正下方配置高度差緩衝用虛擬圖案之結構。但是,虛擬圖案是用於實現由無機材料構成之、膜厚較薄之層間絕緣膜之平坦化者。因此,例如沒有考慮由有機材料構成之膜厚較厚之層間絕緣膜,在堵塞深度尺寸較大之貫通孔來形成電極墊時,該電極墊未必能夠被平坦化。
此外,專利文獻1中所記載之虛擬圖案形成為剖面呈四邊形之形狀。在這種情況下,在覆蓋虛擬圖案來形成金屬層或絕緣層時,四邊形剖面之拐角部分有難以形成金屬層等之傾向,因而存在可靠性容易降低之問題。
本發明是鑒於上述現有技術問題而形成者,本發明之目的是提供一種能夠減少引線之連接不良並且能夠提高可靠性之半導體裝置。
為解決上述問題,申請專利範圍第1項之發明是:一種半導體裝置,該半導體裝置在半導體基板之表面層疊有第一金屬層、無機物絕緣層、有機物絕緣層以及第二金屬層,其中,前述有機物絕緣層形成有由貫通孔或有底孔構成之凹部,從前述半導體基板之表面到前述有機物絕緣層之凹部為止之厚度方向之任意部位處形成有使前述凹部之底面隆起之貼片部,前述貼片部形成為底面之面積比上表面之面積大之、剖面呈梯形之形狀。
申請專利範圍第2項之發明是:前述貼片部之梯形剖面之底邊和斜邊所成之傾斜角度被設定為20°以上並且70°以下。
申請專利範圍第3項之發明是:前述凹部由貫通孔形成,前述貼片部具有面積比前述貫通孔之開口面積大之底面。
前述第二金屬層具有電極墊,該電極墊之表面側係在與上述有機物絕緣層之凹部對應之位置處露出。
根據申請專利範圍第1項之發明,由於在從半導體基板之表面到有機物絕緣層之凹部為止之厚度方向之任意部位處形成有貼片部,因此能夠藉由貼片部使凹部之底面隆起。藉此,在堵塞凹部來形成第二金屬層時,能夠使第二金屬層之表面之凹陷緩和。因此,在對第二金屬層進行引線接合時,能夠減少引線之連接不良。此外,由於貼片部形成為剖面呈梯形之形狀,因此即使在覆蓋貼片部來形成金屬層和絕緣層時,也能夠無間斷且連續地形成金屬層等,並且能夠抑制金屬層等之缺陷,能夠提高可靠性。
根據申請專利範圍第2項之發明,剖面呈梯形之貼片部之底邊和斜邊所成之傾斜角度被設定為20°以上並且70°以下。因此,由於貼片部之剖面拐角部分之角度較大,因而即使在覆蓋貼片部來形成金屬層和絕緣層時,也能夠抑制金屬層和絕緣層之缺陷。
根據申請專利範圍第3項之發明,由於貼片部具有面積比貫通孔之開口面積大之底面,因此能夠使貫通孔之底面整體隆起。因此,能夠在與貫通孔對應之部位整體處,使第二金屬層之表面之凹陷緩和。
根據申請專利範圍第4項之發明,第二金屬層具有電極墊,在與有機物絕緣層之凹部對應之位置處使上述電極墊之表面側露出。因 此,能夠使電極墊之表面平坦化,在對電極墊進行引線接合時,能夠減少引線之連接不良。
1、21‧‧‧半導體裝置
2‧‧‧半導體基板
2A‧‧‧表面
2B‧‧‧半導體層
3‧‧‧半導體元件
4、22、24‧‧‧第一金屬層
6、23、25‧‧‧絕緣膜層(無機物絕緣層)
7、26‧‧‧有機物層(有機物絕緣層)
8、27‧‧‧第二金屬層(外部連接用)
10、29、31、32‧‧‧貼片部
10A、29A‧‧‧底面
10B、29B‧‧‧上表面
圖1是表示第一實施形態之半導體裝置之剖面圖。
圖2是表示第一實施形態之半導體裝置之主要部分放大剖面圖。
圖3是表示第二實施形態之半導體裝置之主要部分放大剖面圖。
以下,參照附圖,對本發明之實施方式之半導體裝置進行詳細說明。本發明之半導體裝置應用於對例如MHz頻帶或GHz頻帶這樣的高頻信號進行放大之功率放大器。
圖1和圖2中示出了第一實施形態之半導體裝置1。半導體裝置1包括半導體基板2、第一金屬層4、絕緣膜層6、有機物層7、第二金屬層8以及貼片部10。第一金屬層4、絕緣膜層6、有機物層7以及第二金屬層8在半導體基板2之表面2A上依次層疊。
半導體基板2採用例如砷化鎵(GaAs)這樣的半導體材料並呈平板狀形成。並且,半導體基板2也可以藉由例如磷化銦(InP)、氮化鎵(GaN)等這樣其他Ⅲ-Ⅴ族的化合物半導體來形成。半導體基板2可以採用例如硒化鋅(ZnSe)這樣Ⅱ-Ⅵ族的化合物半導體來形成,也可以採用例如碳化矽(SiC)、矽鍺(SiGe)這樣Ⅳ族的化合物半導體來形成。此外,半導體基板2不限定於化合物半導體,也可以藉由矽(Si)、鍺(Ge)這樣的Ⅳ族單個元素之半導體來形成。
半導體基板2之表面2A形成有例如由砷化鎵(GaAs)、砷化鋁鎵(AlGaAs)等構成之半導體層2B。半導體層2B可以摻雜有雜質,也可以去除雜質。此外,半導體層2B可以是一層,也可以是多層(例如兩層)。
半導體元件3配置在半導體基板2之表面2A側。半導體元件3形成為包括例如半導體層2B。半導體元件3可以是二極體、場效應電晶體等這樣的主動元件,也可以是電阻、電容器等這樣的被動元件。半導體元件3通常在半導體基板2處設置有多個(僅圖示一個)。上述多個半導體元件3藉由例如第一金屬層4和第二金屬層8中之至少任意一個而彼此電連接。
第一金屬層4配置在比有機物層7靠近半導體基板2之位置處。具體而言,第一金屬層4形成於半導體2之表面2A上方。第一金屬層4採用例如金(Au)等這樣的導電性金屬材料來形成。第一金屬層4具有例如形成半導體元件3之電極、將多個半導體元件3間電連接等這樣的各種功能。藉此,半導體基板2形成有包括半導體元件3之各種電路5(例如放大電路等)。因此,半導體基板2是形成電路5之電路基板。
絕緣膜層6覆蓋半導體元件3並且形成在半導體基板2之表面2A上方。絕緣膜層6構成無機物絕緣層。因此,絕緣膜層6採用例如氮化矽膜等這樣的具有絕緣性之無機材料來形成。在絕緣膜層6,在例如與第一金屬層4對應之位置處形成有由貫通孔(貫穿孔)構成之通孔6A。絕緣膜層6構成層間絕緣層而使半導體基板2之表面2A和第二金屬層8之間電絕緣。
並且,絕緣膜層6不限定於氮化矽膜(例如Si3N4,SiN等),也可以採用氧化矽膜(例如SiO2,SiO等)、氮氧化矽膜(例如SiON等)中之任一個來形成。
有機物層7覆蓋絕緣膜層6並且形成在半導體基板2上。有機物層7和絕緣膜層6一同構成層間絕緣層。有機物層7構成有機物絕緣層。因此,有機物層7採用例如聚醯亞胺(PI)、苯並環丁烯(BCB)、聚苯並噁唑(PBO)等這樣的具有絕緣性之有機材料來形成。有機物層7藉由將各種樹脂材料以旋塗之方式塗布在絕緣膜層6之表面而形成。此時,相比絕緣膜層6之膜厚,有機物層7之膜厚有變大之傾向。有機物層7例如用於使半導體裝置1之表面側整體平坦化,並且使第一金屬層4和第二金屬層8之間之層間電容降低。
在有機物層7,在與第一金屬層4對應之位置處形成有由貫通孔(貫穿孔)構成之通孔7A。因此,通孔7A構成有機物層7之凹部。此時,通孔7A配置在與通孔6A對應之位置處。因此,在省略第二金屬層8之狀態下,在通孔7A內露出有第一金屬層4之表面。並且,通孔6A、7A不需要具有相同大小(開口面積),也可以彼此是不同之大小。因此,有機物層7之通孔7A例如可以比絕緣膜層6之通孔6A大。
第二金屬層8配置在比有機物層7遠離半導體基板2之位置處。上述第二金屬層8構成與半導體基板2不接觸之其他金屬層,並且形成於有機物層7之表面上方。第二金屬層8採用例如導電性金屬材料來形成。第二金屬層8具有透過第一金屬層4將半導體元件3和外部之間電連接等這樣的各種功能。因此,第二金屬層8通過通孔6A、7A與第一金屬 層4電連接。此外,第二金屬層8形成有位於與通孔6A、7A對應之部位之電極墊8A。為了使電極墊8A藉由引線接合等與外部連接,因此使上述電極墊8A之表面露出。
鈍化膜9覆蓋第二金屬層8並且設置在半導體基板2處。鈍化膜9不僅覆蓋第二金屬層8,還覆蓋有機物層7、半導體層2B等。鈍化膜9採用例如氮化矽膜、氧化矽膜、氮氧化矽膜等這樣的具有絕緣性之無機材料來形成。此外,鈍化膜9形成有位於與電極墊8A對應之部位並且使電極墊8A露出之開口部9A。
貼片部10形成於從半導體基板2之表面2A到有機物層7之通孔7A為止之厚度方向之任意部位處。具體而言,貼片部10設置在半導體基板2和第一金屬層4之間之介面處。此時,貼片部10在被半導體基板2和第一金屬層4夾著之狀態下與半導體基板2和第一金屬層4接觸。因此,貼片部10例如採用與半導體基板2和第一金屬層4中之任意一方相同之材料來形成。具體而言,貼片部10採用導電性之金屬材料或與半導體基板2相同之半導體材料來形成。
貼片部10之平面形狀是與例如通孔7A之開口部相同之形狀(例如圓形、橢圓形、多邊形等)。此外,貼片部10形成為底面10A之面積比上表面10B之面積大之剖面呈梯形之形狀。此時,貼片部10之底邊和斜邊所成之傾斜角度θ被設定為20°以下且70°以下,較為理想之是,上述傾斜角度θ被設定為30°以上且60°以下。貼片部10具有面積比通孔7A之開口面積大之底面10A。貼片部10使作為通孔7A之底面之第一金屬層4在通孔7A之位置處隆起。
並且,貼片部10之底面10A之面積可以比通孔7A之開口部之面積小。若考慮貼片部10和通孔7A之位置偏差公差等,較為理想的是,貼片部10之底面10A之面積被設定為是例如通孔7A之開口部之面積之一倍以上且小於三倍。
此外,貼片部10可以被設定為與通孔7A之開口部具有相同程度之形狀及大小。在這種情況下,貼片部10之底面10A之面積可以形成為比通孔7A之開口面積大,貼片部10之上表面10B之面積可以形成為比通孔7A之開口面積小。
如此,根據第一實施形態,在從半導體基板2之表面2A到有機物層7之通孔7A為止之厚度方向之任意部位處形成有貼片部10。具體而言,貼片部10設置在半導體基板2和第一金屬層4之間之介面處。因此,能夠藉由貼片部10使作為通孔7A之底面之第一金屬層4之表面隆起。藉此,在堵塞通孔7A而形成第二金屬層8時,能夠使第二金屬層8之表面之凹陷緩和。
此時,第二金屬層8具有電極墊8A,該電極墊8A在與有機物層7之通孔7A對應之位置處使其表面側露出。因此,能夠使電極墊8A之表面平坦化,在對電極墊8A進行引線接合時,能夠減少引線之連接不良。
此處,在使貼片部10形成為剖面呈矩形之形狀(長方形狀)之情況下,剖面拐角部分a之角度為90°左右。在這種情況下,若形成第一金屬層4來覆蓋貼片部10,則在剖面拐角部分a之周圍有難以形成第一金屬層4之傾向,因而使臺階覆蓋性變差,有時第一金屬層4會產生缺陷。
與此相對,本實施方式之貼片部10形成為剖面呈梯形之形狀。此時,剖面呈梯形之形狀之貼片部10被設定為底邊和斜邊所成之傾斜角度θ是20°以上並且70°以下。因此,貼片部10之剖面拐角部分a是角度比90°大之鈍角。藉此,即使在覆蓋貼片部10來形成第一金屬層4時,也能夠無間斷且連續地形成第一金屬層4。其結果是,能夠抑制第一金屬層4之缺陷,能夠提高可靠性。
此外,由於貼片部10具有面積比通孔7A之開口面積大之底面,因此能夠使通孔7A之底面整體隆起。因此,能夠在與通孔7A對應之部位整體處,使第二金屬層8之表面之凹陷緩和。
接著,在圖3中示出了本發明之第二實施形態之半導體裝置21。半導體裝置21之特徵在於,包括多層第一金屬層和絕緣膜層。並且,在對半導體裝置21進行說明時,對與第一實施形態之半導體裝置1相同之結構標注相同之符號並省略其說明。
半導體裝置21包括半導體基板2、第一金屬層22、24、絕緣膜層23、25、有機物層26、第二金屬層27。半導體基板2之表面2A上形成有半導體層2B。
第一金屬層22構成靠近半導體基板2之金屬層,並且形成於半導體基板2之表面2A上方。第一金屬層22構成為與第一實施形態之第一金屬層4基本相同,採用例如導電性金屬材料來形成。第一金屬層22具有例如形成半導體元件3之電極、將多個半導體元件3間電連接等這樣的各種功能。藉此,半導體基板2上形成有包括半導體元件3之各種電路5。
絕緣膜層23覆蓋半導體元件3並且形成於半導體基板2之 表面2A上方。絕緣膜層23構成無機物絕緣層。因此,絕緣膜層23構成為與第一實施形態之絕緣膜層6基本相同,採用例如氮化矽膜等這樣具有絕緣性的無機材料來形成。絕緣膜層23構成層間絕緣層而使第一金屬層22和其他第一金屬層24之間電絕緣。
其他第一金屬層24形成於絕緣膜層23之表面上方。第一金屬層24採用例如導電性金屬材料來形成。第一金屬層24具有例如將第一金屬層22和第二金屬層27之間電連接、跨越第一金屬層22而將多個半導體元件3之間電連接等這樣的各種功能。
其他絕緣膜層25覆蓋半導體元件3並且形成於半導體基板2之表面2A上方。絕緣膜層25和絕緣膜層23同樣地構成無機物絕緣層。因此,絕緣膜層25構成為與第一實施形態之絕緣膜層6基本相同,採用例如氮化矽膜等這樣具有絕緣性的無機材料來形成。在絕緣膜層25,在例如與第一金屬層24對應之位置處形成有由貫穿孔構成之通孔25A。絕緣膜層25構成層間絕緣層而使第一金屬層24和第二金屬層27之間電絕緣。
有機物層26覆蓋絕緣膜層25並且形成於半導體基板2。有機物層26和絕緣膜層23、25一同構成層間絕緣層。有機物層26構成有機物絕緣層。因此,有機物層26與第一實施形態之有機物層7同樣採用具有絕緣性之有機材料來形成。此時,相比絕緣膜層23、25之膜厚,有機物層26之膜厚有變大的傾向。有機物層26例如用於使半導體裝置21之表面側整體平坦化,並且使第一金屬層22、24和第二金屬層27之間之層間電容降低。在有機物層26,在與第一金屬層24對應之位置處形成有由貫穿孔構成之通孔26A。此時,通孔26A配置在與通孔25A對應之位置處。因此, 在省略第二金屬層27之狀態下,在通孔26A內露出有第一金屬層24之表面。並且,通孔25A、26A不需要具有相同大小(開口面積),也可以彼此是不同大小。因此,有機物層26之通孔26A例如可以比絕緣膜層25之通孔25A大。
第二金屬層27構成與半導體基板2不接觸之其他金屬層,上述第二金屬層27位於有機物層26之表面上方,並且形成於半導體基板2處。第二金屬層27採用例如導電性金屬材料來形成。第二金屬層27具有透過第一金屬層22、24等將半導體元件3和外部之間電連接等這樣的各種功能。第二金屬層27通過通孔25A、26A與第一金屬層24電連接。此外,第二金屬層27形成有位於與通孔25A、26A對應之部位之電極墊27A。為了使電極墊27A藉由引線接合等與外部連接,因此使上述電極墊27A之表面露出。
鈍化膜28覆蓋第二金屬層27並且設置在半導體基板2處。鈍化膜28不僅覆蓋第二金屬層27,還覆蓋有機物層26、半導體層2B等。鈍化膜28採用例如氮化矽膜、氧化矽膜、氮氧化矽膜等這樣的具有絕緣性之無機材料來形成。此外,鈍化膜28形成有位於與電極墊7A對應之部位並且使電極墊27A露出之開口部28A。
貼片部29形成為與第一實施形態之貼片部10基本相同。因此,貼片部29形成於從半導體基板2之表面2A到有機物層26之通孔26A為止之厚度方向之任意部位處。具體而言,貼片部29設置在半導體基板23和第一金屬層24之間之介面處。此時,貼片部29在被絕緣膜層23和第一金屬層24夾著之狀態下與絕緣膜層23和第一金屬層24接觸。因此,貼片 部29例如採用與半導體基板23和第一金屬層24中之任意一方相同之材料來形成。具體而言,貼片部29採用導電性之金屬材料或絕緣材料來形成。
貼片部29形成為底面29A之面積比上表面29B之面積大之、剖面呈梯形之形狀。此外,貼片部29被設定為底邊和斜邊所成之傾斜角度是例如20°以上並且70°以下。貼片部29具有面積比通孔26A之開口面積大之底面29A。貼片部29使作為通孔26A之底面之第一金屬層24在通孔26A之位置處隆起。
如此,第二實施形態具有與第一實施形態基本相同之作用效果。
並且,在第二實施形態中,貼片部29設置在絕緣膜層23和第一金屬層24之間之介面處。本發明不限於上述情況,只要貼片部29形成於從半導體基板2之表面2A到有機物層26之通孔26A為止之厚度方向之任意部位處即可。因此,如圖3中雙點劃線所示,也可在半導體基板2和第一金屬層22之間之介面處設置貼片部31,也可在第一金屬層22和絕緣膜層23之間之介面處設置貼片部32。
在上述各實施方式中,相對於從半導體基板2之表面2A到有機物層7、26之通孔7A、26A為止之厚度方向設置單個貼片部10、29。本發明不限於上述情況,可以相對於厚度方向設置多個貼片部。即,在圖3中,可以選擇三個貼片部29、31、32中之任意兩個進行設置,也可以設置全部三個。並且,在設置多個貼片部之情況下,上述貼片部之厚度尺寸和外形尺寸(底面之面積等)可以設定為彼此相同之值,也可以設定為彼此不同之值。
在上述各實施方式中,藉由沿厚度方向貫穿地設置在有機物層7、26中之通孔7A、26A來形成凹部。本發明不限於上述情況,也可藉由例如沿厚度方向非貫穿地設置在有機物層中之有底孔來形成凹部。
此外,在上述各種實施方式中,以半導體裝置1、21應用於功率放大器之情況為例進行了說明。本發明不限於上述情況,半導體裝置也可應用於太陽能電池這樣的受光元件,也可應用於鐳射二極體(LD)、發光二極體(LED)這樣的發光元件,也可以應用於具有受光元件和發光元件兩者之光學感測器。
Claims (5)
- 一種半導體裝置,該半導體裝置在半導體基板之表面層疊有第一金屬層、無機物絕緣層、有機物絕緣層以及第二金屬層,其特徵在於,於前述有機物絕緣層形成有由貫通孔或有底孔構成之凹部,在從前述半導體基板之表面至前述有機物絕緣層之凹部為止之厚度方向之任一部位處形成有使前述凹部之底面隆起之貼片部,前述貼片部形成為底面之面積比上表面之面積大之剖面呈梯形之形狀。
- 如申請專利範圍第1項之半導體裝置,其中,前述貼片部,設定為梯形剖面之底邊和斜邊所成之傾斜角度為20°以上且70°以下。
- 如申請專利範圍第1或2項之半導體裝置,其中,前述凹部由貫通孔形成,前述貼片部具有面積比前述貫通孔之開口面積大之底面。
- 如申請專利範圍第1或2項之半導體裝置,其中,前述第二金屬層具有電極墊,該電極墊之表面側係在與前述有機物絕緣層之凹部對應之位置處露出。
- 如申請專利範圍第3項之半導體裝置,其中,前述第二金屬層具有電極墊,該電極墊之表面側係在與上述有機物絕緣層之凹部對應之位置處露出。
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