TW201803084A - 半導體裝置的元件電路 - Google Patents

半導體裝置的元件電路

Info

Publication number
TW201803084A
TW201803084A TW106134477A TW106134477A TW201803084A TW 201803084 A TW201803084 A TW 201803084A TW 106134477 A TW106134477 A TW 106134477A TW 106134477 A TW106134477 A TW 106134477A TW 201803084 A TW201803084 A TW 201803084A
Authority
TW
Taiwan
Prior art keywords
diffusion
gate electrode
fin
layout
pitch
Prior art date
Application number
TW106134477A
Other languages
English (en)
Chinese (zh)
Inventor
法克斯達利爾
Original Assignee
泰拉創新股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 泰拉創新股份有限公司 filed Critical 泰拉創新股份有限公司
Publication of TW201803084A publication Critical patent/TW201803084A/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H10D30/0243—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET] using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide stability
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66—Vertical DMOS [VDMOS] FETs
    • H10D30/663—Vertical DMOS [VDMOS] FETs having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/903—Masterslice integrated circuits comprising field effect technology
    • H10D84/907—CMOS gate arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
TW106134477A 2012-01-13 2013-01-14 半導體裝置的元件電路 TW201803084A (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201261586387P 2012-01-13 2012-01-13
US61/586,387 2012-01-13
US201261589224P 2012-01-20 2012-01-20
US61/589,224 2012-01-20

Publications (1)

Publication Number Publication Date
TW201803084A true TW201803084A (zh) 2018-01-16

Family

ID=48781972

Family Applications (4)

Application Number Title Priority Date Filing Date
TW106134477A TW201803084A (zh) 2012-01-13 2013-01-14 半導體裝置的元件電路
TW106104453A TWI608593B (zh) 2012-01-13 2013-01-14 半導體裝置的元件電路
TW102101384A TWI552307B (zh) 2012-01-13 2013-01-14 半導體裝置、製造該半導體裝置的方法、及具有用於提供該半導體裝置佈局之電腦可執行程式指令儲存於其上的資料儲存裝置
TW105125226A TWI581403B (zh) 2012-01-13 2013-01-14 半導體裝置、製造該半導體裝置的方法、及具有用於提供該半導體裝置佈局之電腦可執行程式指令儲存於其上的資料儲存裝置

Family Applications After (3)

Application Number Title Priority Date Filing Date
TW106104453A TWI608593B (zh) 2012-01-13 2013-01-14 半導體裝置的元件電路
TW102101384A TWI552307B (zh) 2012-01-13 2013-01-14 半導體裝置、製造該半導體裝置的方法、及具有用於提供該半導體裝置佈局之電腦可執行程式指令儲存於其上的資料儲存裝置
TW105125226A TWI581403B (zh) 2012-01-13 2013-01-14 半導體裝置、製造該半導體裝置的方法、及具有用於提供該半導體裝置佈局之電腦可執行程式指令儲存於其上的資料儲存裝置

Country Status (8)

Country Link
EP (1) EP2803077A4 (de)
JP (3) JP2015506589A (de)
KR (1) KR101913457B1 (de)
CN (2) CN104303263B (de)
AU (4) AU2013207719B2 (de)
SG (2) SG11201404024YA (de)
TW (4) TW201803084A (de)
WO (1) WO2013106799A1 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI724459B (zh) * 2018-07-16 2021-04-11 台灣積體電路製造股份有限公司 產生包含突起接腳單元區之佈局圖的方法及其半導體元件
US12040271B2 (en) 2019-10-21 2024-07-16 Tokyo Electron Limited Power delivery network for CFET with buried power rails

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015025441A1 (ja) 2013-08-23 2015-02-26 パナソニック株式会社 半導体集積回路装置
CN105531813B (zh) * 2013-09-04 2018-10-12 株式会社索思未来 半导体装置
JP6640965B2 (ja) * 2014-08-18 2020-02-05 ルネサスエレクトロニクス株式会社 半導体装置
JP6449082B2 (ja) 2014-08-18 2019-01-09 ルネサスエレクトロニクス株式会社 半導体装置
US9478541B2 (en) * 2014-09-08 2016-10-25 Qualcomm Incorporated Half node scaling for vertical structures
US9607988B2 (en) * 2015-01-30 2017-03-28 Qualcomm Incorporated Off-center gate cut
US9640480B2 (en) * 2015-05-27 2017-05-02 Qualcomm Incorporated Cross-couple in multi-height sequential cells for uni-directional M1
US10177127B2 (en) * 2015-09-04 2019-01-08 Hong Kong Beida Jade Bird Display Limited Semiconductor apparatus and method of manufacturing the same
US10541243B2 (en) 2015-11-19 2020-01-21 Samsung Electronics Co., Ltd. Semiconductor device including a gate electrode and a conductive structure
US9748389B1 (en) 2016-03-25 2017-08-29 Taiwan Semiconductor Manufacturing Co., Ltd. Method for semiconductor device fabrication with improved source drain epitaxy
US10262981B2 (en) * 2016-04-29 2019-04-16 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit, system for and method of forming an integrated circuit
US10366196B2 (en) * 2016-06-22 2019-07-30 Qualcomm Incorporated Standard cell architecture for diffusion based on fin count
US9972571B1 (en) * 2016-12-15 2018-05-15 Taiwan Semiconductor Manufacturing Co., Ltd. Logic cell structure and method
US10186510B2 (en) * 2017-05-01 2019-01-22 Advanced Micro Devices, Inc. Vertical gate all around library architecture
KR102336784B1 (ko) 2017-06-09 2021-12-07 삼성전자주식회사 반도체 장치
WO2019003840A1 (ja) * 2017-06-27 2019-01-03 株式会社ソシオネクスト 半導体集積回路装置
US10503863B2 (en) 2017-08-30 2019-12-10 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of manufacturing same
KR20200044810A (ko) * 2017-09-20 2020-04-29 인텔 코포레이션 멀티 버전 라이브러리 셀 핸들링 및 그로부터 제조된 집적 회로 구조들
US10468428B1 (en) * 2018-04-19 2019-11-05 Silicon Storage Technology, Inc. Split gate non-volatile memory cells and logic devices with FinFET structure, and method of making same
US10818762B2 (en) * 2018-05-25 2020-10-27 Advanced Micro Devices, Inc. Gate contact over active region in cell
US11017146B2 (en) * 2018-07-16 2021-05-25 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit and method of forming the same
WO2020055642A2 (en) * 2018-09-05 2020-03-19 Tokyo Electron Limited Power distribution network for 3d logic and memory
US11093684B2 (en) 2018-10-31 2021-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail with non-linear edge
US11030372B2 (en) 2018-10-31 2021-06-08 Taiwan Semiconductor Manufacturing Company Ltd. Method for generating layout diagram including cell having pin patterns and semiconductor device based on same
US10796061B1 (en) * 2019-08-29 2020-10-06 Advanced Micro Devices, Inc. Standard cell and power grid architectures with EUV lithography
KR102849284B1 (ko) * 2019-10-08 2025-08-25 삼성전자주식회사 반도체 소자 및 제조방법
US11600707B2 (en) 2020-05-12 2023-03-07 Micron Technology, Inc. Methods of forming conductive pipes between neighboring features, and integrated assemblies having conductive pipes between neighboring features
US11862620B2 (en) 2020-09-15 2024-01-02 Taiwan Semiconductor Manufacturing Company, Ltd. Power gating cell structure
US20230299069A1 (en) * 2021-09-27 2023-09-21 Invention And Collaboration Laboratory Pte. Ltd. Standard cell structure
WO2023091898A1 (en) * 2021-11-16 2023-05-25 Hsu Fu Chang Advanced structures having mosfet transistors and metal layers

Family Cites Families (35)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2720783B2 (ja) * 1993-12-29 1998-03-04 日本電気株式会社 半導体集積回路
JP4437565B2 (ja) * 1998-11-26 2010-03-24 富士通マイクロエレクトロニクス株式会社 半導体集積回路装置、半導体集積回路装置の設計方法、及び、記録媒体
JP2001306641A (ja) * 2000-04-27 2001-11-02 Victor Co Of Japan Ltd 半導体集積回路の自動配置配線方法
US6662350B2 (en) * 2002-01-28 2003-12-09 International Business Machines Corporation FinFET layout generation
US6842048B2 (en) * 2002-11-22 2005-01-11 Advanced Micro Devices, Inc. Two transistor NOR device
US6921982B2 (en) * 2003-07-21 2005-07-26 International Business Machines Corporation FET channel having a strained lattice structure along multiple surfaces
US6924560B2 (en) * 2003-08-08 2005-08-02 Taiwan Semiconductor Manufacturing Co., Ltd. Compact SRAM cell with FinFET
JP2005116969A (ja) * 2003-10-10 2005-04-28 Toshiba Corp 半導体装置及びその製造方法
KR100702552B1 (ko) * 2003-12-22 2007-04-04 인터내셔널 비지네스 머신즈 코포레이션 이중 게이트 ＦｉｎＦＥＴ 디자인을 위한 자동화 레이어생성 방법 및 장치
WO2005119763A1 (ja) * 2004-06-04 2005-12-15 Nec Corporation 半導体装置およびその製造方法
WO2006090445A1 (ja) * 2005-02-23 2006-08-31 Fujitsu Limited 半導体回路装置及びその半導体回路装置の製造方法
JP2007018588A (ja) * 2005-07-06 2007-01-25 Toshiba Corp 半導体記憶装置および半導体記憶装置の駆動方法
DE102006027178A1 (de) * 2005-11-21 2007-07-05 Infineon Technologies Ag Multi-Fin-Bauelement-Anordnung und Verfahren zum Herstellen einer Multi-Fin-Bauelement-Anordnung
WO2007063990A1 (ja) * 2005-12-02 2007-06-07 Nec Corporation 半導体装置およびその製造方法
US9563733B2 (en) * 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US7763932B2 (en) * 2006-06-29 2010-07-27 International Business Machines Corporation Multi-bit high-density memory device and architecture and method of fabricating multi-bit high-density memory devices
WO2008059440A2 (en) * 2006-11-14 2008-05-22 Nxp B.V. Double patterning for lithography to increase feature spatial density
US7723786B2 (en) * 2007-04-11 2010-05-25 Ronald Kakoschke Apparatus of memory array using FinFETs
US7453125B1 (en) * 2007-04-24 2008-11-18 Infineon Technologies Ag Double mesh finfet
JP4461154B2 (ja) * 2007-05-15 2010-05-12 株式会社東芝 半導体装置
JP4445521B2 (ja) * 2007-06-15 2010-04-07 株式会社東芝 半導体装置
US7625790B2 (en) * 2007-07-26 2009-12-01 International Business Machines Corporation FinFET with sublithographic fin width
US20090057780A1 (en) * 2007-08-27 2009-03-05 International Business Machines Corporation Finfet structure including multiple semiconductor fin channel heights
US8866254B2 (en) * 2008-02-19 2014-10-21 Micron Technology, Inc. Devices including fin transistors robust to gate shorts and methods of making the same
JP5638760B2 (ja) * 2008-08-19 2014-12-10 ルネサスエレクトロニクス株式会社 半導体装置
JP2010141047A (ja) * 2008-12-10 2010-06-24 Renesas Technology Corp 半導体集積回路装置および半導体集積回路装置の製造方法
US8116121B2 (en) * 2009-03-06 2012-02-14 Kabushiki Kaisha Toshiba Semiconductor device and manufacturing methods with using non-planar type of transistors
JP2010225768A (ja) * 2009-03-23 2010-10-07 Toshiba Corp 半導体装置
US8053299B2 (en) * 2009-04-17 2011-11-08 Taiwan Semiconductor Manufacturing Company, Ltd. Method of fabrication of a FinFET element
JP4751463B2 (ja) * 2009-05-25 2011-08-17 本田技研工業株式会社 燃料電池システム
US8076236B2 (en) * 2009-06-01 2011-12-13 Globalfoundries Inc. SRAM bit cell with self-aligned bidirectional local interconnects
US8637135B2 (en) * 2009-11-18 2014-01-28 Taiwan Semiconductor Manufacturing Company, Ltd. Non-uniform semiconductor device active area pattern formation
CN102074582B (zh) * 2009-11-20 2013-06-12 台湾积体电路制造股份有限公司 集成电路结构及其形成方法
US8675397B2 (en) * 2010-06-25 2014-03-18 Taiwan Semiconductor Manufacturing Company, Ltd. Cell structure for dual-port SRAM
US8860107B2 (en) * 2010-06-03 2014-10-14 International Business Machines Corporation FinFET-compatible metal-insulator-metal capacitor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI724459B (zh) * 2018-07-16 2021-04-11 台灣積體電路製造股份有限公司 產生包含突起接腳單元區之佈局圖的方法及其半導體元件
US12040271B2 (en) 2019-10-21 2024-07-16 Tokyo Electron Limited Power delivery network for CFET with buried power rails
TWI873208B (zh) * 2019-10-21 2025-02-21 日商東京威力科創股份有限公司 具有埋設式電力軌的用於cfet的電力輸送網路

Also Published As

Publication number Publication date
EP2803077A4 (de) 2015-11-04
CN104303263B (zh) 2016-12-14
WO2013106799A1 (en) 2013-07-18
TWI608593B (zh) 2017-12-11
JP2015506589A (ja) 2015-03-02
JP2017224858A (ja) 2017-12-21
CN104303263A (zh) 2015-01-21
CN107424999A (zh) 2017-12-01
TWI581403B (zh) 2017-05-01
AU2013207719A1 (en) 2014-07-31
KR20140114424A (ko) 2014-09-26
JP2019054297A (ja) 2019-04-04
SG10201605564WA (en) 2016-09-29
JP6467476B2 (ja) 2019-02-13
TWI552307B (zh) 2016-10-01
EP2803077A1 (de) 2014-11-19
TW201642440A (zh) 2016-12-01
AU2016202229A1 (en) 2016-05-05
AU2020201521A1 (en) 2020-03-19
TW201349451A (zh) 2013-12-01
AU2013207719B2 (en) 2016-02-25
SG11201404024YA (en) 2014-08-28
AU2018200549A1 (en) 2018-02-15
KR101913457B1 (ko) 2018-10-30
AU2018200549B2 (en) 2019-12-05
TW201717355A (zh) 2017-05-16
AU2016202229B2 (en) 2018-02-15

Similar Documents

Publication Publication Date Title
AU2018200549B2 (en) Circuits with linear finfet structures
US9009641B2 (en) Circuits with linear finfet structures
TWI389298B (zh) 具有動態陣列部之半導體裝置
TWI806282B (zh) 積體電路裝置
CN102460671A (zh) 自对准局部互连工艺中对于栅极的选择性局部互连
TW202306043A (zh) 積體電路及其製造方法
TWI623845B (zh) 半導體晶片
JP2008078508A (ja) 半導体集積回路及び半導体集積回路の製造方法
TWI472015B (zh) 動態陣列結構
JP2003282713A (ja) 半導体装置、半導体装置の設計方法、記録媒体および半導体装置の設計支援装置