TW201725678A - 多晶片封裝系統及其形成方法 - Google Patents

多晶片封裝系統及其形成方法 Download PDF

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TW201725678A
TW201725678A TW105137696A TW105137696A TW201725678A TW 201725678 A TW201725678 A TW 201725678A TW 105137696 A TW105137696 A TW 105137696A TW 105137696 A TW105137696 A TW 105137696A TW 201725678 A TW201725678 A TW 201725678A
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Taiwan
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sensor
semiconductor
dies
rdl
substrate
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TW105137696A
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TWI711138B (zh
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陳志華
陳玉芬
蔡豪益
劉重希
余振華
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台灣積體電路製造股份有限公司
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    • G—PHYSICS
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Abstract

在一實施例中，一種半導體結構包含一多晶片封裝系統(MCPS)。該MCPS包含一或多個晶粒、沿該一或多個晶粒之側壁延伸之一模塑料，及該一或多個晶粒及該模塑料上方之一重佈層(RDL)。該半導體結構亦包含經耦合至該RDL之至少一感測器，其中該RDL係插入於該至少一感測器與該一或多個晶粒之間。該半導體結構進一步包含一基板，該基板之一第一側上具有導電構件。該等導電構件經耦合至該RDL。該基板具有自該基板之該第一側延伸至與該第一側相對之該基板之一第二側之一腔，且該至少一感測器係放置於該腔中。

Description

多晶片封裝系統及其形成方法
本發明實施例係有關半導體裝置及其形成方法，特別係有關半導體封裝及其形成方法。
歸因於各種電子組件(例如，電晶體、二極體、電阻器、電容器等)之整合密度之持續改良，半導體工業已經歷快速增長。在大多數情況下，整合密度之此改良來自最小特徵大小之反復縮減(例如，將半導體製程節點向亞20 nm節點縮小)，此容許將更多組件整合至一給定面積中。近來隨著對小型化、更高速度及更大頻寬以及更低功率消耗及延時之需求之增長，而需要半導體晶粒之更小且更具創造性的封裝技術。 多晶片封裝(MCP)技術係受電子工業對小型化及減輕的重量之不斷需求驅策之一新穎封裝技術。為滿足此等需求，引入在一單一封裝中包含複數個半導體晶片之MCP。已發展出各種三維MCP，且特定言之，已針對晶片級整合而非封裝級整合引入新穎技術。MCP技術具有一簡單製程及設計靈活性之優點。隨著技術之持續發展，MCP技術之新的改良及應用正不斷發展。
根據一實施例，一種半導體結構包含一多晶片封裝系統(MCPS)。MCPS包含一或多個晶粒、沿一或多個晶粒之側壁延伸之一模塑料及一或多個晶粒及模塑料上方之一重佈層(RDL)，其中RDL電耦合至一或多個晶粒。半導體結構進一步包含耦合至MCPS之RDL之至少一感測器，其中RDL插入於至少一感測器與一或多個晶粒之間，且一基板在基板之一第一側上具有第一複數個導電構件。第一複數個導電構件耦合至MCPS之RDL。基板包含自基板之第一側延伸至與第一側相對之基板之一第二側之一腔，且至少一感測器放置於腔中。 在其他實施例中，一種半導體結構包含一顯示裝置、一電池、具有面向電池及顯示裝置之一第一側及與第一側相對之一第二側之一基板。基板具有自第一側延伸至第二側之一開口。電池放置於基板與顯示裝置之間。半導體結構亦包含放置於基板與電池之間的一第一半導體封裝。第一半導體封裝跨基板之開口延伸，且第一半導體封裝之一第一側耦合至基板之第一側。半導體結構進一步包含耦合至第一半導體封裝之第一側之一感測器。感測器放置於基板之開口中。 在其他實施例中，一種形成一半導體結構之方法包含：將複數個晶粒附接至一載體；在複數個晶粒之鄰近者之間形成一模塑料；及在複數個晶粒及模塑料上方形成一重佈結構，重佈結構電耦合至複數個晶粒。方法進一步包含：將載體與複數個晶粒分離；將至少一感測器附接至重佈結構；及將一基板附接至重佈結構，基板具有一貫穿孔，至少一感測器放置於貫穿孔中。
以下揭露提供許多不同實施例或實例，用於實施本發明之不同特徵。下文描述組件及配置之特定實例以簡化本發明。當然，此等僅為實例且並不意欲為限制性的。例如，在以下描述中，於一第二構件上方或上形成一第一構件可包含其中該第一構件及該第二構件經形成而直接接觸之實施例，且亦可包含其中額外構件可係形成於該第一構件與該第二構件之間使得該第一構件及該第二構件可未直接接觸之實施例。另外，本發明可在各項實例中重複元件符號及/或字母。此重複係用於簡單及清楚之目的，且本身並不指示所論述之各種實施例及/或組態之間之一關係。 此外，為便於描述，諸如「在……下方」、「在……下」、「下」、「在……上方」、「上」及類似者之空間相對術語在本文中可用來描述如圖中繪示之一個元件或構件與另一(些)元件或構件的關係。除圖中描繪之定向外，空間相對術語亦意欲涵蓋裝置在使用或操作中之不同定向。設備可以其他方式定向(旋轉90度或成其他定向)，且因此同樣可解釋本文中使用之空間相對描述符。 參考一特定內容背景(即，具有一MCP封裝之一系統之方法及結構)來描述各種實施例。各種實施例包含藉由將多個半導體晶粒整合在一起且在半導體晶粒上方形成一重佈層(RDL)來形成一MCP封裝。在各種實施例中，感測器係經由經形成於RDL上方之凸塊下金屬(UBM)結構或UBM而耦合至RDL，且具有一腔之一基板經附接至MCP封裝，其中感測器係放置於該腔中。 圖1至圖6繪示根據一些實施例之一半導體結構500在一製程之不同階段的剖面圖。 首先參考圖1，複數個半導體晶粒105或半導體晶片105經附接至一載體101。複數個半導體晶粒105可為相同或類似類型(例如，執行相同或類似功能)。或者，半導體晶粒105可為不同類型。例如，一個半導體晶粒105可為一記憶體晶片，另一半導體晶粒105可為一邏輯晶片，而另一半導體晶粒105可為一數位訊號處理器(DSP)。儘管圖1繪示三個半導體晶粒105，然一MCP封裝中可使用多於或少於三個半導體晶粒，且半導體晶粒105可為任何適合類型之半導體晶粒。根據一些實施例，載體101包括玻璃、矽、塊狀材料(諸如塊狀矽)、聚合物、聚合物複合材料、金屬箔、陶瓷、玻璃、玻璃環氧樹脂、氧化鈹、膠帶，或用於結構支撐之其他適合材料。在圖1之實例中，半導體晶粒105係藉由一膜103 (諸如一晶粒附接膜(DAF))附接至載體101。因此，膜103在下文之描述中可稱為DAF 103，應瞭解，其他類型之膜亦可被用於將晶粒105附接至載體101。一黏著層102可經沈積或層壓於載體101上方。在一些實施例中，載體101係由玻璃製成，黏著層102係感光的且容易藉由在一後續載體去接合製程中將紫外(UV)光照射於載體101上而與載體101脫離。例如，黏著層可為由St. Paul, Minnesota之3M公司製造之一光熱轉換(LTHC)塗層。或者，黏著層102可包括其他材料，諸如膠。 參考圖1，在一些實施例中，半導體晶粒105經附接至載體101而使具有導電構件109 (例如，通路109或凸塊109)之側背向載體101。根據一些實施例，導電構件109提供至半導體晶粒105之內部電路的電連接。導電構件109可係嵌入於一絕緣層111中。在一些實施例中，絕緣層111包括聚醯亞胺(PI)、聚苯并㗁唑(PBO)或類似物。絕緣層111可用作一應力釋放塗層及/或一保護層，且可在下文論述之後續處理(例如，一研磨製程)中保護晶粒105。 仍參考圖1，一模塑料107經形成於半導體晶粒105及載體101上方。模塑料107可包括環氧樹脂、一模製底膠填充物及類似物，且可藉由壓縮成型、轉移成型、液體囊封成型或任何其他適合方法來形成。在形成模塑料107之後，可執行一平坦化製程(諸如一化學機械平坦化(CMP)製程或一研磨製程)以移除晶粒105上方之過量模塑料107，且產生模塑料107之一平坦上表面107u。當導電構件109之頂表面被暴露時，平坦化製程可停止，使得模塑料107之上表面107u與半導體晶粒105之上表面共面。 接著，如圖2中繪示，重佈層(RDL) 120經形成於半導體晶粒105及模塑料107之上表面107u上方。在一些實施例中，RDL 120包含經形成於一或多個絕緣層中之一或多個導電層(例如，導電線及/或通路)，該等導電層經電耦合至半導體晶粒105，且重新路由電訊號以提供接取而與其他電組件連接。例如，RDL 120可橫向延伸超出半導體晶粒105之外周邊以提供扇出互連結構。RDL 120在下文中可統稱為一重佈層(RDL)或一重佈結構。如下文更詳細描述，RDL 120包括一或多個絕緣層(例如，絕緣層121及122)及經放置於一或多個絕緣層內之一或多個導電構件(例如，導電構件123)。在一些實施例中，第一絕緣層121可包括可光圖案化絕緣材料，諸如聚醯亞胺、苯環丁烯(BCB)、聚苯并㗁唑(PBO)、類似物，或其等之一組合。在其他實施例中，第一絕緣層121可包括非可光圖案化絕緣材料，諸如氮化矽、碳化矽、氧化矽、氮氧化矽、低k介電質(諸如碳摻雜氧化物)、極低k介電質(諸如多孔碳摻雜二氧化矽)、類似物，或其等之一組合。第一絕緣層121可係由CVD、PVD、ALD、一旋塗介電質製程、類似者或其等之一組合沈積。 進一步參考圖2，在一些實施例中，開口(未展示)係使用(例如)一光微影技術形成於第一絕緣層121中，以使導電通路或凸塊109暴露。導電圖案123經形成於第一絕緣層121上方及開口中。在一些實施例中，導電圖案123接觸導電通路/凸塊109。導電圖案123可包括各種線/跡線(跨第一絕緣層121之一頂表面「水平」蔓延)及/或通路(「垂直」延伸至第一絕緣層121中之開口中，且接觸下層導電通路/凸塊109)。如圖2中繪示，導電圖案123延伸超處半導體晶粒105之邊界以提供扇出互連結構。在一些實施例中，導電圖案123係藉由將一晶種層(未展示)沈積於第一絕緣層121上方及開口中而形成。晶種層可包括銅、鈦、鎳、金、錳、類似物或其等之一組合，且可係由ALD、濺鍍、PVD製程、類似者或其等之一組合形成。隨後，一光阻材料(未展示)被沈積於晶種層上方且經圖案化以定義導電圖案123之所要圖案。一導電材料(諸如銅、鎢、鋁、銀、金、類似物或其等之一組合)係藉由一電化學電鍍製程、一無電式電鍍製程、ALD、PVD、類似者或其等之一組合形成於晶種層上。使用適當光阻劑移除製程(諸如灰化其後接著一濕式清潔製程)來移除光阻材料。使用(例如)一濕式或乾式蝕刻來移除第一絕緣層121上方之晶種層的暴露部分。 進一步參考圖2，第二絕緣層122經形成於第一絕緣層121及導電圖案123上方，此完成RDL 120之形成。在所繪示實施例中，第二絕緣層122類似於第一絕緣層121，可使用類似方法來形成，且本文中不再重複描述。可重複上文描述之絕緣層121及導電圖案123之形成方法，以形成額外絕緣層及導電圖案。如圖2中展示，RDL 120包括兩個絕緣層(諸如第一絕緣層121及第二絕緣層122)及經插入於絕緣層之間之一個導電圖案(諸如導電圖案123)。熟習此項技術者將認知，提供絕緣層之數目及導電圖案之數目僅係用於闡釋性目的，且不限制本發明之範疇。在其他實施例中，取決於半導體結構500之設計要求，RDL 120可包括其他數目個絕緣層及導電圖案。 進一步參考圖2，UBM 127 (例如，127a及127b)經形成於RDL 120上方且經電耦合至RDL 120。根據本發明之一些實施例，UBM 127之各者包含一阻障層125及阻障層上方之一金屬層。在一些實施例中，開口(未展示)係使用光微影技術形成於RDL 120之頂部絕緣層(例如，圖2之第二絕緣層122)中，以使RDL 120之導電圖案(例如，圖2之導電圖案123)暴露。隨後，阻障層125係形成於頂部絕緣層上方，該等阻障層延伸至開口中且接觸頂部導電圖案。阻障層可為鈦層、氮化鈦層、鉭層、氮化鉭層或由鈦合金或鉭合金形成之一層，且可係由ALD、濺鍍、PVD、類似者或其等之一組合形成。 金屬(諸如銅、鋁、鎢、銀、金或類似物)係藉由(例如)電化學電鍍製程、一無電式電鍍製程、ALD、PVD或其他適合方法形成於阻障層125上方以完成UBM 127 (例如，127a及127b)，如圖2中繪示。UBM 127可或可未經連接至半導體晶粒105。如圖2中繪示，一些UBM (例如，UBM 127a)係形成於半導體晶粒105之邊界內，而其他UBM (例如，UBM 127b)係形成於半導體晶粒105之邊界外部。 接著，如圖3中繪示，具有UBM 127之半導體結構500之側經附接至由一框架131支撐之一膜133。隨後，在一些實施例中，藉由一去接合製程來移除載體101。在其中黏著層102係一LTHC塗層之實施例中，載體101可藉由用一光源(例如，一紫外(UV)光)照射穿過載體101來去接合。在其他實施例中，載體101可藉由(作為實例)機械剝除、CMP、機械研磨、化學濕式蝕刻、或濕式剝離來去接合。在去接合製程之後，於一些實施例中，藉由一DAF清潔製程(圖3中未展示)來移除DAF 103。在其他實施例中，DAF 103保留在半導體結構500上，且不執行DAF清潔程序。圖3中展示之在去接合製程之後的半導體結構500(排除框架131及膜133)在下文中可稱為一多晶片封裝(MCP)系統550或一MCPS 550 (參見圖3中之標籤)。MCPS 550可或可不包含DAF 103，其在一後續處理步驟中被剝除。 參考圖4，圖3中經形成之半導體結構500與膜133脫離，且經附接至由一框架131’支撐之一膜133’，其中RDL 120延伸遠離膜133’。框架131’及膜133’可(或可不)與圖3中展示之框架131及膜133相同。在一些實施例中，執行一雷射標記製程以在與具有RDL 120之一第二側相對之半導體結構500之一第一側上形成雷射標記(未展示)。可使用來自一雷射裝置143之一雷射束145來執行雷射標記製程，該雷射束灼燒及/或移除半導體結構500之第一側上之膠帶133’及(若干)頂部介電層的部分。雷射標記可包含字母、數字、圖或可用於識別目的之任何其他符號。例如，雷射標記可用來識別產品、製造序列、各自封裝之批號或用來追蹤各自封裝之任何其他資訊。可替代地在圖3中展示之載體去接合製程之後執行雷射標記製程。因此，MCPS 550亦可包含雷射標記。接著，在一些實施例中，銲料膏129係使用(例如)一銲料印刷機或一網版印刷製程而形成於UBM 127上。 接著，如圖5中繪示，電組件141附接至半導體結構500之UBM 127a。電組件141可為例如感測器或半導體晶粒。一第一電組件141可為與一第二電組件141不同之一類型，然而第一電組件141亦可為與第二電組件141相同之類型。在一例示性實施例中，電組件141係感測器。感測器141之各者可為例如一溫度感測器、一濕度感測器、一心率感測器、一發光二極體(LED)感測器或一環境感測器。一LED感測器可用於例如在諸如脈搏血氧計或智慧型手錶(作為實例)之應用中量測血氧濃度。溫度感測器及濕度感測器可用於量測一使用者(例如，一人類使用者)之體溫及皮膚濕度。環境感測器可用來量測周圍環境，諸如氣壓、溫度、濕度、UV光、有毒氣體濃度及/或其他參數。電組件141在下文之論述中可稱為感測器141，應瞭解，亦可使用其他電組件，諸如半導體晶粒、半導體封裝(例如，具有封裝之晶粒)。儘管圖5展示兩個感測器141，但一個感測器或兩個以上感測器亦可附接至半導體結構500。在一些實施例中，感測器141可具有相同尺寸。在其他實施例中，感測器141可具有不同尺寸(例如，圖6中之高度t2 及t3 )。 參考圖5，根據一些實施例，感測器141之接點墊143與半導體結構500之對應UBM 127a對準，且執行一回銲製程以將感測器141實體且電性耦合至半導體結構500。感測器141可使用表面安裝技術(SMT)附接至UBM 127a。例如，可將感測器141放置於半導體結構500上且藉由銲料膏129將其暫時固持於適當位置中。熱源(諸如紅外線燈及熱空氣)可用來熔融銲料膏129且形成感測器141之接點墊143與半導體結構500之UBM 127a之間的連接件139。在一些實施例中，在一回銲爐中執行回銲製程。 圖5為繪示之目的而展示具有附接有感測器141之一個MCPS 550之半導體結構500。然而，附接有各自感測器141之數十個、數百個或甚至更多個MCPS 550可藉由圖1至圖5中展示之處理步驟而同時形成於半導體結構500中。在一些實施例中，隨後執行一切割製程(未展示)以分離或切割半導體結構500而形成複數個個別MCPS 550。可使用(作為實例)一切割刀片或雷射來執行切割。在切割之後，DAF 103可藉由例如自MCPS 550剝除而移除。 參考圖6，根據一些實施例，MCPS 550之UBM 127b與一工件151之一第一側上之各自導電構件153對準，且執行一接合製程(例如，一回銲製程)以將工件151與MCPS 550實體且電性接合。在一些實施例中，連接件139在接合製程之後形成於工件151之導電構件153與MCPS 550之UBM 127b之間。工件151可為例如一印刷電路板(PCB)、一插入器或任何其他適合基板。工件151可具有導電構件153 (諸如第一側上之接點墊或連接盤)，該等導電構件153可電耦合至形成於工件151中之其他導電構件155 (例如，導電線、導電通路)。在一例示性實施例中，工件151係一PCB，其中一開口或一腔150自PCB 151之第一側延伸至與第一側相對之PCB 151之一第二側。在一些實施例中，開口150之大小足夠大以容納感測器141。在各種實施例中，PCB 151之開口150經定位使得當MCPS 550及PCB 151接合在一起時，感測器141定位於開口中。如圖6中繪示，感測器141之一高度(例如，高度t2 )可等於或小於PCB 151之一高度(例如，高度t1 )。或者，感測器141之一高度(例如，高度t3 )可大於PCB 151之一高度(例如，高度t1 )，因此，感測器141之一頂部可突出而高於PCB 151之一上表面。開口150可在設計階段期間設計至PCB 151中，使得當製成PCB 151時開口150備妥。或者，可在製成PCB 151之後藉由使用例如一刀片、雷射或一鑽孔工具移除對應於感測器141之位置之PCB 151之一所要部分而形成開口150。如圖6中繪示，開口150可具有傾斜側壁159。在一些實施例中，開口150之寬度自具有導電構件153之PCB 151之第一側至與第一側相對之PCB 151之第二側逐漸增大。在一實施例中，傾斜側壁159終止於PCB 151之第二側下方且與筆直側壁157相交，其中筆直側壁157實質上垂直於PCB 151之第二側且延伸至PCB 151之第二側。藉由將感測器141定位於腔150中，與具有附接至工件151之第二側之感測器141之一半導體結構相比，半導體結構500之一總高度有利地減小。 圖7繪示半導體結構400之另一實施例。圖7中之半導體結構400包含一MCPS 413，其中一感測器423經由連接件417附接至MCPS 413。連接件417可藉由例如將MCPS 413之UBM (未展示)與感測器423之接點墊(未展示)接合而形成，此類似於上文關於圖5描述之連接件139之形成。感測器423可為(作為實例)一溫度感測器、一濕度感測器、一心率感測器、一LED感測器或一環境感測器。儘管圖7中展示一個感測器423，然可使用兩個或更多個感測器423。MCPS 413可具有與圖5及圖6中展示之MCPS 550相同或類似之一結構。在一些實施例中，一工件425 (例如，一PCB)之一第一側藉由連接件417接合至MCPS 413。工件425具有其中放置感測器423之一開口或貫穿孔。如圖7中繪示，MCPS 413、感測器423及工件425之組合實質上與圖6中之半導體結構500相同或類似。 在各種實施例中，除MCPS 413外，其他電組件415a及415b亦藉由連接件417附接至工件425之第一側。電組件415a及415b可彼此類似或不同。作為一實例，電組件415a可為一半導體晶粒或一半導體封裝，且電組件415b可為一離散電組件，例如被動或主動裝置(諸如一電容器、電感器、電阻器、電晶體、二極體或類似物)。熟習此項技術者將明白，圖7僅係一繪示，在不脫離當前揭露之精神的情況下，半導體結構400中可使用其他數目個MCPS 413、感測器423及電組件415a/415b。 如圖7中繪示，一電池411藉由一電纜419電耦合至工件425，其中MCPS 413放置於電池411與工件425之間。在一些實施例中，電纜419係一撓性電纜，諸如一撓性印刷電路(FPC)電纜。一顯示裝置409 (諸如一LCD顯示裝置)放置在電池411旁邊，其中電池411放置於MCPS 413與顯示裝置409之間。在一些實施例中，顯示裝置409藉由一電纜421 (諸如一FPC電纜)電耦合至工件425。 參考圖7，根據一些實施例，半導體結構400具有一外殼401。在各種實施例中，外殼401具有一前側403及一背側405，其中前側403靠近顯示裝置409且背側405靠近感測器423及工件425。在一些實施例中，半導體結構400包括一穿戴式裝置，諸如一智慧型手錶、一健身裝置或一健康監測裝置。感測器423可感測或量測使用者(例如，穿戴一穿戴式裝置之一人)之特定生命統計資料，因此，外殼401之背側405可觸摸或接近使用者之皮膚。在一些實施例中，背側405或在感測器423上方之背側405之一部分407係由有利於感測器423之感測及量測需要之一第一材料製成。例如，第一材料可容許(若干)特定波長之光通過(例如，用於LED感測器量測)，或可傳導熱(例如，用於溫度感測器量測)。第一材料可擁有物理、電氣或其他類型之特性以滿足半導體結構400之多個感測器之感測需要。如圖7中展示，背側405可包含具有大於或等於感測器423之一寬度w1 之一寬度w2 之一部分407，然而w2 亦可小於w1 (未展示)。在一實施例中，背側405之部分407形成一量測窗且係由不同於背側405之其他部分之一材料製成。 如圖7中繪示，外殼401之前側403鄰近於顯示裝置409。在一些實施例中，前側403之一第二材料係透明的使得顯示裝置409之顯示對使用者可見。例如，玻璃、石英或其他適合材料可用作前側403之第二材料。在一些實施例中，第二材料可與第一材料相同。在其他實施例中，第二材料包括一適合材料以支援顯示裝置409之觸摸螢幕操作。在另一實施例中，前側403具有一開口以暴露顯示裝置409，使得一使用者可與顯示裝置409直接互動(例如，使用手指或一輸入裝置，諸如一觸控筆)。在一些實施例中，外殼401之不同部分(例如，前側403、背側405)包括不同材料。在其他實施例中，外殼401之不同部分由一相同材料製成。 圖8繪示根據一些實施例之製造一半導體結構之一方法之一流程圖。應瞭解，圖8中展示之實施例方法係許多可能實施例方法之一實例。一般技術者將認知許多變動、替代及修改。例如，可添加、移除、替換、重排且重複圖8中繪示之各個步驟。 參考圖8。在步驟1010，將複數個晶粒附接至一載體。在步驟1020，在複數個晶粒之鄰近者之間形成一模塑料。在步驟1030，在複數個晶粒及模塑料上方形成一重佈結構。重佈結構電耦合至複數個半導體晶粒。在步驟1040，將載體與複數個晶粒分離。在步驟1050，將至少一感測器附接至重佈結構。至少一感測器可經由耦合至重佈結構之UBM附接至重佈結構。在步驟1060，將一基板附接至重佈結構。基板具有一貫穿孔，且至少一感測器放置於貫穿孔中。基板可經由耦合至重佈結構之UBM附接至重佈結構。 實施例系統及方法之優點包含更高整合度、MCP封裝面積之縮減及半導體結果之高度之縮減。例如，藉由將感測器(例如，感測器141或感測器423)放置於工件(例如，工件151及425)之腔中，容納感測器141或423所需之半導體結構之總高度減小。在圖7之實例中，容納感測器423所需之高度之一縮減意謂外殼401內更多空間可用於其他目的，諸如更多空間用於一更大電池411，或更多空間用於其他電組件及/或另一工件以提供更多功能。作為另一實例，藉將半導體晶粒而非半導體封裝整合於一MCP封裝中，MCP封裝大小(例如，面積)小於全部由對應半導體封裝佔用之面積，如下文關於圖9之描述所繪示。 圖9繪示一實施例半導體結構300之一俯視圖。如圖9中繪示，複數個裸半導體晶粒(例如，無封裝之晶粒307、309、311及313)一起整合於一MCPS中，且感測器(例如，以虛線展示之感測器203及205)遵循與圖1至圖5中展示相似之步驟附接至MCPS。在圖9之實例中，具有感測器之半導體結構300之側面向紙張內部，因此，以虛線展示感測器203/205及UBM 320，其中UBM 320形成於半導體結構300之周邊周圍。一些UBM 320可形成於半導體結構300之中間部分中，但圖9中為簡單起見並未展示。複數個半導體晶粒可包含(作為實例)一類比前端(AFE)晶粒307、一連接性晶粒311 (例如，一WiFi/BlueTooth模組)、一功率管理積體電路(PMIC) 309及一微控制器單元(MCU) 313。兩個感測器203及205透過PCB 301之一開口(例如，未展示，類似於圖6之開口)附接至半導體結構300之UBM 320 (未展示)，因此在圖9中以虛線展示。作為實例，感測器203可為一LED/二極體感測器，且感測器205可為一溫度/濕度感測器。在上文在圖9中展示之實例中，因為將裸晶粒而非半導體封裝一起整合於MCPS中，所以半導體結構300之總面積 (例如，PCB 301之面積)遠小於整合對應半導體封裝之一解決方案。例如，使用圖9中展示之實施例系統已觀察到PCB面積之一65%縮減。另外，藉由將感測器放置於PCB 301之開口中，有利地減小半導體結構300之總厚度。 根據一實施例，一種半導體結構包含一多晶片封裝系統(MCPS)。MCPS包含一或多個晶粒、沿一或多個晶粒之側壁延伸之一模塑料及一或多個晶粒及模塑料上方之一重佈層(RDL)，其中RDL電耦合至一或多個晶粒。半導體結構進一步包含耦合至MCPS之RDL之至少一感測器，其中RDL插入於至少一感測器與一或多個晶粒之間，且一基板在基板之一第一側上具有第一複數個導電構件。第一複數個導電構件耦合至MCPS之RDL。基板包含自基板之第一側延伸至與第一側相對之基板之一第二側之一腔，且至少一感測器放置於腔中。 在其他實施例中，一種半導體結構包含一顯示裝置、一電池、具有面向電池及顯示裝置之一第一側及與第一側相對之一第二側之一基板。基板具有自第一側延伸至第二側之一開口。電池放置於基板與顯示裝置之間。半導體結構亦包含放置於基板與電池之間的一第一半導體封裝。第一半導體封裝跨基板之開口延伸，且第一半導體封裝之一第一側耦合至基板之第一側。半導體結構進一步包含耦合至第一半導體封裝之第一側之一感測器。感測器放置於基板之開口中。 在其他實施例中，一種形成一半導體結構之方法包含：將複數個晶粒附接至一載體；在複數個晶粒之鄰近者之間形成一模塑料；及在複數個晶粒及模塑料上方形成一重佈結構，重佈結構電耦合至複數個晶粒。方法進一步包含：將載體與複數個晶粒分離；將至少一感測器附接至重佈結構；及將一基板附接至重佈結構，基板具有一貫穿孔，至少一感測器放置於貫穿孔中。 前文概述數種實施例之特徵，使得熟習此項技術者可更佳理解本發明之態樣。熟習此項技術者應明白，其等可容易將本發明用作設計或修改其他製程及結構之一基礎以實行本文中介紹之實施例之相同目的及/或達成相同優點。熟習此項技術者亦應認識到，此等等效構造並未脫離本發明之精神及範疇，且其等可在不脫離本發明之精神及範疇的情況下在本文中進行各種改變、置換及更改。
101‧‧‧載體
102‧‧‧黏著層
103‧‧‧膜/晶粒附接膜(DAF)
105‧‧‧半導體晶粒/半導體晶片
107‧‧‧模塑料
107u‧‧‧模塑料之上表面
109‧‧‧導電構件/通路/凸塊
111‧‧‧絕緣層
120‧‧‧重佈層(RDL)
121‧‧‧第一絕緣層
122‧‧‧第二絕緣層
123‧‧‧導電構件/導電圖案
125‧‧‧阻障層
127‧‧‧凸塊下金屬(UBM)
127a‧‧‧凸塊下金屬(UBM)
127b‧‧‧凸塊下金屬(UBM)
129‧‧‧銲料膏
131‧‧‧框架
131’‧‧‧框架
133‧‧‧膜
133’‧‧‧膜/膠帶
139‧‧‧連接件
141‧‧‧電組件/感測器
143‧‧‧雷射裝置(圖4)/接點墊(圖5)
145‧‧‧雷射束
150‧‧‧開口/腔
151‧‧‧工件/印刷電路板(PCB)
153‧‧‧導電構件
155‧‧‧導電構件
157‧‧‧開口之筆直側壁
159‧‧‧開口之傾斜側壁
203‧‧‧感測器
205‧‧‧感測器
300‧‧‧半導體結構
301‧‧‧印刷電路板(PCB)
307‧‧‧晶粒/類比前端(AFE)晶粒
309‧‧‧晶粒/功率管理積體電路(PMIC)
311‧‧‧晶粒/連接性晶粒
313‧‧‧晶粒/微控制器單元(MCU)
320‧‧‧凸塊下金屬(UBM)
400‧‧‧半導體結構
401‧‧‧外殼
403‧‧‧前側
405‧‧‧背側
407‧‧‧背側之部分
409‧‧‧顯示裝置
411‧‧‧電池
413‧‧‧多晶片封裝系統(MCPS)
415a‧‧‧電組件
415b‧‧‧電組件
417‧‧‧連接件
419‧‧‧電纜
421‧‧‧電纜
423‧‧‧感測器
425‧‧‧工件
500‧‧‧半導體結構
550‧‧‧多晶片封裝(MCP)系統(MCPS)
1010‧‧‧步驟
1020‧‧‧步驟
1030‧‧‧步驟
1040‧‧‧步驟
1050‧‧‧步驟
1060‧‧‧步驟
t1‧‧‧印刷電路板(PCB)之高度
t2‧‧‧感測器之高度
t3‧‧‧感測器之高度
w1‧‧‧感測器之寬度
w2‧‧‧背側之部分的寬度
當結合附圖閱讀時，自以下[實施方式]最佳理解本發明之態樣。應注意，根據工業中之標準實踐，各種構件未按比例繪製。事實上，為清楚論述，各個構件之尺寸可任意增大或減小。 圖1至圖6繪示根據一些實施例之一半導體結構在一製程之各個階段之剖面圖。 圖7繪示根據各種實施例之一半導體結構之一剖面圖。 圖8繪示根據一些實施例之用於製造一半導體結構之一方法之一流程圖。 圖9繪示根據一些實施例之具有一MCP封裝之一系統之一俯視圖。
400‧‧‧半導體結構
401‧‧‧外殼
403‧‧‧前側
405‧‧‧背側
407‧‧‧背側之部分
409‧‧‧顯示裝置
411‧‧‧電池
413‧‧‧多晶片封裝系統(MCPS)
415a‧‧‧電組件
415b‧‧‧電組件
417‧‧‧連接件
419‧‧‧電纜
421‧‧‧電纜
423‧‧‧感測器
425‧‧‧工件
w1‧‧‧感測器之寬度
w2‧‧‧背側之部分的寬度

Claims (1)

  1. 一種半導體結構，其包括： 一多晶片封裝系統(MCPS)，其包括： 一或多個晶粒； 一模塑料，其沿該一或多個晶粒之側壁延伸；及 一重佈層(RDL)，其在該一或多個晶粒及該模塑料上方，其中該RDL經電耦合至該一或多個晶粒； 至少一感測器，其經耦合至該MCPS之該RDL，其中該RDL經插入於該至少一感測器與該一或多個晶粒之間；及 一基板，該基板之一第一側上具有第一複數個導電構件，其中該第一複數個導電構件經耦合至該MCPS之該RDL，其中該基板包括自該基板之該第一側延伸至與該第一側相對之該基板之一第二側之一腔，其中該至少一感測器係放置於該腔中。
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US9589941B1 (en) 2017-03-07
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