TW201538812A - 半導體磊晶晶圓的製造方法及半導體磊晶晶圓 - Google Patents
半導體磊晶晶圓的製造方法及半導體磊晶晶圓 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 117
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 39
- 238000000034 method Methods 0.000 title claims abstract description 14
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 230000002093 peripheral effect Effects 0.000 claims abstract description 33
- 229910052747 lanthanoid Inorganic materials 0.000 claims description 22
- 150000002602 lanthanoids Chemical class 0.000 claims description 22
- 150000004767 nitrides Chemical class 0.000 claims description 21
- 239000013078 crystal Substances 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 13
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 9
- 229910052707 ruthenium Inorganic materials 0.000 claims description 9
- 239000002253 acid Substances 0.000 claims description 8
- 238000004299 exfoliation Methods 0.000 claims 1
- 238000005336 cracking Methods 0.000 abstract description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 230000032798 delamination Effects 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
- 235000012431 wafers Nutrition 0.000 description 72
- 238000000227 grinding Methods 0.000 description 14
- 230000000052 comparative effect Effects 0.000 description 4
- 239000000428 dust Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000005498 polishing Methods 0.000 description 2
- 229910003468 tantalcarbide Inorganic materials 0.000 description 2
- 229910052715 tantalum Inorganic materials 0.000 description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 2
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 2
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 2
- 241000270666 Testudines Species 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010410 dusting Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000407 epitaxy Methods 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 125000002524 organometallic group Chemical group 0.000 description 1
- 238000007788 roughening Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
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Abstract
本發明是一種半導體磊晶晶圓的製造方法,其特徵在於具有以下步驟:製作步驟,其使半導體層磊晶成長於矽系基板上,來製造磊晶晶圓;觀察步驟,其觀察前述製作而成的磊晶晶圓的外周部;及,去除步驟,其將於前述觀察步驟中觀察到的裂痕、磊晶層剝落及反應痕跡的部分加以除去。藉此,提供一種半導體磊晶晶圓的製造方法,該方法可獲得一種完全無裂痕的半導體磊晶晶圓。
Description
本發明關於一種半導體磊晶晶圓的製造方法及半導體磊晶晶圓,該半導體磊晶晶圓於矽系基板上具有磊晶成長層。
為了製造半導體磊晶晶圓,使用市售的磊晶製造裝置,於矽系基板(例如,矽基板或碳化矽基板)等的表面進行磊晶成長,來實行異質或同質磊晶晶圓的製造。
於矽系基板上配置由氮化物半導體所形成的磊晶成長層而成的磊晶晶圓,在外周部上的磊晶成長層的膜厚會變厚而產生磊晶成長層的晶冠(高於成長層的主表面的突起)。
選擇磊晶成長層的各層的厚度等條件,以便使作為半導體裝置來使用的晶圓中央部,矽系基板的翹曲與磊晶成長層的應力最適宜。因此,若產生上述晶冠,磊晶成長層上所產生的應力與基板的翹曲之平衡被破壞,對磊晶成長層帶來影響,於外周部附近的磊晶成長層上產生龜殼圖案的裂痕等。
為了防止產生此種晶冠,提出以下方法等:對矽系基板的外周部進行倒角,並於矽系基板上形成磊晶成長層(例如專利文獻1)。
又,作為解決裂痕之對策,提出以下方法:對矽基板邊緣附近進行粗面化再進行磊晶成長(專利文獻2);使用具有定向平面的(111)面作為主面的矽基板,來作為異質磊晶成長用基板,該矽基板所具有的定向平面,可位於以<111>方向作為轉軸且使<110>方向朝左旋轉(逆時針旋轉)30°、90°及150°中的任一角度後的方向上(專利文獻3);或是對於矽系基板的周邊部,在以環覆蓋的狀態下來實行磊晶成長(專利文獻4)等。
又,於矽基板上使GaN層或AlN層磊晶成長而成的
磊晶晶圓中,若在磊晶成長中於晶圓端部產生裂痕,則原料也就是三甲基鋁(Trimethylaluminium,TMA)或三甲基鎵(Trimethyl Gallium,TMG)的氣體自裂痕的間隙浸入,與矽反應而產生反應痕跡(reaction impression)。
作為解決對此種反應痕跡之對策,提出一種在SOI基板上隔著緩衝膜(AlN膜),使較厚的GaN膜進行磊晶成長的技術(專利文獻5)。
專利文獻1:日本特開昭59-227117號公報
專利文獻2:國際公開2011/161975號公報
專利文獻3:日本特開2011-165962號公報
專利文獻4:日本特開2013-171898號公報
專利文獻5:日本特開2007-246289號公報
然而,現狀是,即便一般被稱為「無裂痕(crack free)」的磊晶晶圓,也會因晶冠的產生而在距離外周部數毫米左右的區域內存在裂痕。
令人擔憂的是,該裂痕於元件的製造步驟中擴張、或引發磊晶成長層的剝離而污染生產線。因此,需要一種完全無裂痕的磊晶基板。
本發明鑒於上述問題而完成,目的在於提供一種半導體磊晶晶圓的製造方法,該方法可獲得一種完全無裂痕的半導體磊晶晶圓。
為了達到上述目的,本發明提供一種半導體磊晶晶圓的製造方法,其特徵在於具有以下步驟:製作步驟,其使半導體層磊晶成長於矽系基板上,來製造磊晶晶圓;觀察步驟,其觀察前述製作而成的磊晶晶圓的外周部;及,去除步驟,其將於前述觀察步驟中觀察到的裂痕、磊晶層剝落及反應痕跡的部分加以除去。
如此一來,觀察製作而成的磊晶晶圓的外周部,將觀察到的裂痕、磊晶層剝落及反應痕跡的部分加以除去,藉此,可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等後續步驟(post process)中,抑制裂痕擴張或引發磊晶成長層的剝離而污染生產線。
此時較佳為,於前述去除步驟中,在不改變前述磊晶晶圓的前述矽系基板的外徑的前提下,磨削前述裂痕、前
述磊晶層剝落及前述反應痕跡的部分。
如此一來,在不改變磊晶晶圓的矽系基板的外徑的前提下,磨削裂痕、磊晶層剝落及反應痕跡的部分,藉此,可於後續步驟中無需考慮磊晶晶圓的直徑的變化,使用與磨削前的矽系基板的直徑對應的相同的裝置、治具。
此時較佳為,於前述去除步驟後,藉由混酸蝕刻使前述磊晶晶圓的磨削面成為鏡面或準鏡面。
如此一來,藉由混酸蝕刻使磊晶晶圓的磨削面成為鏡面或準鏡面,藉此,可抑制磨削部分的揚塵。
此時較佳為,藉由倒角加工將前述磊晶層的突簷部(eaves)加以去除,該突簷部是由於前述混酸蝕刻對前述矽系基板進行蝕刻而形成。
如此一來,藉由倒角加工將磊晶層的突簷部加以去除,藉此可防止在後續步驟中的突簷部分產生碎片。
此時,前述半導體層可成為由氮化物半導體所形成的結構。
作為磊晶成長的半導體層,可適宜地使用氮化物半導體。
此時,可使前述氮化物半導體為AlN、GaN、InN、或其等的混晶中的任一種以上。
作為用於磊晶成長的半導體層的氮化物半導體,可適宜地使用如上所述的材料。
又,本發明提供一種半導體磊晶晶圓,由半導體層於矽系基板上磊晶成長而成,其特徵在於:於前述半導體磊晶晶圓的外周部中,前述半導體層中的至少一部分被去除。
如此一來,於半導體磊晶晶圓的外周部,磊晶成長
而成的半導體層中的至少一部分被去除,藉此,可將半導體磊晶晶圓的外周部所產生的裂痕、磊晶層剝落及反應痕跡的部分加以除去,可容易地成為完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等後續步驟中,不會因為裂痕擴張或引發磊晶成長層的剝離而污染生產線。
此時較佳為,前述半導體層中的至少一部分被去除
的部分成為鏡面或準鏡面。
藉由此種結構,可抑制去除部分的揚塵。
此時,可於前述半導體層中的至少一部分被去除的
部分中,成為露出前述矽系基板的結構。
藉由此種結構,半導體磊晶晶圓的外周部所產生的裂痕、磊晶層剝落及反應痕跡的部分被更確切地去除。
此時,前述半導體層可成為由氮化物半導體所形成
的結構。
由於在氮化物半導體的磊晶晶圓中,於周邊部必定會產生裂痕、磊晶層剝落及反應痕跡,因此磊晶成長的半導體層為氮化物半導體時,本發明尤其有益。
此時,可使前述氮化物半導體為AlN、GaN、InN、
或其等的混晶中的任一種以上。
當應用於半導體磊晶晶圓時,該半導體磊晶晶圓時使用如上所述的材料來作為用於磊晶成長的半導體層的氮化物半導體,可更有效地成為一種完全無裂痕的半導體磊晶晶圓。
如上所述,依據本發明,可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等後續步驟中,抑制裂痕擴張或引發磊晶成長層的剝離而污染生產線。
第1圖是表示本發明的半導體磊晶晶圓的製造方法的製造流程的一例的圖。
第2圖是表示藉由本發明的半導體磊晶晶圓的製造方法製造而成的半導體磊晶晶圓的圖。
第3圖是表示於比較例的半導體磊晶晶圓的周邊部觀察到的裂痕、反應痕跡的圖。
第4圖是表示藉由本發明的半導體磊晶晶圓的製造方法的製造步驟所形成的磊晶層的突簷部的圖。
以下,作為實施態樣的一例,參照圖式詳細說明本發明,但本發明並非限定於此。
如上所述,現狀是即便於被稱為「無裂痕」的磊晶晶圓中,也會因產生晶冠而在距離外周部數毫米左右的區域內存在裂痕,令人擔憂的是,該裂痕於元件的製造步驟中擴張、或引發磊晶成長層的剝離而污染生產線。因此,期望一種完全無裂痕的磊晶基板。
於是,發明人針對半導體磊晶晶圓的製造方法反復努力研究,該方法可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等的後續步驟中,抑制裂痕擴張、或引發磊晶成長層的剝離而污染生產線。
其結果為,發現藉由觀察製作而成的磊晶晶圓的外周部,並將觀察到的裂痕、磊晶層剝落及反應痕跡的部分加以除去,可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等的後續步驟中,抑制裂痕擴張或引發磊晶成長層的剝離而污染生產線,從而完成本發明。
以下,參照第1圖,說明本發明的半導體磊晶晶圓
的製造方法。
首先,如第1圖(a)所示,準備矽系基板,並配置於磊晶成長爐。矽系基板是例如矽(Si)基板或碳化矽(SiC)基板等。
接著,如第1圖(b)所示,使用有機金屬氣相成長
(Metal-organic Chemical Vapor Deposition,MOCVD)法等磊晶成長法,於設定為900℃以上,例如1200℃的矽系基板上形成磊晶成長層。
該磊晶層的組成並無特別限定,但可為氮化物半導體,並且可使該氮化物半導體為AlN、GaN、InN、或其等的混晶中的任一種以上。例如,可於形成AlN層後,使AlGaN層與GaN層交錯積層而成的緩衝層成長,並在表面形成GaN層,使整體以3~10μm左右的厚度成長。
接著,如第1圖(c)所示,觀察磊晶晶圓外周部,檢
查有無裂痕、反應痕跡、磊晶層剝落及產生位置。該觀察方法亦無特別限定,例如可在聚光燈下目測觀察裂痕、反應痕跡,利用顯微鏡觀察膜的剝落情況、反應痕跡。
接著,如第1圖(d)所示,利用磨削將產生裂痕的部
分、產生反應痕跡的部分及磊晶層的剝落加以除去。
此時較佳為,在不改變磊晶晶圓的矽系基板的外徑的前提下,磨削裂痕、磊晶層剝落及反應痕跡的部分。
如此一來,藉由在不改變磊晶晶圓的矽系基板的外徑的前提下,磨削裂痕、磊晶層剝落及反應痕跡的部分,於後續步驟中無需考慮磊晶晶圓的直徑的變化,可使用與磨削前的矽系基板的直徑對應的相同的裝置、治具。
此處,磨削可使用市售的磨削用輪,於寬度1~15mm的範圍內,對晶圓外周部進行磨削,使其深度比磊晶層的厚度深1~250μm左右。
此時,完全去除磊晶層後的磨削面處於露出矽系基板的狀態,但若無裂痕等缺陷,則並非必須完全去除磊晶層。
又,去除方法亦並非限定於磨削,亦可使用蝕刻或研磨等。
接著,如第1圖(e)所示,藉由例如混酸對外周部的
磨削面進行蝕刻,使其成為鏡面或準鏡面。如此一來,利用蝕刻使磨削面成為鏡面或準鏡面,藉此,可抑制磨削部分的揚塵。
再者,當使用細的粒度號數的磨削輪時,由於磨削面的表面粗糙度得以被降低,因此並非必須進行蝕刻。
又,鏡面化亦可使用化學機械研磨(Chemical Mechanical Polishing,CMP)。
接著,如第1圖(f)所示,藉由蝕刻對所形成的磊晶
層的外周部的突簷部分(參照第4圖)進行倒角並去除。如此一來,藉由事先將突簷部分去除,可防止後續步驟中的突
簷部分的碎片。
若依據第1圖所示的製造流程來製造半導體磊晶晶
圓,則可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其在元件製造步驟等後續步驟中,可抑制裂痕擴張或引發磊晶成長層的剝離而污染生產線。
接著,說明本發明的半導體磊晶晶圓。
本發明的半導體磊晶晶圓是半導體層磊晶成長於矽系基板上而成,於半導體磊晶晶圓的外周部,半導體層中的至少一部分被去除。
於半導體磊晶晶圓的外周部中,磊晶成長而成的半導體層中的至少一部分被去除,藉此,可將半導體磊晶晶圓的外周部所產生的裂痕、磊晶層剝落及反應痕跡的部分加以除去,可容易地獲得一種完全無裂痕的半導體磊晶晶圓,其可於元件製造步驟等後續步驟中,抑制裂痕擴張或引發磊晶成長層的剝離而污染生產線。
又較佳為,磊晶成長而成的半導體層中的至少一部分被去除的部分成為鏡面或準鏡面。
藉由此種結構,可抑制去除部分的揚塵。
進一步,於磊晶成長而成的半導體層中的至少一部分被去除的部分中,可成為露出矽系基板的結構。
藉由此種結構,半導體磊晶晶圓的外周部所產生的裂痕、磊晶層剝落及反應痕跡的部分被更確切地去除。
又,磊晶成長而成的半導體層可成為由氮化物半導體所形成的結構。
由於在氮化物半導體的磊晶晶圓中,於周邊部必定會產生裂痕、磊晶層剝落及反應痕跡,因此,當磊晶成長的半導體層為氮化物半導體時,本發明尤其有益。
可使該氮化物半導體為AlN、GaN、InN、或其等的混晶中的任一種以上。
當應用於半導體磊晶晶圓時,該半導體磊晶晶圓使用如上所述的材料來作為用於磊晶成長的半導體層的氮化物半導體,可更有效地成為一種完全無裂痕的半導體磊晶晶圓。
以下,示出實施例和比較例,更具體地說明本發明,但本發明並非限定於該等實施例。
於直徑150mm、厚1mm的矽基板上,藉由磊晶成長形成AlN層後,使AlGaN層與GaN層交錯積層而成的緩衝層成長,並在其表面形成GaN層。
磊晶層整體的厚度為10μm。
在聚光燈下觀察該半導體磊晶晶圓的外周部時,觀察到幾乎全周存在裂痕。
並且,磊晶層剝落分佈於全周,反應痕跡稀疏地分佈於全周。
於第3圖中,示出如上所述地製作而成的半導體磊晶晶圓的周邊部的裂痕和反應痕跡的情況。
與比較例相同地製作半導體磊晶晶圓。
在聚光燈下,觀察製作而成的半導體磊晶晶圓的外周部後,利用磨削用輪將半導體磊晶晶圓外周部的裂痕部分、磊晶層剝落(磊晶層捲起)部分及反應痕跡部分,磨削為寬度10mm、深度50μm(階面(terrace surface)倒角)。
將磨削後的半導體磊晶晶圓,示於第2圖。
第2圖(a)是自斜上方觀察磨削後的半導體磊晶晶圓的照片,第2圖(b)是磨削後的半導體磊晶晶圓的周邊部的剖面圖,第2圖(c)及第2圖(d)是磨削後的半導體磊晶晶圓的周邊部的磊晶層部與階面倒角部的邊界附近的放大照片。
由第2圖可知,晶圓外周部的裂痕部分、磊晶層剝落(磊晶層捲起)部分及反應痕跡部分,得以被完全去除乾淨。
進一步,利用對經磨削的部分進行混酸蝕刻,使磨
削部分成為鏡面或準鏡面。
然後,藉由膠帶倒角(tape chamfer),將由於混酸蝕刻所形成的磊晶層的突簷部分加以除去。
再者,本發明並非限定於上述實施形態。上述實施形態僅為例示,凡是具有和本發明的申請專利範圍中記載的技術思想實質上相同的構成且起到同樣的作用效果的技術方案,均包含於本發明的技術範圍內。
Claims (12)
- 一種半導體磊晶晶圓的製造方法,其特徵在於具有以下步驟:製作步驟,其使半導體層磊晶成長於矽系基板上,來製造磊晶晶圓;觀察步驟,其觀察前述製作而成的磊晶晶圓的外周部;及,去除步驟,其將於前述觀察步驟中觀察到的裂痕、磊晶層剝落及反應痕跡的部分加以除去。
- 如請求項1所述的半導體磊晶晶圓的製造方法,其中,於前述去除步驟中,在不改變前述磊晶晶圓的前述矽系基板的外徑的前提下,磨削前述裂痕、前述磊晶層剝落及前述反應痕跡的部分。
- 如請求項2所述的半導體磊晶晶圓的製造方法,其中,於前述去除步驟後,藉由混酸蝕刻使前述磊晶晶圓的磨削面成為鏡面或準鏡面。
- 如請求項3所述的半導體磊晶晶圓的製造方法,其中,藉由倒角加工將前述磊晶層的突簷部加以去除,該突簷部是由於前述混酸蝕刻對前述矽系基板進行蝕刻而形成。
- 如請求項1至請求項4中的任一項所述的半導體磊晶晶 圓的製造方法,其中,前述半導體層由氮化物半導體所形成。
- 如請求項5所述的半導體磊晶晶圓的製造方法,其中,前述氮化物半導體為AlN、GaN、InN、或該等的混晶中的任一種以上。
- 一種半導體磊晶晶圓,由半導體層於矽系基板上磊晶成長而成,其特徵在於:於前述半導體磊晶晶圓的外周部中,前述半導體層中的至少一部分被去除。
- 如請求項7所述的半導體磊晶晶圓,其中,前述半導體層中的至少一部分被去除的部分成為鏡面或準鏡面。
- 如請求項7所述的半導體磊晶晶圓,其中,前述半導體層中的至少一部分被去除的部分中,露出前述矽系基板。
- 如請求項8所述的半導體磊晶晶圓,其中,前述半導體層中的至少一部分被去除的部分中,露出前述矽系基板。
- 請求項7至請求項10中的任一項所述的半導體磊晶晶圓,其中,前述半導體層由氮化物半導體所形成。
- 如請求項11所述的半導體磊晶晶圓,其中,前述氮化物 半導體為AlN、GaN、InN、或該等的混晶中的任一種以上。
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CN (1) | CN106068546B (zh) |
DE (1) | DE112015000781B4 (zh) |
TW (1) | TWI604094B (zh) |
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JP6157381B2 (ja) * | 2014-03-04 | 2017-07-05 | 信越半導体株式会社 | エピタキシャルウェーハの製造方法及びエピタキシャルウェーハ |
KR20180069403A (ko) * | 2016-12-15 | 2018-06-25 | 삼성전자주식회사 | 질화 갈륨 기판의 제조 방법 |
JP7125252B2 (ja) * | 2017-08-30 | 2022-08-24 | 昭和電工株式会社 | SiCエピタキシャルウェハ及びその製造方法 |
CN111699287A (zh) * | 2018-02-08 | 2020-09-22 | 住友化学株式会社 | 半导体晶圆 |
JP7290156B2 (ja) | 2021-02-05 | 2023-06-13 | 信越半導体株式会社 | 窒化物半導体基板及びその製造方法 |
WO2022168572A1 (ja) | 2021-02-05 | 2022-08-11 | 信越半導体株式会社 | 窒化物半導体基板及びその製造方法 |
CN115635380B (zh) * | 2022-12-26 | 2023-03-17 | 华芯半导体研究院(北京)有限公司 | 一种气相外延生长辅助装置 |
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JPS59227117A (ja) | 1983-06-08 | 1984-12-20 | Nec Corp | 半導体装置 |
JPH0817163B2 (ja) | 1990-04-12 | 1996-02-21 | 株式会社東芝 | エピタキシャルウェーハの製造方法 |
JPH11245151A (ja) * | 1998-02-27 | 1999-09-14 | Speedfam Co Ltd | ワークの外周研磨装置 |
US7968859B2 (en) | 2003-07-28 | 2011-06-28 | Lsi Corporation | Wafer edge defect inspection using captured image analysis |
JP2007246289A (ja) | 2004-03-11 | 2007-09-27 | Nec Corp | 窒化ガリウム系半導体基板の作製方法 |
JP2007197302A (ja) | 2005-12-28 | 2007-08-09 | Sumitomo Electric Ind Ltd | Iii族窒化物結晶の製造方法および製造装置 |
JP5029234B2 (ja) * | 2006-09-06 | 2012-09-19 | 株式会社Sumco | エピタキシャルウェーハの製造方法 |
JP4981602B2 (ja) * | 2007-09-25 | 2012-07-25 | パナソニック株式会社 | 窒化ガリウム基板の製造方法 |
JP5428504B2 (ja) * | 2009-04-30 | 2014-02-26 | 株式会社Jvcケンウッド | 光量制御装置、撮像装置及び光量制御方法 |
JP5338559B2 (ja) * | 2009-08-19 | 2013-11-13 | 信越半導体株式会社 | シリコンエピタキシャルウェーハの製造方法 |
JP2011091143A (ja) * | 2009-10-21 | 2011-05-06 | Sumco Corp | シリコンエピタキシャルウェーハの製造方法 |
JP2011161975A (ja) | 2010-02-05 | 2011-08-25 | Toyota Motor Corp | 車両のパワートレーン |
JP5417211B2 (ja) | 2010-02-10 | 2014-02-12 | Dowaエレクトロニクス株式会社 | エピタキシャル成長基板及び半導体装置、エピタキシャル成長方法 |
JPWO2011161975A1 (ja) | 2010-06-25 | 2013-08-19 | Dowaエレクトロニクス株式会社 | エピタキシャル成長基板及び半導体装置、エピタキシャル成長方法 |
JP5757088B2 (ja) * | 2011-01-05 | 2015-07-29 | 株式会社Sumco | エピタキシャルウェーハの製造方法、エピタキシャルウェーハ |
JP2012156246A (ja) | 2011-01-25 | 2012-08-16 | Hitachi Cable Ltd | 半導体ウェハ及び半導体デバイスウェハ |
JP6130995B2 (ja) * | 2012-02-20 | 2017-05-17 | サンケン電気株式会社 | エピタキシャル基板及び半導体装置 |
US20150084057A1 (en) * | 2013-09-20 | 2015-03-26 | Raytheon Company | Method and structure for reducing the propagation of cracks in epitaxial films formed on semiconductor wafers |
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CN106068546B (zh) | 2019-04-26 |
US20180245240A1 (en) | 2018-08-30 |
TWI604094B (zh) | 2017-11-01 |
US20170029977A1 (en) | 2017-02-02 |
DE112015000781B4 (de) | 2023-08-17 |
CN106068546A (zh) | 2016-11-02 |
US9938638B2 (en) | 2018-04-10 |
KR20160130763A (ko) | 2016-11-14 |
JP2015170648A (ja) | 2015-09-28 |
DE112015000781T5 (de) | 2017-01-12 |
WO2015133064A1 (ja) | 2015-09-11 |
KR102143988B1 (ko) | 2020-08-12 |
JP6261388B2 (ja) | 2018-01-17 |
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