WO2023026847A1 - 窒化物半導体基板及びその製造方法 - Google Patents
窒化物半導体基板及びその製造方法 Download PDFInfo
- Publication number
- WO2023026847A1 WO2023026847A1 PCT/JP2022/030400 JP2022030400W WO2023026847A1 WO 2023026847 A1 WO2023026847 A1 WO 2023026847A1 JP 2022030400 W JP2022030400 W JP 2022030400W WO 2023026847 A1 WO2023026847 A1 WO 2023026847A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- film
- nitride semiconductor
- substrate
- silicon
- semiconductor substrate
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 89
- 150000004767 nitrides Chemical class 0.000 title claims abstract description 62
- 239000004065 semiconductor Substances 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000010408 film Substances 0.000 claims abstract description 87
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 35
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 16
- 230000002093 peripheral effect Effects 0.000 claims abstract description 16
- 239000010409 thin film Substances 0.000 claims abstract description 16
- 229910002704 AlGaN Inorganic materials 0.000 claims abstract description 8
- 238000000034 method Methods 0.000 claims description 12
- 230000015572 biosynthetic process Effects 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 7
- 239000013078 crystal Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 12
- 239000010703 silicon Substances 0.000 abstract description 12
- 230000001681 protective effect Effects 0.000 description 6
- 230000000052 comparative effect Effects 0.000 description 5
- 238000000151 deposition Methods 0.000 description 5
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 235000012431 wafers Nutrition 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000004151 rapid thermal annealing Methods 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 229910021529 ammonia Inorganic materials 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000000428 dust Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000005533 two-dimensional electron gas Effects 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 238000001947 vapour-phase growth Methods 0.000 description 1
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/38—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2015—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate the substrate being of crystalline semiconductor material, e.g. lattice adaptation, heteroepitaxy
Definitions
- the present invention relates to a nitride semiconductor substrate and its manufacturing method.
- Nitride semiconductors such as GaN and AlN can be used to fabricate high electron mobility transistors (HEMTs) using two-dimensional electron gas and high withstand voltage electronic devices.
- HEMTs high electron mobility transistors
- Patent Document 1 Production of an epitaxially grown film on a silicon substrate by vapor phase epitaxy is advantageous in terms of high device productivity and heat dissipation since a substrate with a larger diameter can be used than a sapphire substrate or a SiC substrate.
- the present invention has been made to solve the above-mentioned problems.
- an AlN layer is epitaxially grown on a silicon substrate and a nitride semiconductor thin film is epitaxially grown thereon, there are no reaction marks or polycrystalline growth portions at the edges.
- An object of the present invention is to provide a nitride semiconductor substrate and a method for manufacturing the same.
- a nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a deposition substrate made of single crystal silicon A silicon nitride film is formed on an outer periphery of the film formation substrate, an AlN film is formed on the film formation substrate and the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film.
- a formed nitride semiconductor substrate is provided.
- the silicon nitride film is formed on the outer peripheral portion of the film-forming substrate made of single-crystal silicon in this way, the generation of reaction marks is suppressed, so that dust generation due to reaction marks does not occur during the device process. Adhesion of particles to the nitride semiconductor substrate is suppressed.
- the nitride semiconductor thin film on the silicon nitride film is preferably a single crystal.
- a method for manufacturing a nitride semiconductor substrate comprising: (1) forming a silicon nitride film on the periphery of a film-forming substrate made of single-crystal silicon; (2) growing an AlN film on the deposition substrate and on the silicon nitride film in the outer peripheral portion; and (3) growing a GaN film, an AlGaN film, or both on the AlN film.
- a method for fabricating a nitride semiconductor substrate comprising:
- FIG. 10A and 10B are cross-sectional photographs of the vicinity of the edge and the edge portion of the nitride semiconductor substrate manufactured in Comparative Example 2; 7 is an enlarged photograph of the polycrystalline portion of FIG. 6;
- the present invention provides a nitride semiconductor substrate in which a nitride semiconductor thin film is formed on a film-forming substrate made of single crystal silicon, wherein a silicon nitride film is formed on an outer peripheral portion of the film-forming substrate.
- An AlN film is formed on the deposition substrate and the silicon nitride film, and the nitride semiconductor thin film is formed on the AlN film.
- the present invention also provides a method for manufacturing a nitride semiconductor substrate, comprising: (1) forming a silicon nitride film on the periphery of a film-forming substrate made of single crystal silicon; (2) on the film-forming substrate; and (3) growing a GaN film, an AlGaN film, or both on the AlN film. .
- FIG. 1 shows a schematic diagram of an example of the nitride semiconductor substrate of the present invention.
- the silicon nitride film 3 is formed on the peripheral portion 5 of the film-forming substrate 2 made of single crystal silicon, and furthermore, the central portion and the peripheral portion of the film-forming substrate 2 are formed.
- An epitaxial layer 4 is formed on the silicon nitride film 3 of 5.
- the epitaxial layer 4 is composed of an AlN film (buffer layer) formed on the central portion of the deposition substrate 2 and on the silicon nitride film 3 in the peripheral portion 5, and a nitride semiconductor thin film formed on the AlN film.
- the nitride semiconductor thin film is not particularly limited, but may be, for example, a GaN film, an AlGaN film, or both.
- the outer peripheral portion is, for example, the edge portion (the upper surface of the edge portion) and the area near the edge portion.
- the edge portion may be a chamfered surface.
- the thickness of the silicon nitride film 3 is not particularly limited, it can be, for example, 0.2 to 20 nm, preferably 1 to 4 nm, particularly 2 nm.
- the range of the outer peripheral portion 5 where the silicon nitride film 3 is formed is not particularly limited, for example, the edge portion and the vicinity of the edge are 0.2 to 20 mm, preferably 0.5 to 10 mm, more preferably 1 to 5 mm, particularly It can be 2.5 mm.
- the thickness of the epitaxial layer 4 is not particularly limited, but can be, for example, about 0.1 to 20 ⁇ m, preferably 0.5 to 10 ⁇ m, more preferably 1 to 5 ⁇ m, particularly about 2.7 ⁇ m.
- the film-forming substrate 2 made of single-crystal silicon is not particularly limited, and may be either CZ single-crystal silicon or FZ single-crystal silicon. do not have.
- the nitride semiconductor substrate of the present invention since the silicon nitride film is formed on the outer peripheral portion of the film-forming substrate made of single crystal silicon, the AlN film (buffer layer) is formed on the silicon nitride film in the outer peripheral portion of the growth substrate. formed in As a result, the AlN film (buffer layer) is formed satisfactorily even on the outer peripheral portion of the growth substrate. Reaction traces due to the reaction between Si and Ga of the raw material gas are not generated. By using a silicon nitride film as the film covering the outer peripheral portion, the nitride semiconductor thin film formed thereon becomes a single crystal.
- the nitride semiconductor substrate of the present invention can be manufactured by the method of manufacturing a nitride semiconductor substrate of the present invention, for example, as follows.
- the flow of the method for manufacturing a nitride semiconductor substrate according to the present invention will be described with reference to FIG.
- a silicon nitride film is formed on the periphery of a film-forming substrate made of single crystal silicon (step (1)).
- a film formation substrate (silicon substrate) 2 made of single crystal silicon is placed in an RTA (Rapid Thermal Annealing) furnace and heated in an ammonia atmosphere diluted with argon at, for example, 1175° C. for 10 seconds. Alternatively, heat treatment is performed at 1200.degree.
- RTA Rapid Thermal Annealing
- a resist 6 is applied on the silicon nitride film 3. Then, as shown in FIG. 2(b), a resist 6 is applied on the silicon nitride film 3. Then, as shown in FIG. 2(b), a resist 6 is applied on the silicon nitride film 3. Then, as shown in FIG. 2(b), a resist 6 is applied on the silicon nitride film 3. Then, as shown in FIG. 2(b), a resist 6 is applied on the silicon nitride film 3. Then, as shown in FIG.
- the substrate is etched in a dry etching apparatus for, for example, 10 seconds to remove the silicon nitride film 3 on the portion where the protective film is not present (the central portion of the film-forming substrate 2). Then, the resist protective film on the outer periphery is removed and washed.
- Step (2) a step of growing an AlN film on the deposition substrate and on the silicon nitride film in the outer peripheral portion (step (2)), and a step of growing a GaN film, an AlGaN film, or both on the AlN film ( Step (3)) is performed.
- a nitride semiconductor (epitaxial layer 4) composed of an AlN buffer layer, a buffer layer, and a GaN-HEMT layer is epitaxially grown to a thickness of, for example, about 2.7 ⁇ m in an MOCVD apparatus.
- a nitride semiconductor substrate 1 manufactured in this way a single crystal grows even on the silicon nitride film in the outer peripheral portion, and polycrystal does not grow. Also, no reaction marks are generated at the interface between the silicon nitride film and the silicon substrate.
- the silicon substrate is placed in an RTA furnace and subjected to heat treatment at 1175° C. for 10 seconds in an ammonia atmosphere diluted with argon to form a silicon nitride film with a thickness of 2 nm on the entire surface.
- etching was performed for 10 seconds with a dry etching apparatus to remove the silicon nitride film on the portions without the resist film.
- the resist film was removed, cleaning was performed, and a nitride semiconductor composed of an AlN buffer layer, a buffer layer, and a GaN-HEMT structure (total thickness: 2.7 ⁇ m) was epitaxially grown in an MOCVD apparatus.
- FIG. 4 shows the epitaxially grown film thickness [ ⁇ m] measured every 100 ⁇ m by cross-sectional SEM from the edge portion and the edge surface to the center.
- Comparative example 2 A nitride semiconductor composed of an AlN buffer layer, a buffer layer, and a GaN-HEMT structure was epitaxially grown in the same manner as in the example except that a silicon oxide film was formed in the vicinity of the edge and in the edge portion. As a result, as shown in FIGS. 6 and 7, no reaction marks were observed in the vicinity of the edge of the wafer and in the edge portion, but polycrystals grew on the silicon oxide film.
- the present invention is not limited to the above embodiments.
- the above-described embodiment is an example, and any device having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effect is the present invention. included in the technical scope of
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Inorganic Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Recrystallisation Techniques (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Abstract
Description
単結晶シリコンからなる成膜用基板上に、窒化物半導体薄膜が成膜された窒化物半導体基板であって、
前記成膜用基板の外周部にはシリコン窒化膜が形成されており、前記成膜用基板及び前記シリコン窒化膜上にAlN膜が形成されており、前記AlN膜上に前記窒化物半導体薄膜が形成されたものである窒化物半導体基板を提供する。
(1)単結晶シリコンからなる成膜用基板の外周部にシリコン窒化膜を形成する工程、
(2)前記成膜用基板上、及び前記外周部のシリコン窒化膜上にAlN膜を成長させる工程、及び
(3)前記AlN膜上にGaN膜、AlGaN膜、又はその両方を成長させる工程
を含む窒化物半導体基板の製造方法を提供する。
図1に、本発明の窒化物半導体基板の一例の概略図を示す。本発明の窒化物半導体基板1は、単結晶シリコンからなる成膜用基板2の外周部5にシリコン窒化膜3が形成されており、さらに、成膜用基板2の中央部上、及び外周部5のシリコン窒化膜3上にエピタキシャル層4が形成されたものである。エピタキシャル層4は、成膜用基板2の中央部上、及び外周部5のシリコン窒化膜3上に形成されたAlN膜(バッファ層)、及び該AlN膜上に形成された窒化物半導体薄膜からなる。窒化物半導体薄膜としては特に限定はされないが、例えば、GaN膜、AlGaN膜、又はその両方とすることができる。
本発明の窒化物半導体基板は、本発明の窒化物半導体基板の製造方法によって、例えば、以下のように製造することができる。以下、図2を参照しながら、本発明の窒化物半導体基板の製造方法のフローを説明する。
まず、単結晶シリコンからなる成膜用基板の外周部にシリコン窒化膜を形成する(工程(1))。
次に、成膜用基板上、及び外周部のシリコン窒化膜上にAlN膜を成長させる工程(工程(2))、及びAlN膜上にGaN膜、AlGaN膜、又はその両方を成長させる工程(工程(3))を行う。
図2のフローにてシリコン基板をRTA炉に入れアルゴンで希釈したアンモニア雰囲気で1175℃10秒の熱処理を行い全面に厚さ2nmのシリコン窒化膜を形成し、フォトリソグラフィによりエッジ近傍(2.5mm)とエッジ部分のレジスト膜を残し、ドライエッチング装置で10秒間エッチングを行うことでレジスト膜の無い部分のシリコン窒化膜を除去した。その後、レジスト膜を除去し、洗浄を行い、MOCVD装置でAlNバッファ層、緩衝層、GaN-HEMT構造(トータル厚さ2.7μm)からなる窒化物半導体をエピタキシャル成長させた。その結果、図3に示す写真の通り、ウェーハのエッジ近傍部分、エッジ部は鏡面化しており、反応痕はなく、多結晶も成長していないことが判る。なお、図4にエッジ部とエッジ表面から中心へ向け断面SEMにて100μm毎にエピ厚を測定したエピタキシャル成長した膜厚[μm]を示す。
シリコン窒化膜をエッジ近傍とエッジ部に形成しないことを除いて、実施例と同様にシリコン基板にAlNバッファ層、緩衝層、GaN-HEMT構造からなる窒化物半導体をエピタキシャル成長させた。その結果、図5に示すように、ウェーハのエッジ近傍部分、エッジ部に反応痕が発生した。
エッジ近傍とエッジ部分にシリコン酸化膜を形成したことを除き、実施例と同様にAlNバッファ層、緩衝層、GaN-HEMT構造からなる窒化物半導体をエピタキシャル成長させた。その結果、図6、図7に示すようにウェーハのエッジ近傍部分、エッジ部に反応痕は確認されなかったが、シリコン酸化膜上には多結晶が成長した。
Claims (3)
- 単結晶シリコンからなる成膜用基板上に、窒化物半導体薄膜が成膜された窒化物半導体基板であって、
前記成膜用基板の外周部にはシリコン窒化膜が形成されており、前記成膜用基板及び前記シリコン窒化膜上にAlN膜が形成されており、前記AlN膜上に前記窒化物半導体薄膜が形成されたものであることを特徴とする窒化物半導体基板。 - 前記シリコン窒化膜上の前記窒化物半導体薄膜は単結晶であることを特徴とする請求項1に記載の窒化物半導体基板。
- 窒化物半導体基板の製造方法であって、
(1)単結晶シリコンからなる成膜用基板の外周部にシリコン窒化膜を形成する工程、
(2)前記成膜用基板上、及び前記外周部のシリコン窒化膜上にAlN膜を成長させる工程、及び
(3)前記AlN膜上にGaN膜、AlGaN膜、又はその両方を成長させる工程
を含むことを特徴とする窒化物半導体基板の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202280056843.6A CN117836477A (zh) | 2021-08-26 | 2022-08-09 | 氮化物半导体基板及其制造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021138308A JP2023032276A (ja) | 2021-08-26 | 2021-08-26 | 窒化物半導体基板及びその製造方法 |
JP2021-138308 | 2021-08-26 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2023026847A1 true WO2023026847A1 (ja) | 2023-03-02 |
Family
ID=85323145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2022/030400 WO2023026847A1 (ja) | 2021-08-26 | 2022-08-09 | 窒化物半導体基板及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP2023032276A (ja) |
CN (1) | CN117836477A (ja) |
TW (1) | TW202325919A (ja) |
WO (1) | WO2023026847A1 (ja) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009256154A (ja) * | 2008-04-21 | 2009-11-05 | Nippon Telegr & Teleph Corp <Ntt> | 半導体結晶成長用基板および半導体結晶 |
JP2012036030A (ja) | 2010-08-05 | 2012-02-23 | Sanken Electric Co Ltd | 半導体ウェハの製造方法 |
JP2013118384A (ja) * | 2011-12-05 | 2013-06-13 | Samsung Electronics Co Ltd | シリコン基板、これを採用したエピ構造体及びシリコン基板の製造方法 |
-
2021
- 2021-08-26 JP JP2021138308A patent/JP2023032276A/ja active Pending
-
2022
- 2022-08-09 CN CN202280056843.6A patent/CN117836477A/zh active Pending
- 2022-08-09 WO PCT/JP2022/030400 patent/WO2023026847A1/ja active Application Filing
- 2022-08-12 TW TW111130382A patent/TW202325919A/zh unknown
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009256154A (ja) * | 2008-04-21 | 2009-11-05 | Nippon Telegr & Teleph Corp <Ntt> | 半導体結晶成長用基板および半導体結晶 |
JP2012036030A (ja) | 2010-08-05 | 2012-02-23 | Sanken Electric Co Ltd | 半導体ウェハの製造方法 |
JP2013118384A (ja) * | 2011-12-05 | 2013-06-13 | Samsung Electronics Co Ltd | シリコン基板、これを採用したエピ構造体及びシリコン基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
TW202325919A (zh) | 2023-07-01 |
CN117836477A (zh) | 2024-04-05 |
JP2023032276A (ja) | 2023-03-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4741572B2 (ja) | 窒化物半導体基板及びその製造方法 | |
JP4335187B2 (ja) | 窒化物系半導体装置の製造方法 | |
JP6141627B2 (ja) | シリコン基板上にGaN層を形成する方法およびGaN基板 | |
KR101878754B1 (ko) | 대면적 갈륨 나이트라이드 기판 제조방법 | |
JP2009099932A (ja) | 半導体基板上において3族窒化物半導体層を形成する方法 | |
JP6450086B2 (ja) | 化合物半導体基板の製造方法 | |
US11705330B2 (en) | Substrate for electronic device and method for producing the same | |
JP2003113000A (ja) | 半導体エピタキシャルウェハ及びその製造方法 | |
KR20150007952A (ko) | 반도체장치의 제조방법 | |
TW201538812A (zh) | 半導體磊晶晶圓的製造方法及半導體磊晶晶圓 | |
JP2004107114A (ja) | Iii族窒化物系化合物半導体基板の製造方法 | |
WO2010035409A1 (ja) | シリコンエピタキシャルウェーハの製造方法 | |
WO2023026847A1 (ja) | 窒化物半導体基板及びその製造方法 | |
JP4130389B2 (ja) | Iii族窒化物系化合物半導体基板の製造方法 | |
WO2022038826A1 (ja) | 窒化物半導体ウェーハの製造方法及び窒化物半導体ウェーハ | |
JP7290156B2 (ja) | 窒化物半導体基板及びその製造方法 | |
WO2023017712A1 (ja) | 窒化物半導体基板及びその製造方法 | |
TWI752256B (zh) | 基底及其製備方法 | |
KR20000066758A (ko) | 질화갈륨 반도체 레이저 기판의 제조방법 | |
WO2015067681A1 (en) | Epitaxial wafers avoiding edge melt-back-etching and method for fabricating the same | |
JP7290182B2 (ja) | 窒化物半導体基板及びその製造方法 | |
JP7207588B1 (ja) | Iii族窒化物半導体ウエーハ及びその製造方法 | |
WO2024057698A1 (ja) | 窒化物半導体層付き単結晶シリコン基板及び窒化物半導体層付き単結晶シリコン基板の製造方法 | |
JPH07273025A (ja) | 半導体基板 | |
JPH01184815A (ja) | 半導体ウエハ及びその製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 22861137 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 202280056843.6 Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2022861137 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
ENP | Entry into the national phase |
Ref document number: 2022861137 Country of ref document: EP Effective date: 20240326 |