TW201130022A - Methods of fabricating stacked device and handling device wafer - Google Patents
Methods of fabricating stacked device and handling device waferInfo
- Publication number
- TW201130022A TW201130022A TW099123933A TW99123933A TW201130022A TW 201130022 A TW201130022 A TW 201130022A TW 099123933 A TW099123933 A TW 099123933A TW 99123933 A TW99123933 A TW 99123933A TW 201130022 A TW201130022 A TW 201130022A
- Authority
- TW
- Taiwan
- Prior art keywords
- wafer
- adhesive layer
- carrier
- methods
- edge
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
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Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/707,752 US7883991B1 (en) | 2010-02-18 | 2010-02-18 | Temporary carrier bonding and detaching processes |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201130022A true TW201130022A (en) | 2011-09-01 |
TWI446419B TWI446419B (zh) | 2014-07-21 |
Family
ID=43531937
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW099123933A TWI446419B (zh) | 2010-02-18 | 2010-07-21 | 堆疊裝置的製造方法及裝置晶圓處理方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7883991B1 (zh) |
CN (1) | CN102163559B (zh) |
TW (1) | TWI446419B (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI499019B (zh) * | 2011-09-30 | 2015-09-01 | Intel Corp | 晶片結構、3d封裝結構及用以形成封裝結構之方法 |
TWI616504B (zh) * | 2014-11-07 | 2018-03-01 | 萬國商業機器公司 | 晶圓接合用低溫黏著樹脂 |
Families Citing this family (64)
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TW200616968A (en) * | 2004-08-27 | 2006-06-01 | Ono Pharmaceutical Co | Compound having basic substituent and application thereof |
ES2407115T3 (es) | 2005-11-18 | 2013-06-11 | Ono Pharmaceutical Co., Ltd. | Compuesto que contiene un grupo básico y uso del mismo |
EP2042503B1 (en) * | 2006-05-16 | 2013-01-30 | Ono Pharmaceutical Co., Ltd. | Compound having acidic group which may be protected, and use thereof |
JP2011040419A (ja) * | 2008-05-22 | 2011-02-24 | Fuji Electric Systems Co Ltd | 半導体装置の製造方法及びそのための装置 |
US8232140B2 (en) * | 2009-03-27 | 2012-07-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for ultra thin wafer handling and processing |
US9768305B2 (en) | 2009-05-29 | 2017-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Gradient ternary or quaternary multiple-gate transistor |
TWI419302B (zh) * | 2010-02-11 | 2013-12-11 | Advanced Semiconductor Eng | 封裝製程 |
FR2957190B1 (fr) * | 2010-03-02 | 2012-04-27 | Soitec Silicon On Insulator | Procede de realisation d'une structure multicouche avec detourage par effets thermomecaniques. |
WO2011144226A1 (de) * | 2010-05-20 | 2011-11-24 | Ev Group E. Thallner Gmbh | Verfahren zur herstellung von chipstapeln sowie einen träger für die durchführung des verfahrens |
US8722540B2 (en) * | 2010-07-22 | 2014-05-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Controlling defects in thin wafer handling |
US9263314B2 (en) | 2010-08-06 | 2016-02-16 | Brewer Science Inc. | Multiple bonding layers for thin-wafer handling |
US8324105B2 (en) * | 2010-08-13 | 2012-12-04 | Victory Gain Group Corporation | Stacking method and stacking carrier |
JP2012109538A (ja) | 2010-10-29 | 2012-06-07 | Tokyo Ohka Kogyo Co Ltd | 積層体、およびその積層体の分離方法 |
JP5756334B2 (ja) | 2010-10-29 | 2015-07-29 | 東京応化工業株式会社 | 積層体、およびその積層体の分離方法 |
JP5802106B2 (ja) | 2010-11-15 | 2015-10-28 | 東京応化工業株式会社 | 積層体、および分離方法 |
CN103403855B (zh) * | 2011-02-28 | 2017-02-22 | 道康宁公司 | 晶片结合系统及其结合与剥离的方法 |
US8551881B2 (en) * | 2011-04-25 | 2013-10-08 | Nanya Technology Corporation | Method of bevel trimming three dimensional semiconductor device |
JP2013008915A (ja) * | 2011-06-27 | 2013-01-10 | Toshiba Corp | 基板加工方法及び基板加工装置 |
US8829676B2 (en) | 2011-06-28 | 2014-09-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Interconnect structure for wafer level package |
JP2013030537A (ja) * | 2011-07-27 | 2013-02-07 | Elpida Memory Inc | 半導体装置の製造方法 |
JP5421967B2 (ja) * | 2011-09-07 | 2014-02-19 | 東京エレクトロン株式会社 | 接合方法、プログラム、コンピュータ記憶媒体及び接合システム |
US8409927B1 (en) * | 2011-09-23 | 2013-04-02 | GlobalFoundries, Inc. | Methods for fabricating integrated circuit systems including high reliability die under-fill |
US20130075892A1 (en) * | 2011-09-27 | 2013-03-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for Three Dimensional Integrated Circuit Fabrication |
DE102012101237A1 (de) | 2012-02-16 | 2013-08-22 | Ev Group E. Thallner Gmbh | Verfahren zum temporären Verbinden eines Produktsubstrats mit einem Trägersubstrat |
US8697542B2 (en) * | 2012-04-12 | 2014-04-15 | The Research Foundation Of State University Of New York | Method for thin die-to-wafer bonding |
TWI468787B (zh) * | 2012-04-25 | 2015-01-11 | Mirle Automation Corp | 暫時性貼合方法及其貼合設備 |
US9064770B2 (en) * | 2012-07-17 | 2015-06-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for minimizing edge peeling in the manufacturing of BSI chips |
US9269623B2 (en) | 2012-10-25 | 2016-02-23 | Rohm And Haas Electronic Materials Llc | Ephemeral bonding |
KR102075635B1 (ko) | 2013-01-03 | 2020-03-02 | 삼성전자주식회사 | 웨이퍼 지지 구조물, 웨이퍼 지지 구조물을 포함하는 반도체 패키지의 중간 구조물, 및 중간 구조물을 이용한 반도체 패키지의 제조 방법 |
US9368460B2 (en) | 2013-03-15 | 2016-06-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fan-out interconnect structure and method for forming same |
JP6214182B2 (ja) * | 2013-03-25 | 2017-10-18 | 東京応化工業株式会社 | 基板の処理方法 |
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2010
- 2010-02-18 US US12/707,752 patent/US7883991B1/en not_active Expired - Fee Related
- 2010-07-21 TW TW099123933A patent/TWI446419B/zh not_active IP Right Cessation
- 2010-08-04 CN CN2010102466864A patent/CN102163559B/zh active Active
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TWI499019B (zh) * | 2011-09-30 | 2015-09-01 | Intel Corp | 晶片結構、3d封裝結構及用以形成封裝結構之方法 |
US9252111B2 (en) | 2011-09-30 | 2016-02-02 | Intel Corporation | Method for handling very thin device wafers |
TWI550796B (zh) * | 2011-09-30 | 2016-09-21 | 英特爾公司 | 用於處理極薄裝置晶圓的方法 |
TWI616504B (zh) * | 2014-11-07 | 2018-03-01 | 萬國商業機器公司 | 晶圓接合用低溫黏著樹脂 |
Also Published As
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US7883991B1 (en) | 2011-02-08 |
CN102163559A (zh) | 2011-08-24 |
TWI446419B (zh) | 2014-07-21 |
CN102163559B (zh) | 2013-01-30 |
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