TW201013791A - Direct contact to area efficient body tie process flow - Google Patents
Direct contact to area efficient body tie process flow Download PDFInfo
- Publication number
- TW201013791A TW201013791A TW098116945A TW98116945A TW201013791A TW 201013791 A TW201013791 A TW 201013791A TW 098116945 A TW098116945 A TW 098116945A TW 98116945 A TW98116945 A TW 98116945A TW 201013791 A TW201013791 A TW 201013791A
- Authority
- TW
- Taiwan
- Prior art keywords
- contact
- layer
- source
- binding point
- point
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6708—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect
- H10D30/6711—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing the kink effect or the snapback effect, e.g. discharging the minority carriers of the channel region for preventing bipolar effect by using electrodes contacting the supplementary regions or layers
Landscapes
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/177,332 US7964897B2 (en) | 2008-07-22 | 2008-07-22 | Direct contact to area efficient body tie process flow |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW201013791A true TW201013791A (en) | 2010-04-01 |
Family
ID=41256059
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW098116945A TW201013791A (en) | 2008-07-22 | 2009-05-21 | Direct contact to area efficient body tie process flow |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7964897B2 (https=) |
| EP (1) | EP2148362A1 (https=) |
| JP (1) | JP2010045331A (https=) |
| TW (1) | TW201013791A (https=) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8680617B2 (en) * | 2009-10-06 | 2014-03-25 | International Business Machines Corporation | Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS |
| US9818652B1 (en) | 2016-04-27 | 2017-11-14 | Globalfoundries Inc. | Commonly-bodied field-effect transistors |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5727070A (en) | 1980-07-25 | 1982-02-13 | Toshiba Corp | Mos type semiconductor device |
| JPS62104173A (ja) | 1985-10-31 | 1987-05-14 | Fujitsu Ltd | 半導体装置 |
| US4786955A (en) | 1987-02-24 | 1988-11-22 | General Electric Company | Semiconductor device with source and drain depth extenders and a method of making the same |
| US5145802A (en) | 1991-11-12 | 1992-09-08 | United Technologies Corporation | Method of making SOI circuit with buried connectors |
| US5767549A (en) | 1996-07-03 | 1998-06-16 | International Business Machines Corporation | SOI CMOS structure |
| JPH10256556A (ja) * | 1997-03-14 | 1998-09-25 | Toshiba Corp | 半導体装置及びその製造方法 |
| GB9716657D0 (en) | 1997-08-07 | 1997-10-15 | Zeneca Ltd | Chemical compounds |
| DE69925078T2 (de) | 1998-08-29 | 2006-03-09 | International Business Machines Corp. | SOI-Transistor mit einem Substrat-Kontakt und Verfahren zu dessen Herstellung |
| JP2001077368A (ja) * | 1999-09-03 | 2001-03-23 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| KR100343288B1 (ko) | 1999-10-25 | 2002-07-15 | 윤종용 | 에스오아이 모스 트랜지스터의 플로팅 바디 효과를제거하기 위한 에스오아이 반도체 집적회로 및 그 제조방법 |
| US6521959B2 (en) | 1999-10-25 | 2003-02-18 | Samsung Electronics Co., Ltd. | SOI semiconductor integrated circuit for eliminating floating body effects in SOI MOSFETs and method of fabricating the same |
| JP2001230315A (ja) | 2000-02-17 | 2001-08-24 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2001339071A (ja) * | 2000-03-22 | 2001-12-07 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| JP2002064206A (ja) * | 2000-06-09 | 2002-02-28 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2002033484A (ja) | 2000-07-18 | 2002-01-31 | Mitsubishi Electric Corp | 半導体装置 |
| AU2001288845A1 (en) | 2000-09-19 | 2002-04-02 | Motorola, Inc. | Body-tied silicon on insulator semiconductor device structure and method therefor |
| JP4676069B2 (ja) | 2001-02-07 | 2011-04-27 | パナソニック株式会社 | 半導体装置の製造方法 |
| JP5000057B2 (ja) | 2001-07-17 | 2012-08-15 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
| KR100389929B1 (ko) | 2001-07-28 | 2003-07-04 | 삼성전자주식회사 | 트렌치 소자분리막을 구비하는 soi 소자 및 그 제조 방법 |
| US6620656B2 (en) | 2001-12-19 | 2003-09-16 | Motorola, Inc. | Method of forming body-tied silicon on insulator semiconductor device |
| US6960810B2 (en) | 2002-05-30 | 2005-11-01 | Honeywell International Inc. | Self-aligned body tie for a partially depleted SOI device structure |
| JP4154578B2 (ja) | 2002-12-06 | 2008-09-24 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US6864152B1 (en) | 2003-05-20 | 2005-03-08 | Lsi Logic Corporation | Fabrication of trenches with multiple depths on the same substrate |
| JP4811901B2 (ja) | 2004-06-03 | 2011-11-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2006066691A (ja) * | 2004-08-27 | 2006-03-09 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7179717B2 (en) | 2005-05-25 | 2007-02-20 | Micron Technology, Inc. | Methods of forming integrated circuit devices |
| US7446001B2 (en) | 2006-02-08 | 2008-11-04 | Freescale Semiconductors, Inc. | Method for forming a semiconductor-on-insulator (SOI) body-contacted device with a portion of drain region removed |
| US7732287B2 (en) | 2006-05-02 | 2010-06-08 | Honeywell International Inc. | Method of forming a body-tie |
-
2008
- 2008-07-22 US US12/177,332 patent/US7964897B2/en not_active Expired - Fee Related
-
2009
- 2009-05-19 EP EP09160633A patent/EP2148362A1/en not_active Withdrawn
- 2009-05-21 TW TW098116945A patent/TW201013791A/zh unknown
- 2009-05-21 JP JP2009123064A patent/JP2010045331A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| JP2010045331A (ja) | 2010-02-25 |
| US20100019320A1 (en) | 2010-01-28 |
| US7964897B2 (en) | 2011-06-21 |
| EP2148362A1 (en) | 2010-01-27 |
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