TW200735208A - Dry etching method - Google Patents

Dry etching method

Info

Publication number
TW200735208A
TW200735208A TW095131155A TW95131155A TW200735208A TW 200735208 A TW200735208 A TW 200735208A TW 095131155 A TW095131155 A TW 095131155A TW 95131155 A TW95131155 A TW 95131155A TW 200735208 A TW200735208 A TW 200735208A
Authority
TW
Taiwan
Prior art keywords
etched
dry etching
etching method
containing gas
wiring process
Prior art date
Application number
TW095131155A
Other languages
English (en)
Chinese (zh)
Other versions
TWI334174B (OSRAM
Inventor
Satoshi Une
Masamichi Sakaguchi
Kenichi Kuwabara
Tomoyoshi Ichimaru
Original Assignee
Hitachi High Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi High Tech Corp filed Critical Hitachi High Tech Corp
Publication of TW200735208A publication Critical patent/TW200735208A/zh
Application granted granted Critical
Publication of TWI334174B publication Critical patent/TWI334174B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
TW095131155A 2006-03-01 2006-08-24 Dry etching method TW200735208A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006054914A JP4865361B2 (ja) 2006-03-01 2006-03-01 ドライエッチング方法

Publications (2)

Publication Number Publication Date
TW200735208A true TW200735208A (en) 2007-09-16
TWI334174B TWI334174B (OSRAM) 2010-12-01

Family

ID=38471971

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095131155A TW200735208A (en) 2006-03-01 2006-08-24 Dry etching method

Country Status (4)

Country Link
US (2) US20070207618A1 (OSRAM)
JP (1) JP4865361B2 (OSRAM)
KR (1) KR100894300B1 (OSRAM)
TW (1) TW200735208A (OSRAM)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013258244A (ja) * 2012-06-12 2013-12-26 Tokyo Electron Ltd エッチング方法及びプラズマ処理装置
JP2014003085A (ja) * 2012-06-15 2014-01-09 Tokyo Electron Ltd プラズマエッチング方法及びプラズマ処理装置
CN104425228B (zh) * 2013-08-28 2017-06-16 中芯国际集成电路制造(上海)有限公司 多晶硅栅极的形成方法
JP7478059B2 (ja) * 2020-08-05 2024-05-02 株式会社アルバック シリコンのドライエッチング方法
KR20250019607A (ko) 2023-07-31 2025-02-10 주식회사 히타치하이테크 플라스마 처리 방법

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56100421A (en) * 1980-01-17 1981-08-12 Toshiba Corp Plasma etching method
JPS56144542A (en) * 1980-03-17 1981-11-10 Ibm Method of selectively reactively ion etching polycrystalline silicon for monocrsytalline silicon
EP0338102B1 (de) 1988-04-19 1993-03-10 International Business Machines Corporation Verfahren zur Herstellung von integrierten Halbleiterstrukturen welche Feldeffekttransistoren mit Kanallängen im Submikrometerbereich enthalten
JPH07263415A (ja) 1994-03-18 1995-10-13 Fujitsu Ltd 半導体装置の製造方法
JP3438313B2 (ja) * 1994-05-12 2003-08-18 富士通株式会社 パターン形成方法
KR100434133B1 (ko) 1995-07-14 2004-08-09 텍사스 인스트루먼츠 인코포레이티드 중간층리쏘그래피
JP2935346B2 (ja) * 1996-07-30 1999-08-16 日本電気株式会社 半導体装置およびその製造方法
US5818110A (en) * 1996-11-22 1998-10-06 International Business Machines Corporation Integrated circuit chip wiring structure with crossover capability and method of manufacturing the same
KR100291585B1 (ko) 1997-07-25 2001-11-30 윤종용 반도체장치의금속막식각방법
KR20010003257A (ko) 1999-06-22 2001-01-15 김영환 반도체소자의 제조방법
JP2001035808A (ja) * 1999-07-22 2001-02-09 Semiconductor Energy Lab Co Ltd 配線およびその作製方法、この配線を備えた半導体装置、ドライエッチング方法
TW452971B (en) 1999-12-28 2001-09-01 Promos Technologies Inc Manufacturing method of bottle-shaped deep trench
KR20010083476A (ko) 2000-02-15 2001-09-01 박종섭 미세패턴 형성방법
JP2002151470A (ja) * 2000-11-09 2002-05-24 Mitsubishi Electric Corp ハードマスクの形成方法および半導体装置の製造方法
JP2002343798A (ja) * 2001-05-18 2002-11-29 Mitsubishi Electric Corp 配線層のドライエッチング方法、半導体装置の製造方法および該方法によって得られた半導体装置
JP4257051B2 (ja) * 2001-08-10 2009-04-22 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP2003163349A (ja) * 2001-11-28 2003-06-06 Mitsubishi Electric Corp 半導体装置の製造方法
US6900139B1 (en) 2002-04-30 2005-05-31 Advanced Micro Devices, Inc. Method for photoresist trim endpoint detection
US6762130B2 (en) 2002-05-31 2004-07-13 Texas Instruments Incorporated Method of photolithographically forming extremely narrow transistor gate elements
KR200291154Y1 (ko) * 2002-07-09 2002-10-11 박성준 전기ㆍ전자기기의 전선 정리용 기구

Also Published As

Publication number Publication date
KR20070090063A (ko) 2007-09-05
KR100894300B1 (ko) 2009-04-24
US8143175B2 (en) 2012-03-27
US20070207618A1 (en) 2007-09-06
US20090280651A1 (en) 2009-11-12
JP2007234870A (ja) 2007-09-13
TWI334174B (OSRAM) 2010-12-01
JP4865361B2 (ja) 2012-02-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees