TW200629403A - Dry etching method and apparatus - Google Patents

Dry etching method and apparatus

Info

Publication number
TW200629403A
TW200629403A TW094142763A TW94142763A TW200629403A TW 200629403 A TW200629403 A TW 200629403A TW 094142763 A TW094142763 A TW 094142763A TW 94142763 A TW94142763 A TW 94142763A TW 200629403 A TW200629403 A TW 200629403A
Authority
TW
Taiwan
Prior art keywords
etching
layer
dry etching
stop layer
etching method
Prior art date
Application number
TW094142763A
Other languages
English (en)
Inventor
Mitsuhiro Okune
Hiroyuki Suzuki
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200629403A publication Critical patent/TW200629403A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
TW094142763A 2004-12-06 2005-12-05 Dry etching method and apparatus TW200629403A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004352614A JP4629421B2 (ja) 2004-12-06 2004-12-06 ドライエッチング方法及びドライエッチング装置

Publications (1)

Publication Number Publication Date
TW200629403A true TW200629403A (en) 2006-08-16

Family

ID=36577912

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094142763A TW200629403A (en) 2004-12-06 2005-12-05 Dry etching method and apparatus

Country Status (5)

Country Link
US (2) US20080093338A1 (zh)
JP (1) JP4629421B2 (zh)
KR (1) KR20070085776A (zh)
TW (1) TW200629403A (zh)
WO (1) WO2006062085A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI495009B (zh) * 2010-02-12 2015-08-01 Advanced Micro Fab Equip Inc A Plasma Etching Method with Silicon Insulating Layer

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KR20080060017A (ko) * 2006-12-26 2008-07-01 주식회사 하이닉스반도체 반도체 소자의 제조방법
JP5154260B2 (ja) * 2008-02-26 2013-02-27 パナソニック株式会社 ドライエッチング方法及びドライエッチング装置
KR20120031811A (ko) 2010-09-27 2012-04-04 삼성전자주식회사 반도체 장치 및 그 제조 방법
US9318341B2 (en) * 2010-12-20 2016-04-19 Applied Materials, Inc. Methods for etching a substrate
JP5943369B2 (ja) * 2011-02-09 2016-07-05 国立研究開発法人産業技術総合研究所 熱伝導積層膜部材及びその製造方法、これを用いた放熱部品及び放熱デバイス
US8691698B2 (en) * 2012-02-08 2014-04-08 Lam Research Corporation Controlled gas mixing for smooth sidewall rapid alternating etch process
US8951915B2 (en) 2012-09-11 2015-02-10 Infineon Technologies Ag Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements
SG10202113236SA (en) 2012-10-30 2021-12-30 Air Liquide Fluorocarbon molecules for high aspect ratio oxide etch
JP2015032597A (ja) * 2013-07-31 2015-02-16 日本ゼオン株式会社 プラズマエッチング方法
CN103820863A (zh) * 2014-02-25 2014-05-28 四川飞阳科技有限公司 石英衬底上多晶硅的刻蚀方法以及平面光波导的制作方法
KR102333443B1 (ko) 2014-10-24 2021-12-02 삼성전자주식회사 반도체 소자의 제조 방법
CN105752928B (zh) * 2014-12-16 2018-04-13 中芯国际集成电路制造(上海)有限公司 Mems器件的制作方法及mems器件
JP6492288B2 (ja) * 2015-10-01 2019-04-03 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
JP6524419B2 (ja) * 2016-02-04 2019-06-05 パナソニックＩｐマネジメント株式会社 素子チップの製造方法
TW202425121A (zh) * 2022-08-25 2024-06-16 日商東京威力科創股份有限公司 蝕刻方法及電漿處理裝置

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US4647512A (en) * 1986-03-20 1987-03-03 The Perkin-Elmer Corporation Diamond-like carbon films and process for production thereof
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JP2666768B2 (ja) * 1995-04-27 1997-10-22 日本電気株式会社 ドライエッチング方法及び装置
US6071822A (en) * 1998-06-08 2000-06-06 Plasma-Therm, Inc. Etching process for producing substantially undercut free silicon on insulator structures
US6390019B1 (en) * 1998-06-11 2002-05-21 Applied Materials, Inc. Chamber having improved process monitoring window
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US6391788B1 (en) * 2000-02-25 2002-05-21 Applied Materials, Inc. Two etchant etch method
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US20030003748A1 (en) * 2001-05-24 2003-01-02 Anisul Khan Method of eliminating notching when anisotropically etching small linewidth openings in silicon on insulator
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JP3527901B2 (ja) * 2001-07-24 2004-05-17 株式会社日立製作所 プラズマエッチング方法
JP3971603B2 (ja) * 2001-12-04 2007-09-05 キヤノンアネルバ株式会社 絶縁膜エッチング装置及び絶縁膜エッチング方法
JP2003273086A (ja) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd ドライエッチング方法および半導体製造装置
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JP4493516B2 (ja) * 2004-02-17 2010-06-30 三洋電機株式会社 半導体装置の製造方法
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US7232762B2 (en) * 2004-06-16 2007-06-19 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming an improved low power SRAM contact

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI495009B (zh) * 2010-02-12 2015-08-01 Advanced Micro Fab Equip Inc A Plasma Etching Method with Silicon Insulating Layer

Also Published As

Publication number Publication date
US20080093338A1 (en) 2008-04-24
KR20070085776A (ko) 2007-08-27
JP4629421B2 (ja) 2011-02-09
WO2006062085A1 (ja) 2006-06-15
US20120094500A1 (en) 2012-04-19
JP2006165164A (ja) 2006-06-22

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