TW200731410A - Manufacturing method of semiconductor apparatus and surface processing method of SiN and SiO2 film - Google Patents

Manufacturing method of semiconductor apparatus and surface processing method of SiN and SiO2 film

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Publication number
TW200731410A
TW200731410A TW095134967A TW95134967A TW200731410A TW 200731410 A TW200731410 A TW 200731410A TW 095134967 A TW095134967 A TW 095134967A TW 95134967 A TW95134967 A TW 95134967A TW 200731410 A TW200731410 A TW 200731410A
Authority
TW
Taiwan
Prior art keywords
etching
sin
sio2
film
manufacturing
Prior art date
Application number
TW095134967A
Other languages
Chinese (zh)
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TWI369736B (en
Inventor
Yasushi Akasaka
Genji Nakamura
Original Assignee
Tokyo Electron Ltd
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Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of TW200731410A publication Critical patent/TW200731410A/en
Application granted granted Critical
Publication of TWI369736B publication Critical patent/TWI369736B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
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    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
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    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
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    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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    • H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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    • H01L21/02148—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Cleaning By Liquid Or Steam (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Weting (AREA)

Abstract

The present invention is to provide a manufacturing method of a semiconductor apparatus for removing SiN and SiO2 residues generated by selectively etching a hard mask constructed by SiN and SiO2 films without damaging bottom layer and further etching the remaining hard mask remarkably. The method includes steps of: forming an etching object film on a semiconductor substrate; forming SiN and SiO2 films on the etching object film; guiding nitrogen into the SiN and SiO2 films; selectively etching SiN and SiO2 film to form an etching mask; removing residue of SiN and SiO2 film by wet etching; applying wet etching to the etching object film through the etching mask; and removing the etching mask.
TW095134967A 2005-09-22 2006-09-21 Manufacturing method of semiconductor apparatus and surface processing method of SiN and SiO2 film TW200731410A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005275594A JP4854245B2 (en) 2005-09-22 2005-09-22 Manufacturing method of semiconductor device

Publications (2)

Publication Number Publication Date
TW200731410A true TW200731410A (en) 2007-08-16
TWI369736B TWI369736B (en) 2012-08-01

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TW095134967A TW200731410A (en) 2005-09-22 2006-09-21 Manufacturing method of semiconductor apparatus and surface processing method of SiN and SiO2 film

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US (1) US7622340B2 (en)
JP (1) JP4854245B2 (en)
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TWI449132B (en) * 2009-04-30 2014-08-11 Renesas Electronics Corp Manufacturing method of semiconductor device
TWI490945B (en) * 2010-04-26 2015-07-01 Applied Materials Inc Method for processing substrate
CN105448835A (en) * 2010-10-29 2016-03-30 索尼公司 Semiconductor device

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US20090267349A1 (en) 2008-04-23 2009-10-29 Spitzauer Michael P Production Processes, Systems, Methods, and Apparatuses
JP5547878B2 (en) * 2008-06-30 2014-07-16 株式会社日立ハイテクノロジーズ Semiconductor processing method
US8058119B2 (en) * 2008-08-27 2011-11-15 Taiwan Semiconductor Manufacturing Company, Ltd. Device scheme of HKMG gate-last process
US7927943B2 (en) * 2008-09-12 2011-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Method for tuning a work function of high-k metal gate devices
US8980706B2 (en) * 2008-09-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Double treatment on hard mask for gate N/P patterning
US7871915B2 (en) * 2008-09-26 2011-01-18 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming metal gates in a gate last process
US8222132B2 (en) * 2008-11-14 2012-07-17 Taiwan Semiconductor Manufacturing Company, Ltd. Fabricating high-K/metal gate devices in a gate last process
US20110042728A1 (en) * 2009-08-18 2011-02-24 International Business Machines Corporation Semiconductor device with enhanced stress by gates stress liner
JPWO2011033987A1 (en) * 2009-09-17 2013-02-14 東京エレクトロン株式会社 Film formation method, semiconductor element manufacturing method, insulating film, and semiconductor element
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