SG160310A1 - Manufacturing method of semiconductor substrate and semiconductor device - Google Patents

Manufacturing method of semiconductor substrate and semiconductor device

Info

Publication number
SG160310A1
SG160310A1 SG200906517-8A SG2009065178A SG160310A1 SG 160310 A1 SG160310 A1 SG 160310A1 SG 2009065178 A SG2009065178 A SG 2009065178A SG 160310 A1 SG160310 A1 SG 160310A1
Authority
SG
Singapore
Prior art keywords
single crystal
crystal semiconductor
layer
semiconductor substrate
semiconductor layer
Prior art date
Application number
SG200906517-8A
Other languages
English (en)
Inventor
Junpei Momo
Kosei Nei
Hiroaki Honda
Masaki Koyama
Akihisa Shimomura
Original Assignee
Semiconductor Energy Lab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Lab filed Critical Semiconductor Energy Lab
Publication of SG160310A1 publication Critical patent/SG160310A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/02Positioning or observing the workpiece, e.g. with respect to the point of impact; Aligning, aiming or focusing the laser beam
    • B23K26/06Shaping the laser beam, e.g. by masks or multi-focusing
    • B23K26/062Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam
    • B23K26/0622Shaping the laser beam, e.g. by masks or multi-focusing by direct control of the laser beam by shaping pulses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Optics & Photonics (AREA)
  • Ceramic Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Laser Beam Processing (AREA)
SG200906517-8A 2008-10-02 2009-09-29 Manufacturing method of semiconductor substrate and semiconductor device SG160310A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008257760 2008-10-02

Publications (1)

Publication Number Publication Date
SG160310A1 true SG160310A1 (en) 2010-04-29

Family

ID=42075131

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200906517-8A SG160310A1 (en) 2008-10-02 2009-09-29 Manufacturing method of semiconductor substrate and semiconductor device

Country Status (4)

Country Link
US (1) US8377804B2 (ja)
JP (1) JP5586912B2 (ja)
KR (1) KR101581728B1 (ja)
SG (1) SG160310A1 (ja)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG161151A1 (en) * 2008-10-22 2010-05-27 Semiconductor Energy Lab Soi substrate and method for manufacturing the same
US8513090B2 (en) * 2009-07-16 2013-08-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate, and semiconductor device
US20140023430A1 (en) * 2012-07-19 2014-01-23 Apple Inc. Attachment Techniques
FR2995723A1 (fr) * 2012-09-19 2014-03-21 St Microelectronics Crolles 2 Circuit de fourniture de tension ou de courant
KR102032961B1 (ko) * 2012-10-31 2019-10-17 삼성디스플레이 주식회사 실리콘 기판 결정화 방법
JP5798669B2 (ja) * 2013-12-03 2015-10-21 株式会社神戸製鋼所 酸化物半導体薄膜の評価方法、及び酸化物半導体薄膜の品質管理方法、並びに上記評価方法に用いられる評価装置
JP6098540B2 (ja) * 2014-02-10 2017-03-22 トヨタ自動車株式会社 半導体装置及び半導体装置の製造方法
JP2016066788A (ja) 2014-09-19 2016-04-28 株式会社半導体エネルギー研究所 半導体膜の評価方法および半導体装置の作製方法
US11469137B2 (en) 2019-12-17 2022-10-11 Commissariat A L'energie Atomique Et Aux Energies Alternatives Manufacturing process of an RF-SOI trapping layer substrate resulting from a crystalline transformation of a buried layer
FR3104811B1 (fr) * 2019-12-17 2023-04-28 Commissariat Energie Atomique Procédé de fabrication d’un substrat RF-SOI à couche de piégeage issue d’une transformation cristalline d’une couche enterrée
CN113838857B (zh) * 2021-10-12 2023-12-12 长江存储科技有限责任公司 三维存储器及制备三维存储器的方法

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FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP3813269B2 (ja) * 1996-11-01 2006-08-23 株式会社半導体エネルギー研究所 レーザー照射システム
US6027988A (en) * 1997-05-28 2000-02-22 The Regents Of The University Of California Method of separating films from bulk substrates by plasma immersion ion implantation
JPH1197379A (ja) 1997-07-25 1999-04-09 Denso Corp 半導体基板及び半導体基板の製造方法
US6534380B1 (en) 1997-07-18 2003-03-18 Denso Corporation Semiconductor substrate and method of manufacturing the same
US6271101B1 (en) * 1998-07-29 2001-08-07 Semiconductor Energy Laboratory Co., Ltd. Process for production of SOI substrate and process for production of semiconductor device
JP2000124092A (ja) * 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
JP4379943B2 (ja) 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
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JP2005190262A (ja) * 2003-12-26 2005-07-14 Renesas Technology Corp 半導体集積回路の設計方法
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JP2008177476A (ja) * 2007-01-22 2008-07-31 Sharp Corp 半導体評価方法、半導体評価装置、半導体デバイス製造方法、および半導体デバイス製造装置
US7825007B2 (en) 2007-05-11 2010-11-02 Semiconductor Energy Laboratory Co., Ltd. Method of joining a plurality of SOI substrates on a glass substrate by a heat treatment
KR101455304B1 (ko) 2007-10-05 2014-11-03 가부시키가이샤 한도오따이 에네루기 켄큐쇼 박막트랜지스터, 및 박막트랜지스터를 가지는 표시장치, 및그들의 제작방법
US7842583B2 (en) 2007-12-27 2010-11-30 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate and method for manufacturing semiconductor device
US7932164B2 (en) 2008-03-17 2011-04-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor substrate by using monitor substrate to obtain optimal energy density for laser irradiation of single crystal semiconductor layers

Also Published As

Publication number Publication date
KR20100038059A (ko) 2010-04-12
US20100084734A1 (en) 2010-04-08
KR101581728B1 (ko) 2016-01-04
US8377804B2 (en) 2013-02-19
JP2010109361A (ja) 2010-05-13
JP5586912B2 (ja) 2014-09-10

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