SG121813A1 - Method for manufacturing encapsulated electronic components, particularly integrated circuits - Google Patents

Method for manufacturing encapsulated electronic components, particularly integrated circuits

Info

Publication number
SG121813A1
SG121813A1 SG200306435A SG200306435A SG121813A1 SG 121813 A1 SG121813 A1 SG 121813A1 SG 200306435 A SG200306435 A SG 200306435A SG 200306435 A SG200306435 A SG 200306435A SG 121813 A1 SG121813 A1 SG 121813A1
Authority
SG
Singapore
Prior art keywords
electronic components
integrated circuits
electrically conducting
encapsulated electronic
adhesive film
Prior art date
Application number
SG200306435A
Other languages
English (en)
Inventor
Johannes Bernardus Pet Janssen
De Johannes Bernardus Vrught
Original Assignee
3P Licensing Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=19769109&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=SG121813(A1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by 3P Licensing Bv filed Critical 3P Licensing Bv
Publication of SG121813A1 publication Critical patent/SG121813A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/30—Adhesives in the form of films or foils characterised by the adhesive composition
    • C09J7/35—Heat-activated
    • H—ELECTRICITY
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Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Organic Chemistry (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Adhesive Tapes (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Reverberation, Karaoke And Other Acoustics (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Measurement Of The Respiration, Hearing Ability, Form, And Blood Characteristics Of Living Organisms (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Adhesives Or Adhesive Processes (AREA)
SG200306435A 1999-04-29 2000-05-01 Method for manufacturing encapsulated electronic components, particularly integrated circuits SG121813A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL1011929A NL1011929C2 (nl) 1999-04-29 1999-04-29 Werkwijze voor het inkapselen van elektronische componenten, in het bijzonder geintegreerde schakelingen.

Publications (1)

Publication Number Publication Date
SG121813A1 true SG121813A1 (en) 2006-05-26

Family

ID=19769109

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200306435A SG121813A1 (en) 1999-04-29 2000-05-01 Method for manufacturing encapsulated electronic components, particularly integrated circuits

Country Status (11)

Country Link
US (2) US6613607B2 (ja)
EP (2) EP1175290B1 (ja)
JP (2) JP2002543604A (ja)
KR (1) KR100701720B1 (ja)
AT (1) ATE258846T1 (ja)
AU (1) AU4624900A (ja)
DE (1) DE60008093T2 (ja)
HK (1) HK1044737A1 (ja)
NL (1) NL1011929C2 (ja)
SG (1) SG121813A1 (ja)
WO (1) WO2000066340A1 (ja)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10012880A1 (de) * 2000-03-16 2001-09-27 Infineon Technologies Ag Verfahren und Vorrichtung zur Herstellung einer Halbleiterchip-Umhüllung
US6908791B2 (en) * 2002-04-29 2005-06-21 Texas Instruments Incorporated MEMS device wafer-level package
NL1020594C2 (nl) * 2002-05-14 2003-11-17 Fico Bv Werkwijze voor het met behulp van een folielaag omhullen van een elektronische component.
TW560026B (en) * 2002-08-27 2003-11-01 Uni Tek System Inc Singulation method of the array-type work piece to be singulated having metal layer singulation street, and the array-type work piece to be singulated applying the method
US7759775B2 (en) * 2004-07-20 2010-07-20 Alpha And Omega Semiconductor Incorporated High current semiconductor power device SOIC package
US7238551B2 (en) * 2004-11-23 2007-07-03 Siliconix Incorporated Method of fabricating semiconductor package including die interposed between cup-shaped lead frame having mesas and valleys
US7394150B2 (en) * 2004-11-23 2008-07-01 Siliconix Incorporated Semiconductor package including die interposed between cup-shaped lead frame and lead frame having mesas and valleys
US20060180579A1 (en) * 2005-02-11 2006-08-17 Towa Intercon Technology, Inc. Multidirectional cutting chuck
US20070130759A1 (en) * 2005-06-15 2007-06-14 Gem Services, Inc. Semiconductor device package leadframe formed from multiple metal layers
GB0516625D0 (en) * 2005-08-15 2005-09-21 Eurocut Ltd Orthopaedic surgical instrument
JP4782522B2 (ja) * 2005-09-27 2011-09-28 ソニーケミカル＆インフォメーションデバイス株式会社 光機能素子パッケージ及びその製造方法
US7608482B1 (en) * 2006-12-21 2009-10-27 National Semiconductor Corporation Integrated circuit package with molded insulation
JP2008258411A (ja) * 2007-04-05 2008-10-23 Rohm Co Ltd 半導体装置および半導体装置の製造方法
JP5285289B2 (ja) * 2008-02-06 2013-09-11 セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー 回路装置およびその製造方法
EP2154713B1 (en) * 2008-08-11 2013-01-02 Sensirion AG Method for manufacturing a sensor device with a stress relief layer
US8829685B2 (en) * 2009-03-31 2014-09-09 Semiconductor Components Industries, Llc Circuit device having funnel shaped lead and method for manufacturing the same
TWI453831B (zh) 2010-09-09 2014-09-21 台灣捷康綜合有限公司 半導體封裝結構及其製造方法
KR101247561B1 (ko) 2011-08-18 2013-03-25 주식회사 해성엔지니어링 스트립용 테이핑장치
JP6146732B2 (ja) * 2013-01-18 2017-06-14 Ｓｈマテリアル株式会社 半導体素子搭載用基板及びその製造方法
US9966330B2 (en) 2013-03-14 2018-05-08 Vishay-Siliconix Stack die package
US9589929B2 (en) 2013-03-14 2017-03-07 Vishay-Siliconix Method for fabricating stack die package
JP6180646B1 (ja) * 2016-02-25 2017-08-16 三菱電機株式会社 半導体パッケージ、及びモジュール

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3635754A (en) * 1966-01-21 1972-01-18 Johnson & Johnson Adhesive product
US3754070A (en) 1970-08-03 1973-08-21 Motorola Inc Flash free molding
US4980016A (en) * 1985-08-07 1990-12-25 Canon Kabushiki Kaisha Process for producing electric circuit board
JPH02153354A (ja) * 1988-12-05 1990-06-13 Oki Electric Ind Co Ltd 導電性付与材料及びその使用方法並びにこれを用いた薄膜形成材料
JPH04287351A (ja) * 1991-03-15 1992-10-12 Toowa Kk 電子部品のリード加工方法及び装置
US5218759A (en) * 1991-03-18 1993-06-15 Motorola, Inc. Method of making a transfer molded semiconductor device
JP2708343B2 (ja) * 1993-01-28 1998-02-04 ローム株式会社 半導体装置の製造方法およびリードフレーム
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
JP3541491B2 (ja) * 1994-06-22 2004-07-14 セイコーエプソン株式会社 電子部品
JP3257904B2 (ja) * 1994-08-11 2002-02-18 新光電気工業株式会社 リードフレームとその製造方法
JPH08172153A (ja) * 1994-12-20 1996-07-02 Sony Corp 半導体装置のリード加工方法及びリード加工用金型
US5977613A (en) * 1996-03-07 1999-11-02 Matsushita Electronics Corporation Electronic component, method for making the same, and lead frame and mold assembly for use therein
US6001671A (en) * 1996-04-18 1999-12-14 Tessera, Inc. Methods for manufacturing a semiconductor package having a sacrificial layer
KR100206910B1 (ko) * 1996-06-14 1999-07-01 구본준 반도체 패키지의 디플래쉬 방법
US6048483A (en) * 1996-07-23 2000-04-11 Apic Yamada Corporation Resin sealing method for chip-size packages
JPH10209190A (ja) * 1997-01-21 1998-08-07 Fujitsu Ltd 半導体装置の製造方法及び半導体装置
KR100500919B1 (ko) * 1997-02-10 2005-07-14 마츠시타 덴끼 산교 가부시키가이샤 수지봉입형 반도체장치 및 그 제조방법
KR100214555B1 (ko) * 1997-02-14 1999-08-02 구본준 반도체 패키지의 제조방법
FR2764111A1 (fr) * 1997-06-03 1998-12-04 Sgs Thomson Microelectronics Procede de fabrication de boitiers semi-conducteurs comprenant un circuit integre
JP2971834B2 (ja) * 1997-06-27 1999-11-08 松下電子工業株式会社 樹脂封止型半導体装置の製造方法
JP3017470B2 (ja) * 1997-07-11 2000-03-06 アピックヤマダ株式会社 樹脂モールド方法及び樹脂モールド装置
US6028354A (en) * 1997-10-14 2000-02-22 Amkor Technology, Inc. Microelectronic device package having a heat sink structure for increasing the thermal conductivity of the package
US6187654B1 (en) * 1998-03-13 2001-02-13 Intercon Tools, Inc. Techniques for maintaining alignment of cut dies during substrate dicing
US6130473A (en) * 1998-04-02 2000-10-10 National Semiconductor Corporation Lead frame chip scale package
JP3862411B2 (ja) * 1998-05-12 2006-12-27 三菱電機株式会社 半導体装置の製造方法及びその構造
US6294100B1 (en) * 1998-06-10 2001-09-25 Asat Ltd Exposed die leadless plastic chip carrier
JP2000208540A (ja) * 1998-08-25 2000-07-28 Texas Instr Inc <Ti> 薄型半導体チップスケ―ル・パッケ―ジを密封する方法

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US20020064926A1 (en) 2002-05-30
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WO2000066340A1 (en) 2000-11-09
EP1338397A2 (en) 2003-08-27
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