SG11201811269RA - Method of processing wafer having protrusions on the back side - Google Patents

Method of processing wafer having protrusions on the back side

Info

Publication number
SG11201811269RA
SG11201811269RA SG11201811269RA SG11201811269RA SG11201811269RA SG 11201811269R A SG11201811269R A SG 11201811269RA SG 11201811269R A SG11201811269R A SG 11201811269RA SG 11201811269R A SG11201811269R A SG 11201811269RA SG 11201811269R A SG11201811269R A SG 11201811269RA
Authority
SG
Singapore
Prior art keywords
wafer
international
protective film
front surface
pct
Prior art date
Application number
SG11201811269RA
Other languages
English (en)
Inventor
Karl Heinz Priewasser
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG11201811269RA publication Critical patent/SG11201811269RA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
SG11201811269RA 2016-06-28 2017-06-27 Method of processing wafer having protrusions on the back side SG11201811269RA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB1611198.1A GB2551732B (en) 2016-06-28 2016-06-28 Method of processing wafer
PCT/EP2017/065825 WO2018002035A2 (en) 2016-06-28 2017-06-27 Method of processing wafer

Publications (1)

Publication Number Publication Date
SG11201811269RA true SG11201811269RA (en) 2019-01-30

Family

ID=56891701

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201811269RA SG11201811269RA (en) 2016-06-28 2017-06-27 Method of processing wafer having protrusions on the back side

Country Status (8)

Country Link
US (1) US10991612B2 (ko)
JP (2) JP6958924B2 (ko)
KR (1) KR102311579B1 (ko)
CN (1) CN109417049B (ko)
DE (1) DE112017003219B4 (ko)
GB (1) GB2551732B (ko)
SG (1) SG11201811269RA (ko)
WO (1) WO2018002035A2 (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11676833B2 (en) 2017-05-18 2023-06-13 Disco Corporation Protective sheet for use in processing wafer, handling system for wafer, and combination of wafer and protective sheeting
DE102018200656A1 (de) 2018-01-16 2019-07-18 Disco Corporation Verfahren zum Bearbeiten eines Wafers
DE102018202254A1 (de) * 2018-02-14 2019-08-14 Disco Corporation Verfahren zum Bearbeiten eines Wafers
JP7201342B2 (ja) * 2018-06-06 2023-01-10 株式会社ディスコ ウエーハの加工方法
JP2020009891A (ja) * 2018-07-06 2020-01-16 株式会社ディスコ ウェーハの加工方法
JP7139048B2 (ja) * 2018-07-06 2022-09-20 株式会社ディスコ ウェーハの加工方法
JP2020009890A (ja) * 2018-07-06 2020-01-16 株式会社ディスコ ウェーハの加工方法
JP7181020B2 (ja) * 2018-07-26 2022-11-30 株式会社ディスコ ウエーハの加工方法
DE102018214337A1 (de) * 2018-08-24 2020-02-27 Disco Corporation Verfahren zum Bearbeiten eines Substrats
DE102019211540A1 (de) * 2019-08-01 2021-02-04 Disco Corporation Verfahren zum bearbeiten eines substrats

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JPH0917756A (ja) * 1995-06-28 1997-01-17 Toshiba Corp 半導体用保護テープおよびその使用方法
JPH11199840A (ja) * 1998-01-16 1999-07-27 Kureha Chem Ind Co Ltd 粘着テープ用基材、粘着テープ及び離型テープ付き粘着テープ
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JP5155814B2 (ja) * 2008-10-21 2013-03-06 株式会社日立ハイテクノロジーズ インプリント装置
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JP5755043B2 (ja) * 2011-06-20 2015-07-29 株式会社ディスコ 半導体ウエーハの加工方法
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JP2013149901A (ja) * 2012-01-23 2013-08-01 Disco Abrasive Syst Ltd 被加工物のダイシング方法
JP6061590B2 (ja) * 2012-09-27 2017-01-18 株式会社ディスコ 表面保護部材および加工方法
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JP6043959B2 (ja) * 2013-03-26 2016-12-14 パナソニックＩｐマネジメント株式会社 半導体パッケージの製造方法、半導体チップ支持キャリア及びチップ搭載装置
US9184083B2 (en) * 2013-07-29 2015-11-10 3M Innovative Properties Company Apparatus, hybrid laminated body, method and materials for temporary substrate support
JP6385133B2 (ja) * 2014-05-16 2018-09-05 株式会社ディスコ ウェーハの加工方法及び中間部材
JP2015230964A (ja) * 2014-06-05 2015-12-21 株式会社ディスコ ウエーハの加工方法
JP2016127232A (ja) * 2015-01-08 2016-07-11 株式会社ディスコ ウェーハの加工方法
JP6657515B2 (ja) 2015-08-31 2020-03-04 株式会社ディスコ ウェーハを処理する方法および該方法で使用するための保護シート
DE102015216619B4 (de) 2015-08-31 2017-08-10 Disco Corporation Verfahren zum Bearbeiten eines Wafers

Also Published As

Publication number Publication date
GB2551732B (en) 2020-05-27
CN109417049B (zh) 2023-09-05
DE112017003219B4 (de) 2023-06-15
GB2551732A (en) 2018-01-03
WO2018002035A3 (en) 2018-04-19
CN109417049A (zh) 2019-03-01
JP2019520708A (ja) 2019-07-18
DE112017003219T5 (de) 2019-03-21
KR20190021440A (ko) 2019-03-05
JP2021177575A (ja) 2021-11-11
JP7205810B2 (ja) 2023-01-17
JP6958924B2 (ja) 2021-11-02
US10991612B2 (en) 2021-04-27
GB201611198D0 (en) 2016-08-10
US20200273739A1 (en) 2020-08-27
WO2018002035A2 (en) 2018-01-04
KR102311579B1 (ko) 2021-10-08

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