SG11201704068YA - Etching method and etching apparatus for silicon dioxide substrate - Google Patents

Etching method and etching apparatus for silicon dioxide substrate

Info

Publication number
SG11201704068YA
SG11201704068YA SG11201704068YA SG11201704068YA SG11201704068YA SG 11201704068Y A SG11201704068Y A SG 11201704068YA SG 11201704068Y A SG11201704068Y A SG 11201704068YA SG 11201704068Y A SG11201704068Y A SG 11201704068YA SG 11201704068Y A SG11201704068Y A SG 11201704068YA
Authority
SG
Singapore
Prior art keywords
etching
silicon dioxide
dioxide substrate
etching method
etching apparatus
Prior art date
Application number
SG11201704068YA
Other languages
English (en)
Inventor
Na Zhou
Original Assignee
Beijing Naura Microelectronics Equipment Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Beijing Naura Microelectronics Equipment Co Ltd filed Critical Beijing Naura Microelectronics Equipment Co Ltd
Publication of SG11201704068YA publication Critical patent/SG11201704068YA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
SG11201704068YA 2014-12-04 2015-12-01 Etching method and etching apparatus for silicon dioxide substrate SG11201704068YA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410742698.4A CN105719965A (zh) 2014-12-04 2014-12-04 二氧化硅基片的刻蚀方法和刻蚀设备
PCT/CN2015/096128 WO2016086841A1 (zh) 2014-12-04 2015-12-01 二氧化硅基片的刻蚀方法和刻蚀设备

Publications (1)

Publication Number Publication Date
SG11201704068YA true SG11201704068YA (en) 2017-06-29

Family

ID=56091024

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201704068YA SG11201704068YA (en) 2014-12-04 2015-12-01 Etching method and etching apparatus for silicon dioxide substrate

Country Status (5)

Country Link
JP (1) JP6423534B2 (ja)
KR (1) KR102082803B1 (ja)
CN (1) CN105719965A (ja)
SG (1) SG11201704068YA (ja)
WO (1) WO2016086841A1 (ja)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019102483A (ja) * 2017-11-28 2019-06-24 東京エレクトロン株式会社 エッチング方法およびエッチング装置
US11171011B2 (en) 2018-08-21 2021-11-09 Lam Research Corporation Method for etching an etch layer
TW202117847A (zh) * 2019-07-17 2021-05-01 美商得昇科技股份有限公司 使用沉積製程和蝕刻製程的工件處理
JP7382578B2 (ja) * 2019-12-27 2023-11-17 パナソニックＩｐマネジメント株式会社 プラズマ処理方法および素子チップの製造方法
CN111952169A (zh) * 2020-08-21 2020-11-17 北京北方华创微电子装备有限公司 聚酰亚胺刻蚀方法
CN113451126B (zh) * 2021-07-07 2024-02-27 北京北方华创微电子装备有限公司 晶圆刻蚀方法
CN114685057A (zh) * 2022-03-30 2022-07-01 广东佛智芯微电子技术研究有限公司 一种玻璃基板的纳米金属诱导蚀刻方法
CN114664649B (zh) * 2022-05-19 2022-09-20 浙江大学杭州国际科创中心 碳化硅高深宽比槽刻蚀工艺优化方法

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0612767B2 (ja) * 1984-01-25 1994-02-16 株式会社日立製作所 溝およびそのエッチング方法
JP3208596B2 (ja) * 1992-04-01 2001-09-17 ソニー株式会社 ドライエッチング方法
DE4241045C1 (de) * 1992-12-05 1994-05-26 Bosch Gmbh Robert Verfahren zum anisotropen Ätzen von Silicium
JPH09232281A (ja) * 1996-02-26 1997-09-05 Sony Corp ドライエッチング処理方法
JP4153606B2 (ja) * 1998-10-22 2008-09-24 東京エレクトロン株式会社 プラズマエッチング方法およびプラズマエッチング装置
JP2000156367A (ja) * 1998-11-19 2000-06-06 Sony Corp ドライエッチング方法
JP2000164571A (ja) * 1998-11-27 2000-06-16 Sony Corp コンタクトホール形成方法およびプラズマエッチング方法
JP4221859B2 (ja) * 1999-02-12 2009-02-12 株式会社デンソー 半導体装置の製造方法
KR100327346B1 (ko) * 1999-07-20 2002-03-06 윤종용 선택적 폴리머 증착을 이용한 플라즈마 식각방법 및 이를이용한 콘택홀 형성방법
JP2002110647A (ja) * 2000-09-29 2002-04-12 Hitachi Ltd 半導体集積回路装置の製造方法
JP3773785B2 (ja) * 2000-11-24 2006-05-10 株式会社東芝 半導体装置の製造方法
US7169695B2 (en) * 2002-10-11 2007-01-30 Lam Research Corporation Method for forming a dual damascene structure
GB0401622D0 (en) * 2004-01-26 2004-02-25 Oxford Instr Plasma Technology Plasma etching process
US7273815B2 (en) * 2005-08-18 2007-09-25 Lam Research Corporation Etch features with reduced line edge roughness
EP1804281B1 (en) * 2005-12-28 2011-12-14 STMicroelectronics Srl Process for digging a deep trench in a semiconductor body and semiconductor body so obtained
WO2007088302A1 (fr) * 2006-02-01 2007-08-09 Alcatel Lucent Procede de gravure anisotropique
JP2008244224A (ja) * 2007-03-28 2008-10-09 Sumitomo Precision Prod Co Ltd プラズマ処理装置
WO2008153674A1 (en) * 2007-06-09 2008-12-18 Boris Kobrin Method and apparatus for anisotropic etching
CN101800175B (zh) * 2010-02-11 2011-07-20 中微半导体设备(上海)有限公司 一种含硅绝缘层的等离子刻蚀方法
JP5981106B2 (ja) * 2011-07-12 2016-08-31 東京エレクトロン株式会社 プラズマエッチング方法
CN103700621B (zh) * 2013-12-27 2016-06-01 华进半导体封装先导技术研发中心有限公司 一种高深宽比垂直玻璃通孔的刻蚀方法
GB201611652D0 (en) * 2016-07-04 2016-08-17 Spts Technologies Ltd Method of detecting a condition

Also Published As

Publication number Publication date
KR102082803B1 (ko) 2020-02-28
JP2017536701A (ja) 2017-12-07
KR20170092645A (ko) 2017-08-11
CN105719965A (zh) 2016-06-29
WO2016086841A1 (zh) 2016-06-09
JP6423534B2 (ja) 2018-11-14

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