SG10201400390YA - Package structure - Google Patents
Package structureInfo
- Publication number
- SG10201400390YA SG10201400390YA SG10201400390YA SG10201400390YA SG10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA SG 10201400390Y A SG10201400390Y A SG 10201400390YA
- Authority
- SG
- Singapore
- Prior art keywords
- package structure
- package
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49575—Assemblies of semiconductor devices on lead frames
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5383—Multilayer substrates
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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- H01L2224/061—Disposition
- H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/06181—On opposite sides of the body
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24153—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
- H01L2224/24195—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being a discrete passive component
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Cooling Or The Like Of Electrical Apparatus (AREA)
- Structure Of Printed Boards (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG10201400390YA SG10201400390YA (en) | 2014-03-05 | 2014-03-05 | Package structure |
US14/230,865 US9425131B2 (en) | 2014-03-05 | 2014-03-31 | Package structure |
CN201410127108.7A CN104900609B (zh) | 2014-03-05 | 2014-03-31 | 封装结构 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SG10201400390YA SG10201400390YA (en) | 2014-03-05 | 2014-03-05 | Package structure |
Publications (1)
Publication Number | Publication Date |
---|---|
SG10201400390YA true SG10201400390YA (en) | 2015-10-29 |
Family
ID=54018105
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG10201400390YA SG10201400390YA (en) | 2014-03-05 | 2014-03-05 | Package structure |
Country Status (3)
Country | Link |
---|---|
US (1) | US9425131B2 (zh) |
CN (1) | CN104900609B (zh) |
SG (1) | SG10201400390YA (zh) |
Families Citing this family (53)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104716128B (zh) | 2013-12-16 | 2019-11-22 | 台达电子企业管理(上海)有限公司 | 功率模块、电源变换器以及功率模块的制造方法 |
US20150351218A1 (en) * | 2014-05-27 | 2015-12-03 | Fujikura Ltd. | Component built-in board and method of manufacturing the same, and mounting body |
US9826646B2 (en) * | 2014-05-27 | 2017-11-21 | Fujikura Ltd. | Component built-in board and method of manufacturing the same, and mounting body |
SG10201504271YA (en) * | 2015-05-29 | 2016-12-29 | Delta Electronics Int’L Singapore Pte Ltd | Power module |
TWI584420B (zh) * | 2015-09-16 | 2017-05-21 | 旭德科技股份有限公司 | 封裝載板及其製作方法 |
EP3148300B1 (en) * | 2015-09-24 | 2023-07-26 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Connection system for electronic components |
SG10201508520PA (en) * | 2015-10-14 | 2017-05-30 | Delta Electronics Int’L Singapore Pte Ltd | Power module |
US10912186B2 (en) * | 2015-12-03 | 2021-02-02 | Mitsubishi Electric Corporation | Semiconductor device |
KR102059610B1 (ko) * | 2015-12-18 | 2019-12-26 | 주식회사 엘지화학 | 고전도성 방열 패드를 이용한 인쇄회로기판의 방열 시스템 |
KR102565119B1 (ko) * | 2016-08-25 | 2023-08-08 | 삼성전기주식회사 | 전자 소자 내장 기판과 그 제조 방법 및 전자 소자 모듈 |
FR3060845B1 (fr) * | 2016-12-19 | 2019-05-24 | Institut Vedecom | Circuits electroniques de puissance equipes de bus barres formant dissipateurs thermiques et procede d’integration |
CN108346637B (zh) * | 2017-01-24 | 2019-10-08 | 比亚迪股份有限公司 | 一种功率模块及其制造方法 |
CN108346645A (zh) * | 2017-01-24 | 2018-07-31 | 比亚迪股份有限公司 | 一种功率模块及其制造方法 |
CN108346628B (zh) * | 2017-01-24 | 2021-06-18 | 比亚迪半导体股份有限公司 | 一种功率模块及其制造方法 |
CN108346649B (zh) * | 2017-01-24 | 2021-03-02 | 比亚迪半导体股份有限公司 | 一种半桥功率模块及其制造方法 |
EP3355349B1 (en) * | 2017-01-26 | 2022-05-11 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Efficient heat removal from component carrier with embedded diode |
US10242973B2 (en) * | 2017-07-07 | 2019-03-26 | Samsung Electro-Mechanics Co., Ltd. | Fan-out-semiconductor package module |
CN109727941A (zh) * | 2017-10-31 | 2019-05-07 | 比亚迪股份有限公司 | 一种封装模组及其制备方法、电池保护模组 |
DE102017220417A1 (de) * | 2017-11-16 | 2019-05-16 | Continental Automotive Gmbh | Elektronisches Modul |
EP3534394A1 (en) | 2018-02-28 | 2019-09-04 | Infineon Technologies Austria AG | Semiconductor package and method of manufacturing a semiconductor package |
TWI690031B (zh) * | 2018-03-13 | 2020-04-01 | 鈺橋半導體股份有限公司 | 整合元件及導線架之線路板及其製法 |
SG10201802515PA (en) * | 2018-03-27 | 2019-10-30 | Delta Electronics Int’L Singapore Pte Ltd | Packaging process |
EP3547359A1 (en) | 2018-03-30 | 2019-10-02 | Mitsubishi Electric R&D Centre Europe B.V. | Improved pre-packed power cell |
IT201800004209A1 (it) * | 2018-04-05 | 2019-10-05 | Dispositivo semiconduttore di potenza con relativo incapsulamento e corrispondente procedimento di fabbricazione | |
EP3584833B1 (en) | 2018-06-19 | 2021-09-01 | Mitsubishi Electric R&D Centre Europe B.V. | Power module with improved alignment |
SG10201805356XA (en) * | 2018-06-21 | 2020-01-30 | Delta Electronics Int’L Singapore Pte Ltd | Package structure |
US11183460B2 (en) * | 2018-09-17 | 2021-11-23 | Texas Instruments Incorporated | Embedded die packaging with integrated ceramic substrate |
EP3648159B1 (en) | 2018-10-31 | 2021-12-15 | Infineon Technologies Austria AG | Semiconductor package and method of fabricating a semiconductor package |
SG10201809987YA (en) * | 2018-11-09 | 2020-06-29 | Delta Electronics Int’L Singapore Pte Ltd | Package structure and packaging process |
SG10201810052WA (en) * | 2018-11-12 | 2020-06-29 | Delta Electronics Int’L Singapore Pte Ltd | Packaging process and packaging structure |
US20200161206A1 (en) * | 2018-11-20 | 2020-05-21 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and semiconductor manufacturing process |
SG10201810791TA (en) * | 2018-11-30 | 2020-06-29 | Delta Electronics Int’L Singapore Pte Ltd | Package structure and power module using same |
SG10201811582WA (en) * | 2018-12-24 | 2020-07-29 | Delta Electronics Int’L Singapore Pte Ltd | Package structure and manufacturing method thereof |
IT201900013743A1 (it) | 2019-08-01 | 2021-02-01 | St Microelectronics Srl | Dispositivo elettronico di potenza incapsulato, in particolare circuito a ponte comprendente transistori di potenza, e relativo procedimento di assemblaggio |
CN110838480B (zh) * | 2019-11-09 | 2021-04-16 | 北京工业大学 | 一种碳化硅mosfet模块的封装结构和制作方法 |
EP3836208A1 (en) * | 2019-11-19 | 2021-06-16 | Mitsubishi Electric R & D Centre Europe B.V. | Method and system for interconnecting a power device embedded in a substrate using conducting paste into cavities |
EP3852132A1 (en) | 2020-01-20 | 2021-07-21 | Infineon Technologies Austria AG | Additive manufacturing of a frontside or backside interconnect of a semiconductor die |
US11532541B2 (en) * | 2020-01-28 | 2022-12-20 | Infineon Technologies Ag | Semiconductor package having a solderable contact pad formed by a load terminal bond pad of a power semiconductor die |
US11502012B2 (en) | 2020-01-28 | 2022-11-15 | Infineon Technologies Ag | Semiconductor packages and methods of manufacturing thereof |
EP3869923A1 (en) * | 2020-02-20 | 2021-08-25 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Cooling profile integration for embedded power systems |
CN113496958B (zh) * | 2020-03-20 | 2024-05-10 | 无锡华润微电子有限公司 | 基板及封装结构 |
US11990384B2 (en) * | 2020-04-17 | 2024-05-21 | Nxp Usa, Inc. | Amplifier modules with power transistor die and peripheral ground connections |
US11990872B2 (en) | 2020-04-17 | 2024-05-21 | Nxp Usa, Inc. | Power amplifier modules including topside cooling interfaces and methods for the fabrication thereof |
IT202000016840A1 (it) | 2020-07-10 | 2022-01-10 | St Microelectronics Srl | Dispositivo mosfet incapsulato ad alta tensione e dotato di clip di connessione e relativo procedimento di fabbricazione |
DE102021101010A1 (de) * | 2021-01-19 | 2022-07-21 | Infineon Technologies Ag | Vorgehäuster chip, verfahren zum herstellen eines vorgehäusten chips, halbleitergehäuse und verfahren zum herstellen eines halbleitergehäuses |
US11770902B2 (en) | 2021-01-27 | 2023-09-26 | Wuxi Shennan Circuits Co., Ltd. | Circuit board, preparation method thereof, and electronic device |
CN114828398A (zh) * | 2021-01-27 | 2022-07-29 | 无锡深南电路有限公司 | 一种电路板及其制造方法 |
US20220310475A1 (en) * | 2021-03-24 | 2022-09-29 | Navitas Semiconductor Limited | Electronic packages with integral heat spreaders |
US20230142729A1 (en) * | 2021-11-08 | 2023-05-11 | Analog Devices, Inc. | Integrated device package with an integrated heat sink |
JP2023079124A (ja) * | 2021-11-26 | 2023-06-07 | 国立大学法人東北大学 | パワー半導体素子及びパワー半導体モジュール |
EP4216268A1 (en) * | 2022-01-21 | 2023-07-26 | Infineon Technologies Austria AG | Chip-substrate composite semiconductor device |
EP4216271A1 (en) * | 2022-01-21 | 2023-07-26 | Infineon Technologies Austria AG | Semiconductor package including a chip-substrate composite semiconductor device |
CN114664758A (zh) * | 2022-03-20 | 2022-06-24 | 上海沛塬电子有限公司 | 一种高频大功率封装模组及其制作方法 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW449844B (en) * | 1997-05-17 | 2001-08-11 | Hyundai Electronics Ind | Ball grid array package having an integrated circuit chip |
JP2001024312A (ja) | 1999-07-13 | 2001-01-26 | Taiyo Yuden Co Ltd | 電子装置の製造方法及び電子装置並びに樹脂充填方法 |
FI119215B (fi) | 2002-01-31 | 2008-08-29 | Imbera Electronics Oy | Menetelmä komponentin upottamiseksi alustaan ja elektroniikkamoduuli |
JP2004056082A (ja) * | 2002-05-31 | 2004-02-19 | Ngk Spark Plug Co Ltd | 配線基板およびその製造方法 |
US7268425B2 (en) * | 2003-03-05 | 2007-09-11 | Intel Corporation | Thermally enhanced electronic flip-chip packaging with external-connector-side die and method |
WO2005001943A1 (en) * | 2003-06-30 | 2005-01-06 | Koninklijke Philips Electronics N.V. | Light-emitting diode thermal management system |
KR100543729B1 (ko) | 2004-03-24 | 2006-01-20 | 아바고테크놀로지스코리아 주식회사 | 열 방출 효율이 높고 두께는 물론 크기를 감소시킨 고주파모듈 패키지 및 그 조립 방법 |
JP4339739B2 (ja) * | 2004-04-26 | 2009-10-07 | 太陽誘電株式会社 | 部品内蔵型多層基板 |
JP4800606B2 (ja) | 2004-11-19 | 2011-10-26 | Okiセミコンダクタ株式会社 | 素子内蔵基板の製造方法 |
JP4535002B2 (ja) | 2005-09-28 | 2010-09-01 | Tdk株式会社 | 半導体ic内蔵基板及びその製造方法 |
US7572681B1 (en) | 2005-12-08 | 2009-08-11 | Amkor Technology, Inc. | Embedded electronic component package |
KR100802393B1 (ko) * | 2007-02-15 | 2008-02-13 | 삼성전기주식회사 | 패키지 기판 및 그 제조방법 |
CN101663926B (zh) | 2007-05-02 | 2011-10-05 | 株式会社村田制作所 | 部件内置模块及其制造方法 |
KR101463075B1 (ko) * | 2008-02-04 | 2014-11-20 | 페어차일드코리아반도체 주식회사 | 히트 싱크 패키지 |
KR100972431B1 (ko) * | 2008-03-25 | 2010-07-26 | 삼성전기주식회사 | 임베디드 인쇄회로기판 및 그 제조방법 |
CN201448798U (zh) * | 2009-04-24 | 2010-05-05 | 东莞市星火机电设备工程有限公司 | Led灯散热装置 |
US8810008B2 (en) * | 2010-03-18 | 2014-08-19 | Nec Corporation | Semiconductor element-embedded substrate, and method of manufacturing the substrate |
US9142426B2 (en) | 2011-06-20 | 2015-09-22 | Cyntec Co., Ltd. | Stack frame for electrical connections and the method to fabricate thereof |
KR20130014122A (ko) | 2011-07-29 | 2013-02-07 | 삼성전기주식회사 | 전자 소자 내장 인쇄회로기판 및 그 제조방법 |
US8614502B2 (en) * | 2011-08-03 | 2013-12-24 | Bridge Semiconductor Corporation | Three dimensional semiconductor assembly board with bump/flange supporting board, coreless build-up circuitry and built-in electronic device |
US10636735B2 (en) | 2011-10-14 | 2020-04-28 | Cyntec Co., Ltd. | Package structure and the method to fabricate thereof |
JP6189015B2 (ja) * | 2012-04-19 | 2017-08-30 | 昭和電工株式会社 | 放熱装置および放熱装置の製造方法 |
SG10201400396WA (en) * | 2014-03-05 | 2015-10-29 | Delta Electronics Int’L Singapore Pte Ltd | Package structure and stacked package module with the same |
-
2014
- 2014-03-05 SG SG10201400390YA patent/SG10201400390YA/en unknown
- 2014-03-31 US US14/230,865 patent/US9425131B2/en active Active
- 2014-03-31 CN CN201410127108.7A patent/CN104900609B/zh active Active
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US20150255380A1 (en) | 2015-09-10 |
CN104900609B (zh) | 2018-07-20 |
CN104900609A (zh) | 2015-09-09 |
US9425131B2 (en) | 2016-08-23 |
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