PT2601822T - Método para formar depósitos de solda e estruturas protuberantes não fundentes sobre substratos - Google Patents

Método para formar depósitos de solda e estruturas protuberantes não fundentes sobre substratos

Info

Publication number
PT2601822T
PT2601822T PT117379669T PT11737966T PT2601822T PT 2601822 T PT2601822 T PT 2601822T PT 117379669 T PT117379669 T PT 117379669T PT 11737966 T PT11737966 T PT 11737966T PT 2601822 T PT2601822 T PT 2601822T
Authority
PT
Portugal
Prior art keywords
substrates
form solder
bump structures
solder deposits
melting bump
Prior art date
Application number
PT117379669T
Other languages
English (en)
Inventor
Matejat Kai-Jens
Lamprecht Sven
Ewert Ingo
Schoenenberger Catherine
Kress Jürgen
Original Assignee
Atotech Deutschland Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from EP10171612A external-priority patent/EP2416634A1/en
Priority claimed from EP11160014A external-priority patent/EP2506690A1/en
Application filed by Atotech Deutschland Gmbh filed Critical Atotech Deutschland Gmbh
Publication of PT2601822T publication Critical patent/PT2601822T/pt

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3473—Plating of solder
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
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    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0577—Double layer of resist having the same pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
PT117379669T 2010-08-02 2011-07-29 Método para formar depósitos de solda e estruturas protuberantes não fundentes sobre substratos PT2601822T (pt)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP10171612A EP2416634A1 (en) 2010-08-02 2010-08-02 Method to form solder deposits on substrates
EP11160014A EP2506690A1 (en) 2011-03-28 2011-03-28 Method to form solder deposits and non-melting bump structures on substrates

Publications (1)

Publication Number Publication Date
PT2601822T true PT2601822T (pt) 2019-10-28

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EP (1) EP2601822B1 (pt)
JP (1) JP2013534367A (pt)
KR (2) KR102055459B1 (pt)
CN (1) CN103053228B (pt)
PT (1) PT2601822T (pt)
TW (1) TW201212138A (pt)
WO (1) WO2012016932A1 (pt)

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EP2601822B1 (en) 2019-07-10
KR20140000663A (ko) 2014-01-03
CN103053228A (zh) 2013-04-17
KR20190014128A (ko) 2019-02-11
TW201212138A (en) 2012-03-16
EP2601822A1 (en) 2013-06-12
US20130105329A1 (en) 2013-05-02
JP2013534367A (ja) 2013-09-02
KR102055459B1 (ko) 2019-12-12
WO2012016932A1 (en) 2012-02-09
CN103053228B (zh) 2016-10-05

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