KR970077548A - 유체 상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 - Google Patents
유체 상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 Download PDFInfo
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- KR970077548A KR970077548A KR1019960015464A KR19960015464A KR970077548A KR 970077548 A KR970077548 A KR 970077548A KR 1019960015464 A KR1019960015464 A KR 1019960015464A KR 19960015464 A KR19960015464 A KR 19960015464A KR 970077548 A KR970077548 A KR 970077548A
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Abstract
본 발명은 리드 프레임의 내부 리드 상에 반도체 칩을 실장시키는 반도체 칩 패키지의 제조공정에 있어서, 상기 내부 리드들의 말단부가 서로 연결되어 있고, 각 내부 리드들간의 간격이 일정하게 유지되도록 복수 개의 더미 리드들을 포함하고 있으며, 최외각의 내부 리드들의 다른 내부 리드들보다 큰 폭을 갖도록 설계된 리드 프레임 준비 단계와, 상기 리드 프레임의 내부 리드 하면에 유체 상태의 접착제를 도포시키는 접착제 도포단계와, 도포된 상기 접착제를 경화시키는 건조 단계와, 열압착 수단으로 상기 반도체 칩을 상기 접착제가 도포된 상기 리드 프레임의 하면에 열압착 시키는 열압착 단계를 구비하는 것을 특징으로 하는 반도체 칩 실장방법 및 그에 이용되는 리드 프레임에 관한 것으로, 접착 부분의 크기 및 두께의 제어가 가능하여 패키지 내로의 흡습량을 감소시켜 신뢰성을 향상시킬 수 있으며, 접착 테이프를 사용하는 것에 비해 원가를 크게 절감시키는 효과를 나타낸다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 따른 LOC형 반도체 칩 패키지의 LOC형 반도체 칩 패키지의 리드 프레임에 접착제가 도포된 상태를 나타낸 저면도.
Claims (16)
- 리드 프레임의 내부 리드 상에 반도체 칩을 실장시키는 반도체 칩 패키지의 제조공정에 있어서, 상기 내부 리드들의 말단부가 서로 연결되어 있고, 각 내부 리드글간의 간격이 일정하게 유지되도록 복수 개의 더미 리드들을 포함하고 있으며, 최외각의 내부 리드들이 다른 내부 리드들보다 큰 폭을 갖도록 설계된 리드 프레임준비 단계와, 상기 리드 프레임의 내부 리드 하면에 유체 상태의 접착제를 도포시키는 접착제 도포 단계와, 도포된 상기 접착제를 경화시키는 건조 단계와, 열압착 수다능로 상기 반도체 칩을 상기 접착제가 도포된 상기 리드 프레임의 하면에 열압착 시키는 열압착 단계를 구비하는 것을 특징으로 하는 반도체 칩 실장 방법.
- 제1항에 있어서, 상기 접착제 도포 단계가 복수 개의 분배 수단에 의해 진행되는 것을 특징으로 하는 반도체 칩 실장 방법.
- 제1항 또는 제2항에 있어서, 상기 접착제 도포 단계가 상기 리드들이 배열되어 있는 열의 수만큼 분배 수단에 의해 동시에 이루어지는 것을 특징으로 하는 반도체 칩 실장 방법.
- 제1항에 있어서, 상기 분배 수단이 시린지(syringe)인 것을 특징으로 하는 반도체 칩 실장 방법.
- 제1항에 있어서, 상기 접착제 도포 단계가 마스크를 이용한 스크린 프린팅 방법으로 이루어진 것을 특징으로 하는 반도체 칩 실장 방법.
- 제1항에 있어서, 상기 접착제 도포 단계가 스프레이 방식으로 이루어진 것을 특징으로 하는 반도체 칩 실장 방법.
- 소정의 간격으로 배열된 내부 리드를 갖는 LOC형 반도체에 칩 패키지의 리드 프레임에 있어서, 상기 리드들간에 균일한 간격을 이루도록 더미 리드가 형성된 것을 특징으로 하는LOC형 반도체 칩 패키지의 리드 프레임.
- 제7항에 있어서, 상기 더미 리드가 복수 개인 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제7항에 있어서, 상기 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제7항에 있어서, 상기 리드들이 접착력을 좋게 하기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제7항 또는 제8항에 있어서, 상기 더미 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제7항 또는 제8항에 있어서, 상기 더미 리드들이 접착력을 좋게 하기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 소정의 간격으로 배열된 내부 리드를 갖는 LOC형 반도체 칩 패키지의 리드 프레임에 있어서, 상기 리드들중 최외각 부분에 위치한 리드들의 말단부가 다른 리드들의 표면적 보다 큰 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제13항에 있어서, 상기 최외각 부분의 리드들이 표면적을 증가시키기 의하여 다른 리드의 단방향 폭보다 큰 폭을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제13항에 있어서, 상기 최외각 부분의 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
- 제13항에 있어서, 상기 최외각 부분의 리드들이 표면적을 증가시키기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960015464A KR0174983B1 (ko) | 1996-05-10 | 1996-05-10 | 유체상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 |
JP9105762A JP2914624B2 (ja) | 1996-05-10 | 1997-04-23 | リードフレームに液状の接着剤を塗布して形成された不連続的な接着層を有するリードオンチップ半導体パッケージ及びその製造方法 |
US08/853,907 US5923957A (en) | 1996-05-10 | 1997-05-09 | Process for manufacturing a lead-on-chip semiconductor device package having a discontinuous adhesive layer formed from liquid adhesive |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019960015464A KR0174983B1 (ko) | 1996-05-10 | 1996-05-10 | 유체상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 |
Publications (2)
Publication Number | Publication Date |
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KR970077548A true KR970077548A (ko) | 1997-12-12 |
KR0174983B1 KR0174983B1 (ko) | 1999-02-01 |
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KR1019960015464A KR0174983B1 (ko) | 1996-05-10 | 1996-05-10 | 유체상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 |
Country Status (3)
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US (1) | US5923957A (ko) |
JP (1) | JP2914624B2 (ko) |
KR (1) | KR0174983B1 (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100493189B1 (ko) * | 1997-12-29 | 2005-09-26 | 삼성테크윈 주식회사 | 리이드프레임제조방법 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
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US6336973B1 (en) * | 1997-08-05 | 2002-01-08 | Micron Technology, Inc. | Apparatus and method for modifying the configuration of an exposed surface of a viscous fluid |
US6013535A (en) | 1997-08-05 | 2000-01-11 | Micron Technology, Inc. | Method for applying adhesives to a lead frame |
US6040205A (en) * | 1997-08-05 | 2000-03-21 | Micron Technology, Inc. | Apparatus and method for controlling the depth of immersion of a semiconductor element in an exposed surface of a viscous fluid |
US6110761A (en) * | 1997-08-05 | 2000-08-29 | Micron Technology, Inc. | Methods for simultaneously electrically and mechanically attaching lead frames to semiconductor dice and the resulting elements |
US6204093B1 (en) * | 1997-08-21 | 2001-03-20 | Micron Technology, Inc. | Method and apparatus for applying viscous materials to a lead frame |
US6387732B1 (en) | 1999-06-18 | 2002-05-14 | Micron Technology, Inc. | Methods of attaching a semiconductor chip to a leadframe with a footprint of about the same size as the chip and packages formed thereby |
KR100335481B1 (ko) * | 1999-09-13 | 2002-05-04 | 김덕중 | 멀티 칩 패키지 구조의 전력소자 |
US6603195B1 (en) * | 2000-06-28 | 2003-08-05 | International Business Machines Corporation | Planarized plastic package modules for integrated circuits |
JP2006032871A (ja) * | 2004-07-22 | 2006-02-02 | Toshiba Corp | 半導体装置 |
US8530279B2 (en) * | 2008-09-11 | 2013-09-10 | Texas Instruments Incorporated | Offset gravure printing process for improved mold compound and die attach adhesive adhesion on leadframe surface using selective adhesion promoter |
JP4360446B1 (ja) * | 2008-10-16 | 2009-11-11 | 住友ベークライト株式会社 | 半導体装置の製造方法及び半導体装置 |
Family Cites Families (4)
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KR0158868B1 (ko) * | 1988-09-20 | 1998-12-01 | 미다 가쓰시게 | 반도체장치 |
US5583375A (en) * | 1990-06-11 | 1996-12-10 | Hitachi, Ltd. | Semiconductor device with lead structure within the planar area of the device |
US5086018A (en) * | 1991-05-02 | 1992-02-04 | International Business Machines Corporation | Method of making a planarized thin film covered wire bonded semiconductor package |
US5286679A (en) * | 1993-03-18 | 1994-02-15 | Micron Technology, Inc. | Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer |
-
1996
- 1996-05-10 KR KR1019960015464A patent/KR0174983B1/ko not_active IP Right Cessation
-
1997
- 1997-04-23 JP JP9105762A patent/JP2914624B2/ja not_active Expired - Fee Related
- 1997-05-09 US US08/853,907 patent/US5923957A/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100493189B1 (ko) * | 1997-12-29 | 2005-09-26 | 삼성테크윈 주식회사 | 리이드프레임제조방법 |
Also Published As
Publication number | Publication date |
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US5923957A (en) | 1999-07-13 |
JP2914624B2 (ja) | 1999-07-05 |
KR0174983B1 (ko) | 1999-02-01 |
JPH1050918A (ja) | 1998-02-20 |
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