KR970077548A - 유체 상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 - Google Patents

유체 상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 Download PDF

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KR970077548A
KR970077548A KR1019960015464A KR19960015464A KR970077548A KR 970077548 A KR970077548 A KR 970077548A KR 1019960015464 A KR1019960015464 A KR 1019960015464A KR 19960015464 A KR19960015464 A KR 19960015464A KR 970077548 A KR970077548 A KR 970077548A
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semiconductor chip
leads
lead frame
chip package
type semiconductor
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KR1019960015464A
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KR0174983B1 (ko
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송영재
서정우
안승호
황찬승
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김광호
삼성전자 주식회사
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Priority to KR1019960015464A priority Critical patent/KR0174983B1/ko
Priority to JP9105762A priority patent/JP2914624B2/ja
Priority to US08/853,907 priority patent/US5923957A/en
Publication of KR970077548A publication Critical patent/KR970077548A/ko
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Publication of KR0174983B1 publication Critical patent/KR0174983B1/ko

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Abstract

본 발명은 리드 프레임의 내부 리드 상에 반도체 칩을 실장시키는 반도체 칩 패키지의 제조공정에 있어서, 상기 내부 리드들의 말단부가 서로 연결되어 있고, 각 내부 리드들간의 간격이 일정하게 유지되도록 복수 개의 더미 리드들을 포함하고 있으며, 최외각의 내부 리드들의 다른 내부 리드들보다 큰 폭을 갖도록 설계된 리드 프레임 준비 단계와, 상기 리드 프레임의 내부 리드 하면에 유체 상태의 접착제를 도포시키는 접착제 도포단계와, 도포된 상기 접착제를 경화시키는 건조 단계와, 열압착 수단으로 상기 반도체 칩을 상기 접착제가 도포된 상기 리드 프레임의 하면에 열압착 시키는 열압착 단계를 구비하는 것을 특징으로 하는 반도체 칩 실장방법 및 그에 이용되는 리드 프레임에 관한 것으로, 접착 부분의 크기 및 두께의 제어가 가능하여 패키지 내로의 흡습량을 감소시켜 신뢰성을 향상시킬 수 있으며, 접착 테이프를 사용하는 것에 비해 원가를 크게 절감시키는 효과를 나타낸다.

Description

유체 상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 LOC형 반도체 칩 패키지의 리드 프레임
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 따른 LOC형 반도체 칩 패키지의 LOC형 반도체 칩 패키지의 리드 프레임에 접착제가 도포된 상태를 나타낸 저면도.

Claims (16)

  1. 리드 프레임의 내부 리드 상에 반도체 칩을 실장시키는 반도체 칩 패키지의 제조공정에 있어서, 상기 내부 리드들의 말단부가 서로 연결되어 있고, 각 내부 리드글간의 간격이 일정하게 유지되도록 복수 개의 더미 리드들을 포함하고 있으며, 최외각의 내부 리드들이 다른 내부 리드들보다 큰 폭을 갖도록 설계된 리드 프레임준비 단계와, 상기 리드 프레임의 내부 리드 하면에 유체 상태의 접착제를 도포시키는 접착제 도포 단계와, 도포된 상기 접착제를 경화시키는 건조 단계와, 열압착 수다능로 상기 반도체 칩을 상기 접착제가 도포된 상기 리드 프레임의 하면에 열압착 시키는 열압착 단계를 구비하는 것을 특징으로 하는 반도체 칩 실장 방법.
  2. 제1항에 있어서, 상기 접착제 도포 단계가 복수 개의 분배 수단에 의해 진행되는 것을 특징으로 하는 반도체 칩 실장 방법.
  3. 제1항 또는 제2항에 있어서, 상기 접착제 도포 단계가 상기 리드들이 배열되어 있는 열의 수만큼 분배 수단에 의해 동시에 이루어지는 것을 특징으로 하는 반도체 칩 실장 방법.
  4. 제1항에 있어서, 상기 분배 수단이 시린지(syringe)인 것을 특징으로 하는 반도체 칩 실장 방법.
  5. 제1항에 있어서, 상기 접착제 도포 단계가 마스크를 이용한 스크린 프린팅 방법으로 이루어진 것을 특징으로 하는 반도체 칩 실장 방법.
  6. 제1항에 있어서, 상기 접착제 도포 단계가 스프레이 방식으로 이루어진 것을 특징으로 하는 반도체 칩 실장 방법.
  7. 소정의 간격으로 배열된 내부 리드를 갖는 LOC형 반도체에 칩 패키지의 리드 프레임에 있어서, 상기 리드들간에 균일한 간격을 이루도록 더미 리드가 형성된 것을 특징으로 하는LOC형 반도체 칩 패키지의 리드 프레임.
  8. 제7항에 있어서, 상기 더미 리드가 복수 개인 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  9. 제7항에 있어서, 상기 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  10. 제7항에 있어서, 상기 리드들이 접착력을 좋게 하기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  11. 제7항 또는 제8항에 있어서, 상기 더미 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  12. 제7항 또는 제8항에 있어서, 상기 더미 리드들이 접착력을 좋게 하기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  13. 소정의 간격으로 배열된 내부 리드를 갖는 LOC형 반도체 칩 패키지의 리드 프레임에 있어서, 상기 리드들중 최외각 부분에 위치한 리드들의 말단부가 다른 리드들의 표면적 보다 큰 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  14. 제13항에 있어서, 상기 최외각 부분의 리드들이 표면적을 증가시키기 의하여 다른 리드의 단방향 폭보다 큰 폭을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  15. 제13항에 있어서, 상기 최외각 부분의 리드들이 접착력을 좋게 하기 위한 홈을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
  16. 제13항에 있어서, 상기 최외각 부분의 리드들이 표면적을 증가시키기 위한 홀을 갖는 것을 특징으로 하는 LOC형 반도체 칩 패키지의 리드 프레임.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019960015464A 1996-05-10 1996-05-10 유체상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임 KR0174983B1 (ko)

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KR1019960015464A KR0174983B1 (ko) 1996-05-10 1996-05-10 유체상태의 접착제를 이용한 반도체 칩 실장 방법 및 그에 이용되는 loc형 반도체 칩 패키지의 리드 프레임
JP9105762A JP2914624B2 (ja) 1996-05-10 1997-04-23 リードフレームに液状の接着剤を塗布して形成された不連続的な接着層を有するリードオンチップ半導体パッケージ及びその製造方法
US08/853,907 US5923957A (en) 1996-05-10 1997-05-09 Process for manufacturing a lead-on-chip semiconductor device package having a discontinuous adhesive layer formed from liquid adhesive

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