KR970067815A - 다층 구조의 도금층을 구비한 반도체 리드 프레임 - Google Patents
다층 구조의 도금층을 구비한 반도체 리드 프레임 Download PDFInfo
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- KR970067815A KR970067815A KR1019960008361A KR19960008361A KR970067815A KR 970067815 A KR970067815 A KR 970067815A KR 1019960008361 A KR1019960008361 A KR 1019960008361A KR 19960008361 A KR19960008361 A KR 19960008361A KR 970067815 A KR970067815 A KR 970067815A
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
- C23C28/021—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material including at least one metal alloy layer
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
- C23C28/02—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material
- C23C28/023—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D only coatings only including layers of metallic material only coatings of metal elements only
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- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/10—Electroplating with more than one layer of the same or of different metals
- C25D5/12—Electroplating with more than one layer of the same or of different metals at least one layer being of nickel or chromium
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- C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
- C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
- C25D5/60—Electroplating characterised by the structure or texture of the layers
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- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48663—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
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- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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Abstract
본 발명은 도금층의 구조가 개선된 반도체 리드 프레임에 관하여 개시한 것으로서, 본 발명의 특징에 의하면, 중간 도금층으로 형성한 Ni 도금층 위에 Pd 스트라이크 도금 층을 형성하고 최외곽 도금층으로 Pd-X조성합금 도금층을 형성한 다층 구조의 도금층을 구비한 것으로, Pd 스트라이크 도금층이 중간층인 Ni 도금층 표면의 기공을 은폐시키고 표면조도의 균일화로 최외곽의 Pd-X 조성 합금 도금층의 두께를 균일하게 유지하여 내식성을 높이는 동시에, 접착력 강화를 통해 생성 및 진행을 최소화시킴으로써 와이어 본딩성 및 납땜성 등 리드 프레임의 제반 특성을 향상시키고, 반도체 패키지 공정에 있어서의 높은 수율을 기대할 수 있어 생산성 향상을 도모할 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제5도는 본 발명에 따라 적용된 반도체 리드 프레임의 도금층 구조를 나타내 보인 개략적 단면도이다.
Claims (7)
- 반도체 리드 프레임을 이루고 있는 금속 소재의 기판과, 상기 기판 위에 형성된 Ni 도금층과, 상기 Ni 도금층 위에 형성된 Pd 스트라이크 도금 층과, Pd 스트라이크 도금층 위체 형성된 Pd-X 조성 합금 도금층을 포함하는 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항에 있어서, 상기 기판은 Cu, Cu 합금, Ni 합금 중 어느 하나인 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항 또는 제2항에 있어서, 상기 기판은 0.1 내지 3.0mm 범위의 두께로 형성된 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항에 있어서, 상기 Pd-X 조성 합금은 Pd를 주성분으로 하고 Au, Co, W, AG, Ti, Mo, Sn 중 어느 하나의 원소가 첨가되는 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항 또는 제4항에 있어서, 상기 Pd-X 조성 합금 도금층은 0.1 내지 2.0㎛ 범위의 두께로 형성되는 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항에 있어서, 상기 Ni 도금층은 0.1 내지 2.0㎛ 범위의 두께로 형성되는 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
- 제1항에 있어서, 상기 Pd 스트라이크 도금층은 0.0051 내지 0.05㎛ 범위의 두께로 형성되는 것을 특징으로하는 다층 구조의 도금층을 구비한 반도체 리드 프레임.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019960008361A KR0183645B1 (ko) | 1996-03-26 | 1996-03-26 | 다층 구조의 도금층을 구비한 반도체 리드 프레임 |
TW086100256A TW387135B (en) | 1996-03-26 | 1997-01-11 | Semiconductor lead frame |
US08/792,211 US5767574A (en) | 1996-03-26 | 1997-01-31 | Semiconductor lead frame |
JP9018362A JPH09266280A (ja) | 1996-03-26 | 1997-01-31 | 半導体素子実装用リードフレーム |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1019960008361A KR0183645B1 (ko) | 1996-03-26 | 1996-03-26 | 다층 구조의 도금층을 구비한 반도체 리드 프레임 |
Publications (2)
Publication Number | Publication Date |
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KR970067815A true KR970067815A (ko) | 1997-10-13 |
KR0183645B1 KR0183645B1 (ko) | 1999-03-20 |
Family
ID=19453975
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019960008361A KR0183645B1 (ko) | 1996-03-26 | 1996-03-26 | 다층 구조의 도금층을 구비한 반도체 리드 프레임 |
Country Status (4)
Country | Link |
---|---|
US (1) | US5767574A (ko) |
JP (1) | JPH09266280A (ko) |
KR (1) | KR0183645B1 (ko) |
TW (1) | TW387135B (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100708299B1 (ko) * | 2005-04-12 | 2007-04-17 | 주식회사 아큐텍반도체기술 | 전자장치 제조용 다층금속 기판 |
KR20120121799A (ko) * | 2011-04-27 | 2012-11-06 | 엘지이노텍 주식회사 | 리드프레임, 이를 이용한 반도체 패키지 및 그 제조방법 |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR970067816A (ko) * | 1996-03-26 | 1997-10-13 | 이대원 | 집적회로용 리드프레임 및 그 제조방법 |
US6521358B1 (en) * | 1997-03-04 | 2003-02-18 | Matsushita Electric Industrial Co., Ltd. | Lead frame for semiconductor device and method of producing same |
US6180999B1 (en) * | 1997-08-29 | 2001-01-30 | Texas Instruments Incorporated | Lead-free and cyanide-free plating finish for semiconductor lead frames |
US6087712A (en) * | 1997-12-26 | 2000-07-11 | Samsung Aerospace Industries, Ltd. | Lead frame containing leads plated with tin alloy for increased wettability and method for plating the leads |
EP0946086A1 (en) | 1998-03-23 | 1999-09-29 | STMicroelectronics S.r.l. | Plated leadframes with cantilever leads |
KR100275381B1 (ko) * | 1998-04-18 | 2000-12-15 | 이중구 | 반도체 패키지용 리드프레임 및 리드프레임도금방법 |
US6376901B1 (en) * | 1999-06-08 | 2002-04-23 | Texas Instruments Incorporated | Palladium-spot leadframes for solder plated semiconductor devices and method of fabrication |
US6469386B1 (en) * | 1999-10-01 | 2002-10-22 | Samsung Aerospace Industries, Ltd. | Lead frame and method for plating the same |
KR100450091B1 (ko) * | 1999-10-01 | 2004-09-30 | 삼성테크윈 주식회사 | 반도체 장치용 다층 도금 리드 프레임 |
JP2001185670A (ja) * | 1999-12-10 | 2001-07-06 | Texas Instr Inc <Ti> | リードフレームとその製法 |
US6838757B2 (en) * | 2000-07-07 | 2005-01-04 | Texas Instruments Incorporated | Preplating of semiconductor small outline no-lead leadframes |
US6812552B2 (en) * | 2002-04-29 | 2004-11-02 | Advanced Interconnect Technologies Limited | Partially patterned lead frames and methods of making and using the same in semiconductor packaging |
US7799611B2 (en) * | 2002-04-29 | 2010-09-21 | Unisem (Mauritius) Holdings Limited | Partially patterned lead frames and methods of making and using the same in semiconductor packaging |
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US6808997B2 (en) | 2003-03-21 | 2004-10-26 | Texas Instruments Incorporated | Complementary junction-narrowing implants for ultra-shallow junctions |
KR100673951B1 (ko) | 2004-06-23 | 2007-01-24 | 삼성테크윈 주식회사 | 반도체 팩키지용 리드 프레임 |
US7215014B2 (en) * | 2004-07-29 | 2007-05-08 | Freescale Semiconductor, Inc. | Solderable metal finish for integrated circuit package leads and method for forming |
US7507605B2 (en) * | 2004-12-30 | 2009-03-24 | Texas Instruments Incorporated | Low cost lead-free preplated leadframe having improved adhesion and solderability |
DE102005006281B4 (de) * | 2005-02-10 | 2014-07-17 | Infineon Technologies Ag | Hochfrequenzleistungsbauteil mit Goldbeschichtungen und Verfahren zur Herstellung desselben |
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US7309909B2 (en) * | 2005-09-21 | 2007-12-18 | Texas Instruments Incorporated | Leadframes for improved moisture reliability of semiconductor devices |
JP2008091818A (ja) * | 2006-10-05 | 2008-04-17 | Matsushita Electric Ind Co Ltd | 光半導体装置用リードフレームおよびこれを用いた光半導体装置、並びにこれらの製造方法 |
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CN101983435B (zh) | 2008-09-30 | 2013-07-24 | 松下电器产业株式会社 | 光学半导体装置用封装和使用了该封装的光学半导体装置、以及它们的制造方法 |
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JP5570488B2 (ja) | 2011-10-14 | 2014-08-13 | 住友ゴム工業株式会社 | 空気入りタイヤ |
KR20140043955A (ko) * | 2012-09-21 | 2014-04-14 | 삼성전기주식회사 | 전극 패드, 이를 이용한 인쇄 회로 기판 및 그의 제조 방법 |
KR101733119B1 (ko) * | 2014-08-25 | 2017-05-08 | 고지마 가가쿠 야쿠힌 가부시키가이샤 | 환원형 무전해 금도금액 및 그 도금액을 이용한 무전해 금도금 방법 |
US20180053714A1 (en) * | 2016-08-18 | 2018-02-22 | Rohm And Haas Electronic Materials Llc | Multi-layer electrical contact element |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5030587B1 (ko) * | 1969-07-02 | 1975-10-02 | ||
US4141029A (en) * | 1977-12-30 | 1979-02-20 | Texas Instruments Incorporated | Integrated circuit device |
US4441118A (en) * | 1983-01-13 | 1984-04-03 | Olin Corporation | Composite copper nickel alloys with improved solderability shelf life |
US4529667A (en) * | 1983-04-06 | 1985-07-16 | The Furukawa Electric Company, Ltd. | Silver-coated electric composite materials |
US4486511A (en) * | 1983-06-27 | 1984-12-04 | National Semiconductor Corporation | Solder composition for thin coatings |
US5001546A (en) * | 1983-07-27 | 1991-03-19 | Olin Corporation | Clad metal lead frame substrates |
JPS6418246A (en) * | 1987-07-14 | 1989-01-23 | Shinko Electric Ind Co | Lead frame for semiconductor device |
US5138431A (en) * | 1990-01-31 | 1992-08-11 | Vlsi Technology, Inc. | Lead and socket structures with reduced self-inductance |
KR920000127A (ko) * | 1990-02-26 | 1992-01-10 | 미다 가쓰시게 | 반도체 패키지와 그것을 위한 리드프레임 |
US5384155A (en) * | 1992-06-04 | 1995-01-24 | Texas Instruments Incorporated | Silver spot/palladium plate lead frame finish |
JPH0714962A (ja) * | 1993-04-28 | 1995-01-17 | Mitsubishi Shindoh Co Ltd | リードフレーム材およびリードフレーム |
US5360991A (en) * | 1993-07-29 | 1994-11-01 | At&T Bell Laboratories | Integrated circuit devices with solderable lead frame |
US5650661A (en) * | 1993-12-27 | 1997-07-22 | National Semiconductor Corporation | Protective coating combination for lead frames |
US5454929A (en) * | 1994-06-16 | 1995-10-03 | National Semiconductor Corporation | Process for preparing solderable integrated circuit lead frames by plating with tin and palladium |
KR960039315A (ko) * | 1995-04-06 | 1996-11-25 | 이대원 | 리드프레임 제조방법 |
JPH09275182A (ja) * | 1996-04-02 | 1997-10-21 | Seiichi Serizawa | 半導体装置用リ−ドフレ−ム |
-
1996
- 1996-03-26 KR KR1019960008361A patent/KR0183645B1/ko not_active IP Right Cessation
-
1997
- 1997-01-11 TW TW086100256A patent/TW387135B/zh not_active IP Right Cessation
- 1997-01-31 JP JP9018362A patent/JPH09266280A/ja active Pending
- 1997-01-31 US US08/792,211 patent/US5767574A/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100708299B1 (ko) * | 2005-04-12 | 2007-04-17 | 주식회사 아큐텍반도체기술 | 전자장치 제조용 다층금속 기판 |
KR20120121799A (ko) * | 2011-04-27 | 2012-11-06 | 엘지이노텍 주식회사 | 리드프레임, 이를 이용한 반도체 패키지 및 그 제조방법 |
Also Published As
Publication number | Publication date |
---|---|
TW387135B (en) | 2000-04-11 |
JPH09266280A (ja) | 1997-10-07 |
KR0183645B1 (ko) | 1999-03-20 |
US5767574A (en) | 1998-06-16 |
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