KR970067720A - 신뢰성있는 반도체 소자를 제조하기 위한 방법 - Google Patents

신뢰성있는 반도체 소자를 제조하기 위한 방법 Download PDF

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KR970067720A
KR970067720A KR1019970010308A KR19970010308A KR970067720A KR 970067720 A KR970067720 A KR 970067720A KR 1019970010308 A KR1019970010308 A KR 1019970010308A KR 19970010308 A KR19970010308 A KR 19970010308A KR 970067720 A KR970067720 A KR 970067720A
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forming
silicon nitride
nitride film
insulating film
cvd
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KR100219102B1 (ko
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히라꾸 이시가와
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가네꼬 히사시
닛본덴기 가부시끼가이샤
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    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract

대기압 CVD에 의해 제1실리콘 산화물 막을 형성하는 단계, 저압 CVD에 의해 두께 30Å 내지 200Å으로 실리콘 질화물 막을 형성하는 단계, 기판에 무선 주파수 전계를 인가하면서 소스 재료로서 실레인 개스를 사용하여 바이어스된 전자 싸이클로트론 공진 CVD(ECR-CVD)에 의해 실리콘 산화물 막을 형성하는 단계를 포함하는 핫 캐리어 문제에 대한 높은 내구성과 신뢰성 있는 트랜지스터 특성을 갖는 반도체 소자의 제조 방법이 개시된다. ECR-CV7D 실리콘 산화물 막은 충분한 양의 액티브 수소 이온을 제공하며, 실리콘 질화물 막은 충분한 양의 액티브 수소 이온이 통과하는 것을 허용하여 핫 캐리어 문제를 없애고, 플라즈마 손상으로부터 트랜지스터 특성을 회복하게 해준다.

Description

신뢰성 있는 반도체 소자를 제조하기 위한 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제3도는 본 발명의 실시예에 따른 방법에서 사용되는 바이어스된 ECR-CVD장치의 단면도

Claims (8)

  1. 반도체 소자를 형성하는 방법에 있어서, 반도체 기판상에 트랜지스터를 위한 액티브 층을 형성하는 단계; 상기 액티브 층 위에 놓여 있는 제1절연막을 형성하는 단계; 상기 제1절연막 상에 실리콘 질화물 막을 형성하는 단계; 및 상기 기판에 무선 주파수 전계를 인가하면서 실리콘과 수소의 합성물을 사용한 플라즈마 강화 화학적 중기 피찹법(CVD)에 의해 상기 실리콘 질화물 막 상에 실리콘 산화물 막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
  2. 제1항에 있어서, 상기 합성물은 모노실레인,디실레인, 및 디클로로실레인으로 구성되는 그룹으로부터 선택되는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
  3. 제1항에 있어서, 상기 제1절연막과 실리콘 질화물 막은 각각 대기압 CVD와 저압 CVD에 의해 형성되는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
  4. 제1항에 있어서, 상기 실리콘 질화물 막은 30에서 200Å의 범위 내의 두께를 갖는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
  5. 반도체 소자를 제조하는 방법에 있어서, 반도체 기판 상에 트랜지스터를 위한 액티브 층을 형성하는 단계; 상기 액티브 층 위에 놓여 있는 제1절연막을 형성하는 단계; 상기 제1절연막 상에 실리콘 질화물 막을 형성하는 단계; 상기 실리콘 질화물 막 상에 제2절연막을 형성하는 단계; 상기 제1절연막, 실리콘 질화물 막, 및 제2절연막을 관통해서 상기 액티브층까지 도달하도록 금속 플러그를 형성하는 단계; 및 상기 기판에 무선 주파수 전계를 인가하면서 실리콘과 수소의 합성물을 사용한 플라즈마 강화 화학적 중기 피착(CVD)를 사용하여 상기 실리콘 질화물 막 상에 실리콘 산화물 막을 형성하는 단계를 포함하는 것을 특징으로 하는 반도체 소자를 제조하는 방법.
  6. 제5항에 있어서, 상기 합성물은 모노실레인, 디실레인, 및 디클로로실레인으로 구성되는 그룹으로부터 선택되는것을 특징으로 하는 반도체 소자를 형성하는 방법.
  7. 제5항에 있어서, 상기 제1절연막과 상기 질화물 막은 각각 대기압 CVD와 저압 CVD에 의해 형성되는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
  8. 제5항에 있어서, 상기 실리콘 질화물 막은 30Å 내지 200Å 의 범위의 두께를 가지는 것을 특징으로 하는 반도체 소자를 형성하는 방법.
KR1019970010308A 1996-03-25 1997-03-25 신뢰성있는 반도체 소자를 제조하기 위한 방법 KR100219102B1 (ko)

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JP8068130A JP2914282B2 (ja) 1996-03-25 1996-03-25 半導体装置の製造方法
JP96-068130 1996-03-25

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US6274900B1 (en) * 1998-01-05 2001-08-14 Texas Instruments Incorporated Semiconductor device architectures including UV transmissive nitride layers
US20020000664A1 (en) * 1999-02-05 2002-01-03 Lie-Yea Cheng Silicon nitride composite hdp/cvd process
JP3925366B2 (ja) 2001-10-17 2007-06-06 株式会社村田製作所 弾性表面波装置およびその製造方法
KR100399952B1 (ko) * 2001-11-16 2003-09-29 주식회사 하이닉스반도체 암전류를 감소시키기 위한 이미지센서의 제조 방법
EP2109218A4 (en) * 2007-05-25 2012-11-28 Panasonic Corp ELASTIC WAVE ELEMENT
JP7139952B2 (ja) * 2019-01-08 2022-09-21 日本電信電話株式会社 半導体光素子

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6097628A (ja) * 1983-11-01 1985-05-31 Matsushita Electronics Corp 半導体装置の製造方法
JPH01138734A (ja) * 1987-11-25 1989-05-31 Mitsubishi Electric Corp 複導電体層を有する半導体装置およびその製造方法
JPH01272121A (ja) * 1988-04-25 1989-10-31 Nippon Telegr & Teleph Corp <Ntt> スルーホール構造とその製造方法
US5200808A (en) * 1989-11-29 1993-04-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having smooth contact holes formed through multi-layer insulators of different etching speeds
JPH04186675A (ja) * 1990-11-16 1992-07-03 Matsushita Electron Corp 半導体装置
KR930009131B1 (ko) * 1991-04-24 1993-09-23 삼성전자 주식회사 초고집적 반도체 메모리장치의 제조방법
JP3583153B2 (ja) * 1991-09-13 2004-10-27 株式会社ルネサステクノロジ 半導体装置及びその製造方法
JP3362432B2 (ja) * 1992-10-31 2003-01-07 ソニー株式会社 プラズマ処理方法及びプラズマ処理装置
US5571571A (en) * 1993-06-16 1996-11-05 Applied Materials, Inc. Method of forming a thin film for a semiconductor device
JP2765478B2 (ja) * 1994-03-30 1998-06-18 日本電気株式会社 半導体装置およびその製造方法
JP2674585B2 (ja) * 1995-09-28 1997-11-12 日本電気株式会社 半導体装置の製造方法
US5554565A (en) * 1996-02-26 1996-09-10 Taiwan Semiconductor Manufacturing Company Ltd. Modified BP-TEOS tungsten-plug contact process
US5661084A (en) * 1996-10-04 1997-08-26 Taiwan Semiconductor Manufacturing Company, Ltd Method for contact profile improvement
JP3085231B2 (ja) * 1997-02-20 2000-09-04 日本電気株式会社 半導体装置の製造方法

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US6071832A (en) 2000-06-06
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JPH09260366A (ja) 1997-10-03

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