KR970067544A - 질화 규소 회로 기판 및 그 제조 방법 - Google Patents

질화 규소 회로 기판 및 그 제조 방법 Download PDF

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KR970067544A
KR970067544A KR1019970010909A KR19970010909A KR970067544A KR 970067544 A KR970067544 A KR 970067544A KR 1019970010909 A KR1019970010909 A KR 1019970010909A KR 19970010909 A KR19970010909 A KR 19970010909A KR 970067544 A KR970067544 A KR 970067544A
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silicon nitride
oxide layer
circuit board
substrate
aluminum oxide
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KR100270149B1 (ko
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다까시 다까하시
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니시무로 다이조
가부시끼가이샤 도시바
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • C04B37/00—Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
    • C04B37/021—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles in a direct manner, e.g. direct copper bonding [DCB]
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    • C04B37/023—Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles characterised by the interlayer used
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
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    • C04B2235/32—Metal oxides, mixed metal oxides, or oxide-forming salts thereof, e.g. carbonates, nitrates, (oxy)hydroxides, chlorides
    • C04B2235/3217—Aluminum oxide or oxide forming salts thereof, e.g. bauxite, alpha-alumina
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    • C04B2235/42—Non metallic elements added as constituents or additives, e.g. sulfur, phosphor, selenium or tellurium
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    • C04B2237/02—Aspects relating to interlayers, e.g. used to join ceramic articles with other articles by heating
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    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract

질화 규소 기판을 이용한 DBC 기판에 있어서, 질화 규소 기판에 대하여 DBC법을 적용할 때에 필수적인, 안정되고 충분한 두께를 갖는 산화물층을 용이하게 형성할 수 있음과 동시에, 산화물층에 의한 열저항의 증대를 억제한다.
표면에 산화 알루미늄층(2)을 갖는 질화 규소 기판(1)과, 이 질화 규소 기판(1)상에 산화 알루미늄층(2)을 사이에 두고 DBC법으로 직접 접합된 동계 회로판(4), (5)를 구비하는 질화 규소 회로가 기판(6)이다. 이 산화 알루미늄층(2)은 예를들면 초미립자 알루미나졸의 도포, 소성에 의해 형성한다. 산화 알루미늄층(2)은 질화 규소기판(1)에 대하여 열산화법 등으로 형성한 Si-O계 산화물층에 비하여 치밀하고 또 안정하다. 특히, 초미립자 알루미나졸의 도포, 소성에 의해 형성된 산화 알루미늄층(2)은 질화 규소 기판(1)과의 계면 접합성에 뛰어나다.

Description

질화 규소 회로 기판 및 그 제조 방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일 실시예에 의한 질화 규소 회로 기판의 구성을 도시하는 단면도.

Claims (9)

  1. 표면에 산화물층을 갖는 질화 규소 기판과, 상기 질화 규소 기판상에 상기 산화물층을 사이에 두고, 직접 접합된 동계(銅系) 회로판을 구비하는 질화 규소 회로 기판에 있어서, 상기 질화 규소 기판의 표면에 설치된 산화물층은, 산화 알루미늄으로 실질적으로 이루어지는 것을 특징으로 하는 질화 규소 회로기판.
  2. 제1항에 있어서, 상기 산화물층은 그 내부에 존재하는 포어의 지름이 100nm 이하인 것을 특징으로 하는 질화 규소 회로 기판.
  3. 제1항에 있어서, 상기 산화물층은 고순도 α-Al2O3로 이루어지는 것을 특징으로 하는 질화 규소 회로 기판.
  4. 제1항에 있어서, 상기 질화 규소 기판과 산화물층의 계면에는 질화 규소와 산화 알루미늄의 반응층이 존재하고 있는 것을 특징으로 하는 질화 규소 회로 기판.
  5. 제1항에 있어서, 상기 산화물층은 Si, Ti, Y 및 Er로부터 선택되는 적어도 1종류를 10~1000ppm의 범위에서 더 함유하고 있는 것을 특징으로 하는 질화 규소 회로 기판.
  6. 제4항에 있어서, 상기 반응층은 Si, N, Al 및 O를 포함하고, Sn, Si, Ti, Y 및 Er로부터 선택되는 적어도 1종류를 더 함유하고 있는 것을 특징으로 하는 질화 규소 회로 기판.
  7. 제1항에 있어서, 상기 산화물층은 초미립자 알루미나졸의 도포, 소성층인 것을 특징으로 하는 질화 규소 회로 기판.
  8. 질화 규소 기판의 표면에 초미립자 알루미나졸을 도포한 후, 대기중에서 열처리하여 산화 알루미늄층을 형성하는 공정과, 상기 질화 규소 기판상에 상기 산화 알루미늄 층을 사이에 두고 동계 회로판을 접촉 배치하고, 열처리를 실시하여 상기 동계 회로판을 상기 질화 규소 기판에 접합하는 공정을 갖는 것을 특징으로 하는 질화 규소 회로 기판의 제조 방법.
  9. 제8항에 있어서, 상기 초미립자 알루미나졸은 Sn, Si, Ti, Y 및 Er로부터 선택되는 적어도 1종류를 10~1000ppm 범위에서 함유하고 있는 것을 특징으로 하는 질화 규소 회로 기판의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019970010909A 1996-03-27 1997-03-27 질화 규소 회로 기판 및 그 제조 방법 KR100270149B1 (ko)

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JP7225096 1996-03-27
JP96-072250 1996-03-27
JP23404596 1996-09-04
JP96-234045 1996-09-04

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US (1) US5912066A (ko)
EP (1) EP0798781B1 (ko)
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DE60037069T2 (de) * 1999-05-28 2008-09-11 Denki Kagaku Kogyo K.K. Schaltung mit Substrat
US6799628B1 (en) * 2000-07-20 2004-10-05 Honeywell International Inc. Heat exchanger having silicon nitride substrate for mounting high power electronic components
FR2814279B1 (fr) * 2000-09-15 2003-02-28 Alstom Substrat pour circuit electronique et module electronique utilisant un tel substrat
FR2814280B1 (fr) * 2000-09-15 2003-05-02 Alstom Substrat pour circuit electronique de puissance et module electronique de puissance utilisant un tel substrat
ES2717849T3 (es) * 2001-03-08 2019-06-25 Alstom Transp Tech Sustrato para circuito electrónico de potencia y módulo electrónico de potencia que utiliza dicho sustrato
DE102004033227A1 (de) * 2004-07-08 2006-01-26 Curamik Electronics Gmbh Metall-Keramik-Substrat
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DE69713540T2 (de) 2003-01-16
EP0798781B1 (en) 2002-06-26
EP0798781A2 (en) 1997-10-01
DE69713540D1 (de) 2002-08-01
US5912066A (en) 1999-06-15
KR100270149B1 (ko) 2001-01-15

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