KR880005680A - 반도체 장치용 점퍼칩 - Google Patents

반도체 장치용 점퍼칩 Download PDF

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Publication number
KR880005680A
KR880005680A KR870011011A KR870011011A KR880005680A KR 880005680 A KR880005680 A KR 880005680A KR 870011011 A KR870011011 A KR 870011011A KR 870011011 A KR870011011 A KR 870011011A KR 880005680 A KR880005680 A KR 880005680A
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South Korea
Prior art keywords
gold
alloy
layer
substrate
silicon
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KR870011011A
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English (en)
Inventor
엘.트레비젼 로버트
이.멕키 윌리암
비.헌넬 래리
Original Assignee
원본미기재
코밍코 리미티드
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Publication of KR880005680A publication Critical patent/KR880005680A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12528—Semiconductor component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12736—Al-base component
    • Y10T428/1275—Next to Group VIII or IB metal-base component
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12736—Al-base component
    • Y10T428/1275—Next to Group VIII or IB metal-base component
    • Y10T428/12757—Fe
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12493—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, joint, etc.]
    • Y10T428/12771—Transition metal-base component
    • Y10T428/12861—Group VIII or IB metal-base component
    • Y10T428/12889—Au-base component

Abstract

내용 없음

Description

반도체 장치용 점포칩
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따른 점퍼칩(jumper chip)의 확대단면도.
제4도는 본 발명에 따른 점퍼칩의 단면사진.

Claims (9)

  1. 기재, 이 기재일측부의 상부층, 금합금층, 상기 기재의 타측부와 상기 금합금층의 중간에 상기 금합금층 일측부의 증간 금층과, 상기 금합금층 타측부의 하부 금층으로 구성된 라미네이트를 제조하기 위한 방법에 있어서, 이 방법에 (a)상기 기재의 일측을 금피막으로 코팅하는 단계, (b)상기 금합금층의 양측을 금층으로 코팅하는 단계, (c)하나의 조립체를 형성하도록 상기 금합금층의 일측에 형성된 금층과 접촉되게 상기 기재상에 상기 금피막을 배치하는 단계와, (d)상기 기재의 금피막과 상기 금합금층의 일측부에 형성된 상기 금층사이에 결합이 이루어지도록 상기 조립체를 열간압연하는 단계로 구성되며, 이로써 상기 중간금층이 일정한 두께를 갖는 라미네이트를 얻음을 특징으로 하는 방법.
  2. 청구범위 1항에 있어서, 상기 기재가 철-니켈합금과 철-코발트-니켈합금중에서 선택된 물질로 만들어짐을 특징으로 하는 방법.
  3. 청구범위 1항에 있어서, 상기 기재가 Alloy 42와 KOVAR중에서 선택된 물질로 만들어짐을 특징으로 하는 방법.
  4. 청구범위 1항에 있어서, 상기 금합금층이 금-게르마늄함금, 금-실리콘합금과 금-게르마늄-실리콘합금증에서 선택된 금합금으로 반들어지며, 실리콘합금이 약 0.3-4 중량%범위의 실리콘을 함유하는 게르마늄함유합금이 약 12중량%이하의 게르마늄을 함유함을 특징으로 하는 방법.
  5. 청구범위 1항에 있어서, 상기 기재의 타측부가 알루미늄-실리콘합금과 알루미늄중에서 선택된 물질이 상부층으로서 코팅됨을 특징으로 하는 방법.
  6. 청구범위 1항에 있어서, 코팅된 금합금층이 이 금합금층의 양측에 코팅된 금의 두께를 얇게하도록 열간압연됨을 특징으로 하는 방법.
  7. 청구범위 6항에 있어서, 청구범위 1항의 단게, (c)에서 접촉배치되기전에 상기 코팅된 금합금층이 양측부에서 제2금층으로 코팅되고 2회 코팅된 금합금층이 이 금합금층의 양측부에서 금의 두께를 얇게하도록 열간압연됨을 특징으로 하는 방법.
  8. 철-니켈 이성분합금과 철-니켄-코발크 삼성분합금 중에서 선택된 물질로 된 기재, 기재일측부에 알루미늄과 알루미늄실리콘합금 중에서 선택된 표면층과, 기재타측부에 금층을 갖는 금합금층으로 구성되고, 상기 금층의 하나는 일정한 두께를 가지며 상기 기재의 타측부와 상기 금층의 하나는 일정한 두께를 가지며 상기 기재의 타측부와 상기 금속합금층의 중간에 위치하며, 상기 금합금층은 금-게르마늄 이성분합금, 금-실리콘 이성합금과 금-게르마늄-실리콘 삼성분합금금 중에서 선택된 합급으로 되어 있고, 상기 금-실리콘합금과 금-게르마늄-실리콘 삼성분합금이 약0.3-4 중량 %범위의 실리콘을 함유하고 상기 금-계트마늄 이성분합금과 상기 금-게르마늄-실리콘 삼성분합금이 12중량 %이하의 게르마늄을 함유하며, 상기표면층, 상기 기재, 상기 금층 및 상기 금합금층이 일체로 접촉됨을 특징으로 하는 반도체장치용 점퍼칩.
  9. 청구범위 8항에 있어서, 상기 금층의 두께가 20-60 마이크로 범위임을 특징으로 하는 점퍼칩.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR870011011A 1986-10-17 1987-10-02 반도체 장치용 점퍼칩 KR880005680A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US920081 1978-06-28
US06/920,081 US4745036A (en) 1986-10-17 1986-10-17 Jumper chip for semiconductor devices

Publications (1)

Publication Number Publication Date
KR880005680A true KR880005680A (ko) 1988-06-30

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR870011011A KR880005680A (ko) 1986-10-17 1987-10-02 반도체 장치용 점퍼칩

Country Status (5)

Country Link
US (1) US4745036A (ko)
EP (1) EP0264128A3 (ko)
JP (1) JPS63185048A (ko)
KR (1) KR880005680A (ko)
CA (1) CA1277441C (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0793390B2 (ja) * 1987-01-16 1995-10-09 日本電気株式会社 Ｉｃカード等のための薄型構造の紫外線透過型半導体装置パッケージ
US4875617A (en) * 1987-01-20 1989-10-24 Citowsky Elya L Gold-tin eutectic lead bonding method and structure
JPH0286134U (ko) * 1988-12-21 1990-07-09
GB9823267D0 (en) * 1998-10-24 1998-12-16 Hardwick Roy Method of producing a metal composites which can be processed at high temperatures
US6459854B1 (en) * 2000-01-24 2002-10-01 Nestec S.A. Process and module for heating liquid
CN103617969B (zh) * 2013-12-04 2016-06-29 广州先艺电子科技有限公司 一种焊接金锡合金薄膜的热沉及其制备方法
CN103921495B (zh) * 2014-05-05 2016-01-06 靳鑫 黄金相片的制作方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3245764A (en) * 1965-01-28 1966-04-12 Alloys Unltd Inc Gold alloy clad products
US3544704A (en) * 1969-01-21 1970-12-01 Motorola Inc Bonding islands for hybrid circuits
US3593412A (en) * 1969-07-22 1971-07-20 Motorola Inc Bonding system for semiconductor device
US3850688A (en) * 1971-12-29 1974-11-26 Gen Electric Ohmic contact for p-type group iii-v semiconductors
US4142202A (en) * 1976-01-31 1979-02-27 Licentia-Patent-Verwaltungs-G.M.B.H. Multi-layer metal connecting contact and method for making it

Also Published As

Publication number Publication date
JPS63185048A (ja) 1988-07-30
EP0264128A3 (en) 1989-03-22
CA1277441C (en) 1990-12-04
US4745036A (en) 1988-05-17
EP0264128A2 (en) 1988-04-20

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