KR960043018A - 반도체 소자의 에스.오.지(sog)막 형성방법 - Google Patents

반도체 소자의 에스.오.지(sog)막 형성방법 Download PDF

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Publication number
KR960043018A
KR960043018A KR1019950012711A KR19950012711A KR960043018A KR 960043018 A KR960043018 A KR 960043018A KR 1019950012711 A KR1019950012711 A KR 1019950012711A KR 19950012711 A KR19950012711 A KR 19950012711A KR 960043018 A KR960043018 A KR 960043018A
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KR
South Korea
Prior art keywords
film
semiconductor device
sog
forming
heat treatment
Prior art date
Application number
KR1019950012711A
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English (en)
Other versions
KR0172539B1 (ko
Inventor
신동선
김민재
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019950012711A priority Critical patent/KR0172539B1/ko
Priority to TW085105671A priority patent/TW299467B/zh
Priority to GB9610103A priority patent/GB2301224B/en
Priority to JP8124131A priority patent/JPH08330301A/ja
Priority to DE19620677A priority patent/DE19620677B4/de
Priority to CN96110029A priority patent/CN1076869C/zh
Publication of KR960043018A publication Critical patent/KR960043018A/ko
Application granted granted Critical
Publication of KR0172539B1 publication Critical patent/KR0172539B1/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

본 발명은 반도체 소자의 에스.오.지(SOG)막 형성방법에 관한 것으로, 수분의 침투로 인한 소자의 전기적특성 저하를 방지하기 위하여 SOG를 도포한 후 플라즈마 이온을 이용한 열처리(Anneal)공정을 실시하여 막 자체의 수분 흡수력을 저하시키므로써 소자의 신뢰성이 향상될 수 있도록 한 반도체 소자의 에스.오.지막 형성방법에 관한 것이다.

Description

반도체 소자의 에스.오.지(SOG)막 형성방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1A도 내지 제1D도는 본 발명에 따른 반도체 소자의 에스.오.지막 형성방법을 설명하기 위한 소자의 단면도.

Claims (5)

  1. 반도체 소자의 에스.오.지막 형성방법에 있어서, 금속패턴이 형성된 제1층간절연막상에 제2층간절연막을 형성한 후 전체상부면에 SOG를 도포하고 소정의 온도에서 경화시켜 SOG막을 형성시키는 단계와, 상기 단계로부터 NF3가스를 이용하여 생성시킨 플라즈마 이온으로 상기 SOG막을 1차 열처리하는 단계와, 상기 단계로 부터 소정의 온도에서 2차 열처리하는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 에스.오.지막 형성방법.
  2. 제1항에 있어서, 상기 경화공정은 200내지 400℃의 온도에서 실시되는 것을 특징으로 하는 반도체 소자의 에스.오.지막 형성방법.
  3. 제1항에 있어서, 상기 플라즈마는 고주파 및 저주파전력이 동시에 인가되는 플라즈마 장비내에서 생성되는 것을 특징으로 하는 반도체 소자의 에스.오.지막 형성방법.
  4. 제1항에 있어서, 상기 NF3가스는 0.5 내지 5SLM의 량으로 공급되는 것을 특징으로 하는 반도체 소자의 에스.오.지막 형성방법.
  5. 제1항에 있어서, 상기 2차 열처리공정은 400 내지 450℃의 온도에서 실시되는 것을 특징으로 하는 반도체 소자 에스.오.지막 형성방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950012711A 1995-05-22 1995-05-22 반도체 소자의 에스.오.지막 형성방법 KR0172539B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1019950012711A KR0172539B1 (ko) 1995-05-22 1995-05-22 반도체 소자의 에스.오.지막 형성방법
TW085105671A TW299467B (ko) 1995-05-22 1996-05-04
GB9610103A GB2301224B (en) 1995-05-22 1996-05-15 Method of forming a sog film in a semiconductor device
JP8124131A JPH08330301A (ja) 1995-05-22 1996-05-20 半導体素子のｓｏｇ膜の形成方法
DE19620677A DE19620677B4 (de) 1995-05-22 1996-05-22 Verfahren zur Bildung eines SOG-Films bei einem Halbleiterbauelement und Halbleiterbauelement mit einem SOG-Film
CN96110029A CN1076869C (zh) 1995-05-22 1996-05-22 形成半导体器件的旋涂玻璃膜的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950012711A KR0172539B1 (ko) 1995-05-22 1995-05-22 반도체 소자의 에스.오.지막 형성방법

Publications (2)

Publication Number Publication Date
KR960043018A true KR960043018A (ko) 1996-12-21
KR0172539B1 KR0172539B1 (ko) 1999-03-30

Family

ID=19415020

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950012711A KR0172539B1 (ko) 1995-05-22 1995-05-22 반도체 소자의 에스.오.지막 형성방법

Country Status (6)

Country Link
JP (1) JPH08330301A (ko)
KR (1) KR0172539B1 (ko)
CN (1) CN1076869C (ko)
DE (1) DE19620677B4 (ko)
GB (1) GB2301224B (ko)
TW (1) TW299467B (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100459686B1 (ko) * 1997-06-27 2005-01-17 삼성전자주식회사 반도체장치의콘택홀형성방법
KR100458081B1 (ko) * 1997-06-26 2005-02-23 주식회사 하이닉스반도체 반도체장치의비아홀형성방법

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970052338A (ko) * 1995-12-23 1997-07-29 김주용 반도체 소자의 제조방법
GB2322734A (en) * 1997-02-27 1998-09-02 Nec Corp Semiconductor device and a method of manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2823878B2 (ja) * 1989-03-09 1998-11-11 触媒化成工業株式会社 半導体集積回路の製造方法
US5270267A (en) * 1989-05-31 1993-12-14 Mitel Corporation Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate
JPH04158519A (ja) * 1990-10-22 1992-06-01 Seiko Epson Corp 半導体装置の製造方法
JP2913918B2 (ja) * 1991-08-26 1999-06-28 日本電気株式会社 半導体装置の製造方法
JPH0778816A (ja) * 1993-06-30 1995-03-20 Kawasaki Steel Corp 半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100458081B1 (ko) * 1997-06-26 2005-02-23 주식회사 하이닉스반도체 반도체장치의비아홀형성방법
KR100459686B1 (ko) * 1997-06-27 2005-01-17 삼성전자주식회사 반도체장치의콘택홀형성방법

Also Published As

Publication number Publication date
KR0172539B1 (ko) 1999-03-30
JPH08330301A (ja) 1996-12-13
CN1140898A (zh) 1997-01-22
DE19620677A1 (de) 1996-11-28
TW299467B (ko) 1997-03-01
CN1076869C (zh) 2001-12-26
GB9610103D0 (en) 1996-07-24
GB2301224A (en) 1996-11-27
DE19620677B4 (de) 2007-06-14
GB2301224B (en) 1999-07-14

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