GB2301224A - Method of forming a SOG film in a semiconductor device - Google Patents

Method of forming a SOG film in a semiconductor device Download PDF

Info

Publication number
GB2301224A
GB2301224A GB9610103A GB9610103A GB2301224A GB 2301224 A GB2301224 A GB 2301224A GB 9610103 A GB9610103 A GB 9610103A GB 9610103 A GB9610103 A GB 9610103A GB 2301224 A GB2301224 A GB 2301224A
Authority
GB
United Kingdom
Prior art keywords
sog film
forming
film
sog
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9610103A
Other versions
GB2301224B (en
GB9610103D0 (en
Inventor
Dong Sun Sheen
Min Jae Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9610103D0 publication Critical patent/GB9610103D0/en
Publication of GB2301224A publication Critical patent/GB2301224A/en
Application granted granted Critical
Publication of GB2301224B publication Critical patent/GB2301224B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105After-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Description

2301224 METHOD OF FORMING A SOG FILM IN A SEMICONDUCTOR DEVICE The present
invention relates to a method of forming a Spin-OnGlass (hereinafter, referred to as "SOG") film in a semiconductor device, more particularly to a method of forming a SOG film in a semiconductor device, in which the rellabilli, of the device is improved, by lowering the moisture absorption force of the SOG film through a posttreatment using plasma ions after the film is formed.
Generally, SOG film has the advantages of uniform flatness and high tolerance against cracking due to its high viscosity. SOG material is applied by rneans of a spin coating method, and it acts as an insulating layer because it is solidified through an annealing process after coating. Accordingly. in the manufacturing process of the semiconductor device, the SOG film is used for the purpose of insulation and planarization between the metal lines, ubiquitous throughout the However, the SOG film may cause cracks in structure of the device. the metal lines and the protection films that are fornied on the SOG film because the strong moisture absorption force of the SOG film itself dries up the metal and the films. It may also increase the intemal resistance of the metal lines because the underlying metal line is oxidized within the contact holes. This makes the connections between the metal lines poor and disconnected, lowening the reliability of the device. When the device operates, the SOG film then discharge s the absorbed moisture. The emitted moisture will be captured into the dangling bond of silicon between the gate oxide film and the silicon substrate of the transistor or between the field oxide film and the silicon substrate. This captured moisture is the main cause of transistor deterioration and failed inversion due to hot c-,im'ers. As a result, the electrical characteristics of the device will be deteriorated.
The purpose of the present invention is to provide a method for lo,-edng the moisture absorption force of a SOC, film through a posttreatment using plasma ions after forrrung the SOG film.
The present invention for accomplishing the above purpose is characterized in that it comprises the following steps: coating SOG matenial on the resulting structure after forming a second interlayer insulating film on a first interlaver insulating film on which a metal pattern is formed; forming a SOG film by first annealing; posttreating the SOG film b% plasma ions; and secondly annealing the SOG film.
For fuller understanding of the nature and aims of the invention, reference should be had to the following detailed description taken in conjunction with the accompanying drawings in which:
- 2 FIG. 1A and FIG. 11) show sectional views of the device illustrating a method of forming a SOG film in the semiconductor device in accordance with the present invention.
Similar reference characters refer to similar parts through the several views of the drawings.
Below, the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1A through FIG. 1D show sectional views of the device illustrating a method of forming a SOG film in the serniconductor device in accordance with the present invention.
FIG. 1A shows a sectional view of the device in which a metal film 2 is formed bv depositing conducting materials such as Aluminum on the first interlaver insulating film 1, which is formed through a desired process of device. An anti-reflecting coating film 3 is formed on the upper side thereof by depositing TiN, and then the anti-reflecting coating film 3 and the metal film 2 are sequential. patterned by means of pho toll thograph v and etching process using a desired mask.
FIG. IB shows a sectional view of the device in which, after forming a second interlayer insulating film 4, SOG film 5 is formed by coating SOG material for flatness and annealing it for the first time at a temperature of 200 to 40TC.
manufacturing a semiconductor FIG. IC shows a sectional view of the device in which the SOG film 5 is posttreated by means of plasma Ion bombardment using NF:3 gas, wherein the plasma is generated At the chemical vapor deposition (CVD) apparatus or plasma apparatus. The NF3 gas is supplied in about 0.5 to 5 SLvI. The effects of ion bombardment can also be improved by simultaneously applying an electrical power of high frequency (13.56 1Y1Hz) and an electrical power of low frequency (300 to 0-00 KHz). Then the effects to be attained by the above plasma treatment are as follows.
The NF,3 gas is dissociated and ionized by the plasma apparatus and it generates radicals such as N', F, and NFx' which are then bombarded on the SOG film 5. Then the moisture absorption force of the SOG film is reduced because ions such as N', F, and NFx' reduce the moisture absorption force at the site of the dangling bond within the SOG film 5 that is treated by the plasma. This turns the surface of the SOG film 5 into the form of oxynitride by generating SI-N bonds on the surface. Such ions as F", and '.,,."Fx' substitute Si-F bonds for SI-OH bonds discharging OH ions outward because fluorine (F) has a high electrical neaativitv with'n the SOG film 5. In addition, the above substituted S'F bonding strengthens the SI-0 bonding force, thereby preventing it from being cracked against H20 in the atmosphere, effectively reducing the moisture absorption force of the SOG film.
FIG. ID shows a sectional view of the device in which the SOG film is annealed for the second time at a temperature of 400 to 450C after the - i - plasma treatment. The second annealing is performed to discharge fluorine (F) ions or molecules with weakened bonds remaining in the SOG film 5.
And also. and other compounds the second annealing is capable of discharging OH, H,0, CHx, Fx that can deteriorate the operation of the device as their bonds are broken by the same process.
As mentioned above, the present invention has an outstanding effect of improving the reliability of the device by lowering the moisture absorption force of the film itself through a posttreatment using plasma ions after forming SOG.
The foregoing description, although described in its preferred embodiment with a certcluin degree of particulanity, is only illustrative of the principle of the present invention. It is to be understood that the present invention is not to be lirruited to the preferred embodiment disclosed and i'llustr, 1 1 1 -ted here:,,. According],,, all expedient variations that may be made within the scope of the present invention are to be encompassed as further embodiments of the present invention.

Claims (7)

CLAIMS:
1. A method of forming a SOG film in a semiconductor device, comprising the steps of. coating SOG material on the resulting structure after forming a second interlayer insulating film on a first interlayer insulating film on which a metal pattern is formed; forming a SOG film by first annealing; post-treating said SOG film by plasma ions; and annealing said SOG film for a second time.
The method of claim 1, wherein said first annealing is performed at a temperature of 200 to 400'C.
The method of claim 1 or 2, wherein said plasma ions are generated using NF3 gas in a plasma apparatus.
4. The method of claim 3, wherein said NF3 gas is provided in 0.5 to 5 SLM.
5. The method of any one of claims 1 to 4, wherein said plasma ions are generated within a plasma apparatus to which electrical power of high and low frequency are simultaneously applied.
6. The method of any one of claims 1 to 5, wherein said second annealing is performed at a temperature of 400 to 45WC.
7. A method of forming a SOG film in a semiconductor device substantially as hereinbefore described with reference to the accompanying drawings.
GB9610103A 1995-05-22 1996-05-15 Method of forming a sog film in a semiconductor device Expired - Fee Related GB2301224B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950012711A KR0172539B1 (en) 1995-05-22 1995-05-22 Method of forming s.o.g. in a semiconductor device

Publications (3)

Publication Number Publication Date
GB9610103D0 GB9610103D0 (en) 1996-07-24
GB2301224A true GB2301224A (en) 1996-11-27
GB2301224B GB2301224B (en) 1999-07-14

Family

ID=19415020

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9610103A Expired - Fee Related GB2301224B (en) 1995-05-22 1996-05-15 Method of forming a sog film in a semiconductor device

Country Status (6)

Country Link
JP (1) JPH08330301A (en)
KR (1) KR0172539B1 (en)
CN (1) CN1076869C (en)
DE (1) DE19620677B4 (en)
GB (1) GB2301224B (en)
TW (1) TW299467B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2308735A (en) * 1995-12-23 1997-07-02 Hyundai Electronics Ind A method of manufacturing a semiconductor device
GB2322734A (en) * 1997-02-27 1998-09-02 Nec Corp Semiconductor device and a method of manufacturing the same

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100458081B1 (en) * 1997-06-26 2005-02-23 주식회사 하이닉스반도체 Method for forming via hole of semiconductor device to improve step coverage of metal layer
KR100459686B1 (en) * 1997-06-27 2005-01-17 삼성전자주식회사 Fabrication method of contact hole for semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0529954A1 (en) * 1991-08-26 1993-03-03 Nec Corporation Method for making a planarized semiconductor device
US5270267A (en) * 1989-05-31 1993-12-14 Mitel Corporation Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2823878B2 (en) * 1989-03-09 1998-11-11 触媒化成工業株式会社 Method for manufacturing semiconductor integrated circuit
JPH04158519A (en) * 1990-10-22 1992-06-01 Seiko Epson Corp Manufacture of semiconductor device
JPH0778816A (en) * 1993-06-30 1995-03-20 Kawasaki Steel Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5270267A (en) * 1989-05-31 1993-12-14 Mitel Corporation Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate
EP0529954A1 (en) * 1991-08-26 1993-03-03 Nec Corporation Method for making a planarized semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2308735A (en) * 1995-12-23 1997-07-02 Hyundai Electronics Ind A method of manufacturing a semiconductor device
GB2322734A (en) * 1997-02-27 1998-09-02 Nec Corp Semiconductor device and a method of manufacturing the same

Also Published As

Publication number Publication date
DE19620677A1 (en) 1996-11-28
KR960043018A (en) 1996-12-21
CN1140898A (en) 1997-01-22
GB2301224B (en) 1999-07-14
CN1076869C (en) 2001-12-26
GB9610103D0 (en) 1996-07-24
KR0172539B1 (en) 1999-03-30
JPH08330301A (en) 1996-12-13
TW299467B (en) 1997-03-01
DE19620677B4 (en) 2007-06-14

Similar Documents

Publication Publication Date Title
JP4813737B2 (en) Ultra-thin oxynitride UV pretreatment method for forming silicon nitride films
US6284644B1 (en) IMD scheme by post-plasma treatment of FSG and TEOS oxide capping layer
US5643407A (en) Solving the poison via problem by adding N2 plasma treatment after via etching
JP3250518B2 (en) Semiconductor device and manufacturing method thereof
JPH0653337A (en) Manufacture of semiconductor device
KR970052338A (en) Manufacturing method of semiconductor device
US5792702A (en) Method for forming a film over a spin-on-glass layer by means of plasma-enhanced chemical-vapor deposition
GB2301224A (en) Method of forming a SOG film in a semiconductor device
JP4032447B2 (en) Manufacturing method of semiconductor device
US6740471B1 (en) Photoresist adhesion improvement on metal layer after photoresist rework by extra N2O treatment
JP3402937B2 (en) Method for manufacturing semiconductor device
US6627533B2 (en) Method of manufacturing an insulation film in a semiconductor device
JP3363614B2 (en) Method for manufacturing semiconductor device
KR100459686B1 (en) Fabrication method of contact hole for semiconductor device
JPH04199625A (en) Semiconductor device
KR100290468B1 (en) Method of forming an inter metal insulating film in a semiconductor device
JPH11274152A (en) Formation of sog layer in semiconductor device
KR970052866A (en) Planarization method of interlayer insulating film of semiconductor device
JPH07221176A (en) Method of manufacturing semiconductor device
JPH098137A (en) Semiconductor device and its manufacture
KR19990026802A (en) Low temperature interlayer dielectric film formation method using electron beam
KR970003631A (en) Method of forming interlayer insulating film of semiconductor device
JPH04262531A (en) Formation of insulating film
JPH0897285A (en) Formation of wiring inter-layer film
KR20020002525A (en) Method for forming inter layer dielectric in semiconductor device

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20100515