TW299467B - - Google Patents
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- TW299467B TW299467B TW085105671A TW85105671A TW299467B TW 299467 B TW299467 B TW 299467B TW 085105671 A TW085105671 A TW 085105671A TW 85105671 A TW85105671 A TW 85105671A TW 299467 B TW299467 B TW 299467B
- Authority
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- Prior art keywords
- patent application
- item
- sog
- film
- plasma
- Prior art date
Links
- 238000000034 method Methods 0.000 claims description 15
- 150000002500 ions Chemical class 0.000 claims description 12
- 238000005496 tempering Methods 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 4
- 239000011229 interlayer Substances 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000576 coating method Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 229910052751 metal Inorganic materials 0.000 description 9
- 239000002184 metal Substances 0.000 description 9
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 6
- 239000012528 membrane Substances 0.000 description 4
- MWUXSHHQAYIFBG-UHFFFAOYSA-N Nitric oxide Chemical compound O=[N] MWUXSHHQAYIFBG-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 2
- 229910008284 Si—F Inorganic materials 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000006117 anti-reflective coating Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000009832 plasma treatment Methods 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910007991 Si-N Inorganic materials 0.000 description 1
- 229910008051 Si-OH Inorganic materials 0.000 description 1
- 229910006294 Si—N Inorganic materials 0.000 description 1
- 229910006358 Si—OH Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 210000004709 eyebrow Anatomy 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 125000003010 ionic group Chemical group 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Description
經濟部中央樣準局員工消費合作杜印製Printed by the Ministry of Economic Affairs of the Central Bureau of Samples and Consumers
A7 B7 五、發明説明（/ ) 發明領域 本發明係關於一種在半導體元件中形成旋佈玻璃（以下作 SOG)膜的方法，特別係關於一種在半導體元件中形成SOG膜的方 法，在形成膜層之後利用電漿離子進行後續處理，以降低SOG膜吸 收水氣的能力，從而提高元件的可靠性。 發明背景 一般說來，SOG膜黏性高，所以平坦均勻，也能抵抗皸裂。 SOG材料是利用一種旋轉塗佈的方法塗佈的，塗佈之後再經過回火 製程，就會凝固，可以作爲絕緣眉。因此，在製造半導體元件的製 程中，SOG膜可用來在遍佈元件所有結構中的金屬線之間，充作絕 緣和平坦化的目的。但是SOG膜本身吸收水氣的能力很強，吸乾金 屦和保護膜，會使金屬線和形成在SOG膜上的保護膜皸裂。而且因 爲底下的金屬線會在接觸窗內氧化，而增加了金屬線的內電阻。這 會使得金屬線之間的連接很差，也會斷裂，而降低了元件的可靠 性。當元件操作時，SOG膜那時就釋放出所吸收的水氣。所釋放的 水氣會被閘極氧化膜和電晶體矽基板之間，或場氧化膜和矽基板之 間，矽中虛懸的鍵結所補捉。這些補捉的水氣正是電晶體品質惡化 的主因，使電晶體因爲熱載子的緣故而反轉失效。結果，元件的電 子特性也隨之惡化。 發明的簡要說明 本發明主要目的是提出一種在形成SOG膜之後，利用電漿離子 進行後續處理，以降低SOG膜吸收水氣能力的方法。 本發明爲達成以上的目的，其特徵係包含以下步驟：在金屬圖 案形成後，先形成一第一眉間絕緣膜，再於其上形成一第二層間絕 緣膜，之後在整個結構上塗佈SOG材料；藉第一回火步驟形成SOG 1 裝 I —訂 線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家棣準（CNS ) A4規格（210X297公釐） 經濟部中央標隼局屬工消費合作杜印製 A7 B7 五、發明説明（上） 膜；以電漿離子對SOG膜進行後續處理；並且第二次對SOG膜進行 回火。 附圖的簡要說明 爲使貴審查委員更完全地瞭解本發明的內容與目的，以下將 參^附圖詳細說明本發明。所附附圖爲： 圖1A至圖1D的元件橫剖面圖，說明本發明在半導體元件中形 成SOG膜的方法。 附圖中相同的編號代表相同的部位。 發明的詳細說明 以下，將參照附圖詳細說明本發明。 圖1A至圖1D的元件横剖面圖，說明本發明在半導體元件中形 成SOG膜的方法。 圖1A的元件橫剖面圖中，先以製造半導體元件所需製程形成 第一層間絕緣膜1，然後在其上沈積諸如鋁的導電材料，形成金屬 膜2。在上面沈積氣化鈦，形成了抗反射塗佈膜3，然後以所需的 光罩，並以微影和蝕刻製程，連續制定抗反射塗佈膜3和金屬膜2 的圖案。 圖1B的元件橫剖面圖中，先形成第二眉間絕緣膜4，然後塗佈 SOG材料，使之平坦，並以200至400°C的溫度進行第一次的回火， 而形成SOG膜5。 圖1C的元件橫剖面圖中，利用NF3氣體進行電漿離子撞擊，對 SOG膜5進行後續處理，其中電漿是由化學氣相沈積(CVD)裝置或 電漿裝置產生。NF3氣體是以約0.5至5 SLM的流速供應。如果同時 施以高頻(13.56MHz)的電力和低頻（300至500KHZ)的電力，離子 撞擊的效果更加提高。底下將說明上述電漿處理的效應。 (請先閱讀背面之注意事項再填寫本頁) 丨裝. 、-° 線 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） A7 _ B7 五、發明説明（$ ) 電漿裝置會使NF3氣體解離並離子化，並產生諸如N+、P和 NFX+等離子基，然後撞擊在SOG膜5上。諸如N+、Γ和NFX+等離子 會降低進行電漿處理的SOG膜5中，虛懸鍵結位置的水氣吸收能 力，因此能降低SOG膜的吸收水氣能力。這會在表面上產生Si-N 鍵，而使SOG膜5的表面轉變成氮氧化物。因爲氟(F)在SOG膜5 內具有很高的負電性，所以諸如F^〇NFx+等離子會使Si-F鍵代替Si-OH鍵，而釋OH離子。此外，上述替代的Si-F鍵會加強Si-0鍵結的 力量，所以可以避免Si-Ο在大氣中水分子的影響下解裂，有效降低 SOG膜吸收水氣的能力。 圖1D的元件橫剖面圖中，在電漿處理之後，再以400至45(TC 的溫度對SOG膜進行第二次的回火。第二次的回火是爲著要釋出 SOG膜5中，鍵結減弱的氟(F)離子或分子。而且第二次回火也可 使OH、H2〇、CHx、Fx等影響元件操作的離子或分子的鍵結斷裂 釋出。 如以上所述，本發明在形成SOG膜之後，利用電漿離子進行後 續處理，可以降低膜本身吸收水氣的能力*提高元件可靠性，極具 效應。A7 B7 V. Description of the invention (/) Field of the invention The present invention relates to a method of forming a spin-on glass (hereinafter referred to as SOG) film in a semiconductor element, in particular to a method of forming an SOG film in a semiconductor element, in forming a film After the layer, plasma ions are used for subsequent processing to reduce the ability of the SOG film to absorb moisture, thereby improving the reliability of the device. Background of the Invention Generally speaking, the SOG film has high viscosity, so it is flat and even, and can resist cracking. The SOG material is applied by a spin coating method. After coating, it is cured by tempering and can be used as an insulating eyebrow. Therefore, in the process of manufacturing a semiconductor element, the SOG film can be used for insulation and planarization purposes between metal wires spreading all over the structure of the element. However, the SOG film itself has a strong ability to absorb water vapor. Absorbing the metal sheet and protective film will crack the metal wire and the protective film formed on the SOG film. And because the underlying metal wire will oxidize in the contact window, the internal resistance of the metal wire is increased. This will make the connection between the metal wires very poor and break, which reduces the reliability of the component. When the element is operating, the SOG membrane then releases the absorbed moisture. The released moisture will be captured by the dangling bonds in the silicon between the gate oxide film and the transistor silicon substrate, or between the field oxide film and the silicon substrate. These trapped water vapors are the main reason for the deterioration of the transistor quality, which makes the transistors reverse and fail due to hot carriers. As a result, the electronic characteristics of the device also deteriorate. Brief description of the invention The main purpose of the present invention is to propose a method for subsequent treatment with plasma ions after forming an SOG film to reduce the SOG film's ability to absorb moisture. In order to achieve the above object, the present invention is characterized by the following steps: after the metal pattern is formed, a first inter-brow insulating film is formed, and then a second inter-layer insulating film is formed thereon, and then SOG is coated on the entire structure Materials; Form the SOG 1 by the first tempering step I. Binding line (please read the precautions on the back before filling in this page) This paper size is applicable to China National Standard (CNS) A4 specification (210X297mm) Standard Falcon Bureau is an industrial and consumer cooperation du printing A7 B7 V. Invention description (top) Membrane; subsequent treatment of SOG membrane with plasma ions; and tempering of SOG membrane for the second time. Brief Description of the Drawings In order to make your examination committee more fully understand the content and purpose of the present invention, the present invention will be described in detail below with reference to the drawings. The attached drawings are: Fig. 1A to Fig. 1D are cross-sectional views of elements, illustrating a method of forming an SOG film in a semiconductor element of the present invention. The same numbers in the drawings represent the same parts. Detailed Description of the Invention Hereinafter, the present invention will be described in detail with reference to the drawings. Fig. 1A to Fig. 1D are cross-sectional views of elements, illustrating a method of forming an SOG film in a semiconductor element of the present invention. In the element cross-sectional view of Fig. 1A, a first interlayer insulating film 1 is formed in the process required for manufacturing a semiconductor element, and then a conductive material such as aluminum is deposited thereon to form a metal film 2. Vaporized titanium is deposited thereon to form the anti-reflective coating film 3, and then the anti-reflective coating film 3 and the metal film 2 are successively patterned with a desired photomask and a lithography and etching process. In the cross-sectional view of the device of FIG. 1B, the second inter-brow insulating film 4 is formed first, and then the SOG material is applied to make it flat, and the first tempering is performed at a temperature of 200 to 400 ° C to form the SOG film 5 . In the cross-sectional view of the device in FIG. 1C, plasma ion impact is performed using NF3 gas to perform subsequent processing on the SOG film 5, wherein the plasma is generated by a chemical vapor deposition (CVD) device or a plasma device. NF3 gas is supplied at a flow rate of about 0.5 to 5 SLM. If high-frequency (13.56MHz) power and low-frequency (300 to 500KHZ) power are applied at the same time, the effect of ion impact is more enhanced. The effect of the above plasma treatment will be explained below. (Please read the precautions on the back before filling in this page) 丨 Package. 、-° The size of the paper is applicable to the Chinese National Standard (CNS) A4 specification (210X 297mm) A7 _ B7 V. Invention description ($) Plasma The device dissociates and ionizes the NF3 gas and generates ionic groups such as N +, P, and NFX +, and then impinges on the SOG film 5. Plasma such as N +, Γ, and NFX + will reduce the water vapor absorption capacity of the dangling bonding position in the plasma-treated SOG film 5, and therefore the water vapor absorption capacity of the SOG film. This generates Si-N bonds on the surface, and the surface of the SOG film 5 is converted into nitrogen oxide. Since fluorine (F) has a high negative charge in the SOG film 5, ions such as F ^ NFx + will cause Si-F bonds to replace Si-OH bonds and release OH ions. In addition, the above-mentioned alternative Si-F bond will strengthen the strength of Si-0 bonding, so it can avoid the cracking of Si-Ο under the influence of water molecules in the atmosphere, effectively reducing the ability of SOG film to absorb moisture. In the cross-sectional view of the device in FIG. 1D, after the plasma treatment, the SOG film is tempered a second time at a temperature of 400 to 45 ° C. The second tempering is to release the SOG film 5 In the middle, weakened fluorine (F) ions or molecules. And the second tempering can also break the bonds of ions, molecules such as OH, H2〇, CHx, Fx, etc. that affect the operation of the element. As mentioned above, After the SOG film is formed in the present invention, the plasma ions are used for subsequent processing, which can reduce the ability of the film itself to absorb water vapor *, improve the reliability of the element, and have an extremely effective effect.
經奇邛，7.-^^-¾¾¾.^消費含泎«i,-p'$L *______-"L _ —fn nn ^^^^1 n^i ^nn n^— nn I (請先閲讀背面之注意事項再填寫本頁) 訂 以上的說明，雖然以較佳實施例仔細說明，但只是爲了說明本 發明的原則。大家應瞭解本發明並不侷限在此處所揭露和說明的較 佳實施例。因此，所有在本發明的範圍和精神之內細節上的變化， 將視爲本發明進一步的實施例。 本紙張尺度適用中國國家橾準（CNS ) A4規格（210X297公釐）Jing Qiong, 7 .- ^^-¾¾¾. ^ Consumption includes «i, -p '$ L * ______- " L _ —fn nn ^^^^ 1 n ^ i ^ nn n ^ — nn I ( Please read the precautions on the back and then fill out this page) to order the above description. Although it is explained in detail with the preferred embodiment, it is only for explaining the principles of the present invention. It should be understood that the present invention is not limited to the preferred embodiments disclosed and described herein. Therefore, all changes in details within the scope and spirit of the present invention will be regarded as further embodiments of the present invention. This paper scale is applicable to China National Standard (CNS) A4 (210X297mm)
Claims (1)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1019950012711A KR0172539B1 (en) | 1995-05-22 | 1995-05-22 | Method of forming s.o.g. in a semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TW299467B true TW299467B (en) | 1997-03-01 |
Family
ID=19415020
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW085105671A TW299467B (en) | 1995-05-22 | 1996-05-04 |
Country Status (6)
| Country | Link |
|---|---|
| JP (1) | JPH08330301A (en) |
| KR (1) | KR0172539B1 (en) |
| CN (1) | CN1076869C (en) |
| DE (1) | DE19620677B4 (en) |
| GB (1) | GB2301224B (en) |
| TW (1) | TW299467B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR970052338A (en) * | 1995-12-23 | 1997-07-29 | 김주용 | Manufacturing method of semiconductor device |
| GB2322734A (en) * | 1997-02-27 | 1998-09-02 | Nec Corp | Semiconductor device and a method of manufacturing the same |
| KR100458081B1 (en) * | 1997-06-26 | 2005-02-23 | 주식회사 하이닉스반도체 | Method for forming via hole of semiconductor device to improve step coverage of metal layer |
| KR100459686B1 (en) * | 1997-06-27 | 2005-01-17 | 삼성전자주식회사 | Fabrication method of contact hole for semiconductor device |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2823878B2 (en) * | 1989-03-09 | 1998-11-11 | 触媒化成工業株式会社 | Method for manufacturing semiconductor integrated circuit |
| US5270267A (en) * | 1989-05-31 | 1993-12-14 | Mitel Corporation | Curing and passivation of spin on glasses by a plasma process wherein an external polarization field is applied to the substrate |
| JPH04158519A (en) * | 1990-10-22 | 1992-06-01 | Seiko Epson Corp | Manufacture of semiconductor device |
| JP2913918B2 (en) * | 1991-08-26 | 1999-06-28 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| JPH0778816A (en) * | 1993-06-30 | 1995-03-20 | Kawasaki Steel Corp | Manufacture of semiconductor device |
-
1995
- 1995-05-22 KR KR1019950012711A patent/KR0172539B1/en not_active IP Right Cessation
-
1996
- 1996-05-04 TW TW085105671A patent/TW299467B/zh active
- 1996-05-15 GB GB9610103A patent/GB2301224B/en not_active Expired - Fee Related
- 1996-05-20 JP JP8124131A patent/JPH08330301A/en active Pending
- 1996-05-22 CN CN96110029A patent/CN1076869C/en not_active Expired - Fee Related
- 1996-05-22 DE DE19620677A patent/DE19620677B4/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| GB9610103D0 (en) | 1996-07-24 |
| CN1140898A (en) | 1997-01-22 |
| GB2301224B (en) | 1999-07-14 |
| KR960043018A (en) | 1996-12-21 |
| JPH08330301A (en) | 1996-12-13 |
| DE19620677B4 (en) | 2007-06-14 |
| CN1076869C (en) | 2001-12-26 |
| DE19620677A1 (en) | 1996-11-28 |
| GB2301224A (en) | 1996-11-27 |
| KR0172539B1 (en) | 1999-03-30 |
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